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* /gas/ChangeLogThiemo Seufer2005-02-181-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | * config/tc-mips.c (macro_build_ldst_constoffset): Fail on $at uses after .set noat. (load_address): Likewise. (macro): Likewise. Don't try to avoid $at use by sacrificing the target register before it is stored, it won't work. /gas/testsuite/ChangeLog * gas/mips/noat-1.s, gas/mips/noat-1.d, gas/mips/noat-2.s, gas/mips/noat2.l, gas/mips/noat-3.s, gas/mips/noat-3.l, gas/mips/noat-4.s, gas/mips/noat-4.l, gas/mips/noat-5.s, gas/mips/noat-5.l, gas/mips/noat-6.s, gas/mips/noat-6.l, gas/mips/noat-7.s, gas/mips/noat-7.l: New files, testcases for .set noat in macro expansions. * gas/mips/mips.exp: Run new testcases. * gas/mips/rol-hw.d, gas/mips/rol-hw.l, gas/mips/rol.d, gas/mips/rol.l, gas/mips/rol.s, gas/mips/rol64-hw.d, gas/mips/rol64-hw.l, gas/mips/rol64.d, gas/mips/rol64.l, gas/mips/rol64.s, gas/mips/uld2-eb.d, gas/mips/uld2-el.d, gas/mips/uld2.l, gas/mips/uld2.s, gas/mips/ulh2-eb.d, gas/mips/ulh2-el.d, gas/mips/ulh2.l, gas/mips/ulh2.s, gas/mips/ulw2-eb-ilocks.d, gas/mips/ulw2-eb.d, gas/mips/ulw2-el-ilocks.d, gas/mips/ulw2-el.d, gas/mips/ulw2.l, gas/mips/ulw2.s: Don't try to test .set noat.
* [ opcodes/ChangeLog ]Chris Demetriou2002-12-181-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2002-12-18 Chris Demetriou <cgd@broadcom.com> * mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two "dror" entries, and reorder the remaining "dror" and "ror" entries. [ gas/ChangeLog ] 2002-12-18 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR, use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I, M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and arrange not to issue warnings about use of AT when AT is not actually used. [ gas/testsuite/ChangeLog ] 2002-12-18 Chris Demetriou <cgd@broadcom.com> * gas/mips/rol.s: Add ".set noat" and some new instructions to test. * gas/mips/rol64.s: Likewise. * gas/mips/rol.l: New file. * gas/mips/rol.d: Adjust to use rol.l and for rol.s changes. * gas/mips/rol64.l: New file. * gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes. * gas/mips/rol-hw.d: New file. * gas/mips/rol-hw.l: New file. * gas/mips/rol64-hw.d: New file. * gas/mips/rol64-hw.l: New file. * gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
* ? gas/testsuite/gas/mips/rol64.dThiemo Seufer2002-05-211-0/+27
? gas/testsuite/gas/mips/rol64.s Index: gas/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/ChangeLog,v retrieving revision 1.1334 diff -u -p -r1.1334 ChangeLog --- gas/ChangeLog 21 May 2002 20:01:51 -0000 1.1334 +++ gas/ChangeLog 21 May 2002 23:32:51 -0000 @@ -1,3 +1,8 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (macro2): Add 64 bit drol, dror macros. + Optimize the rotate by zero case. + 2002-05-21 Nick Clifton <nickc@cambridge.redhat.com> * configure.in: Remove accidental enabling of bfd_gas=yes for Index: gas/config/tc-mips.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-mips.c,v retrieving revision 1.123 diff -u -p -r1.123 tc-mips.c --- gas/config/tc-mips.c 14 May 2002 23:35:59 -0000 1.123 +++ gas/config/tc-mips.c 21 May 2002 23:32:52 -0000 @@ -6686,6 +6686,17 @@ macro2 (ip) --mips_opts.noreorder; break; + case M_DROL: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + break; + case M_ROL: macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); @@ -6697,15 +6708,55 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROL_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + l = (rot < 0x20) ? "dsll" : "dsll32"; + r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROL_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + + case M_DROR: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); break; case M_ROR: @@ -6719,15 +6770,44 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROR_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + r = (rot < 0x20) ? "dsrl" : "dsrl32"; + l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROR_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } break; case M_S_DOB: Index: gas/testsuite/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v retrieving revision 1.315 diff -u -p -r1.315 ChangeLog --- gas/testsuite/ChangeLog 20 May 2002 17:05:34 -0000 1.315 +++ gas/testsuite/ChangeLog 21 May 2002 23:32:54 -0000 @@ -1,3 +1,9 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * gas/mips/rol64.s: New file, test of drol, dror macros. + * gas/mips/rol64.d: Likewise. + * gas/mips/mips.exp: Add new test. + 2002-05-20 Nick Clifton <nickc@cambridge.redhat.com> * gas/arm/arm.exp: Replace deprecated command line switches Index: gas/testsuite/gas/mips/mips.exp =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v retrieving revision 1.32 diff -u -p -r1.32 mips.exp --- gas/testsuite/gas/mips/mips.exp 4 Apr 2002 08:23:30 -0000 1.32 +++ gas/testsuite/gas/mips/mips.exp 21 May 2002 23:32:54 -0000 @@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then { run_dump_test "mul" } run_dump_test "rol" + run_dump_test "rol64" if !$aout { run_dump_test "sb" } run_dump_test "trunc" if !$aout { run_dump_test "ulh" } Index: include/opcode/ChangeLog =================================================================== RCS file: /cvs/src/src/include/opcode/ChangeLog,v retrieving revision 1.167 diff -u -p -r1.167 ChangeLog --- include/opcode/ChangeLog 17 May 2002 19:01:03 -0000 1.167 +++ include/opcode/ChangeLog 21 May 2002 23:32:57 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases. + 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com> * h8300.h: Corrected defs of all control regs Index: include/opcode/mips.h =================================================================== RCS file: /cvs/src/src/include/opcode/mips.h,v retrieving revision 1.24 diff -u -p -r1.24 mips.h --- include/opcode/mips.h 16 Mar 2002 03:09:18 -0000 1.24 +++ include/opcode/mips.h 21 May 2002 23:32:57 -0000 @@ -526,9 +526,13 @@ enum M_REM_3I, M_REMU_3, M_REMU_3I, + M_DROL, M_ROL, + M_DROL_I, M_ROL_I, + M_DROR, M_ROR, + M_DROR_I, M_ROR_I, M_S_DA, M_S_DOB, Index: opcodes/ChangeLog =================================================================== RCS file: /cvs/src/src/opcodes/ChangeLog,v retrieving revision 1.447 diff -u -p -r1.447 ChangeLog --- opcodes/ChangeLog 17 May 2002 14:36:45 -0000 1.447 +++ opcodes/ChangeLog 21 May 2002 23:33:00 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros. + Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com> * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. Index: opcodes/mips-opc.c =================================================================== RCS file: /cvs/src/src/opcodes/mips-opc.c,v retrieving revision 1.32 diff -u -p -r1.32 mips-opc.c --- opcodes/mips-opc.c 17 Mar 2002 02:42:25 -0000 1.32 +++ opcodes/mips-opc.c 21 May 2002 23:33:00 -0000 @@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 }, {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 }, {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 }, +{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 }, +{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 }, +{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 }, +{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 }, {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
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