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-rw-r--r--cpu/ChangeLog5
-rw-r--r--cpu/m32r.opc2
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/m32r-asm.c2
4 files changed, 11 insertions, 2 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 6c9a90d6f9..ecc06b4565 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
+ size.
+
2005-07-25 DJ Delorie <dj@redhat.com>
* m32c.opc (parse_unsigned8): Add %dsp8().
diff --git a/cpu/m32r.opc b/cpu/m32r.opc
index 63f41a57de..afe12eb7b6 100644
--- a/cpu/m32r.opc
+++ b/cpu/m32r.opc
@@ -182,7 +182,7 @@ parse_slo16 (CGEN_CPU_DESC cd,
{
value &= 0xffff;
if (value & 0x8000)
- value |= 0xffff0000;
+ value |= ~0xffff;
}
*valuep = value;
return errmsg;
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 45fefb10f7..9bcce14c6e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * m32r-asm.c: Regenerate after updating m32r.opc.
+
2005-10-08 James Lemke <jim@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 53e6628530..b45f720ee4 100644
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -144,7 +144,7 @@ parse_slo16 (CGEN_CPU_DESC cd,
{
value &= 0xffff;
if (value & 0x8000)
- value |= 0xffff0000;
+ value |= ~0xffff;
}
*valuep = value;
return errmsg;
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