| Commit message (Collapse) | Author | Age | Files | Lines |
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Based on patch from Alistair, some fixes and changes:
- account HILE bit, set/clear MSR_LE
- clear MSR_PR
- don't use raw ramming (clearer this way, not perf critical)
At the moment, must manually stop all threads in the core, and manually
restart them. Can change behaviour depending on what exactly we want
(e.g., sreset all threads may be good for debugging).
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Tested-by: Stewart Smith <stewart@linux.ibm.com>
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This makes a few changes to stop and ram procedure.
First of all, the existing thread_stop procedure is also setting up some
of the ram state. Change that to just do the stop sequence from the
workbook, and move the ram stuff into ram setup and destroy.
The workbook calls for inactive threads being rammed to set a thread
active state before ram mode is exited, in order for GPRs modified by
ramming to avoid getting lost. Currently the code does that in the
stop sequence before ram mode is activated.
The code also currently deasserts the thread active bit after exiting
ram mode, which is not part of the workbook, so this is no longer done.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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XXX: have to ensure this still does the right thing on P9
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This copies the special wakeup release logic from p9chip.c
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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This reverts commit 3ce2bc04c70bf6f961a62a380f7b4459445ed2da.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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This reverts commit eb1d866e30a1f8488fb794776bb5a1e0bc42d2e5.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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This reverts commit f795d2904010c0b2e2ad8d8163dffc906ce8cef7.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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This reverts commit 7de0ee34699e297f1f224fce1790c3cd03bc2f32. The
incorrect version of "libpdbg/p8chip.c: release special wakeups for
P8" was applied, the next patch will commit the correct version.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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1. File 'ccan/short_types/short_types.h' is not used by external interface
and should be used as internal dependency only (ccan directory is not
installed by make script).
2. Extern "C" declaration of API allows us to call libpdbg functions
from C++ modules.
Signed-off-by: Artem Senichev <artemsen@gmail.com>
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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This will help add a generic read/write methods for adu class.
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Based on patch from Alistair, some fixes and changes:
- account HILE bit, set/clear MSR_LE
- clear MSR_PR
- don't use raw ramming (clearer this way, not perf critical)
At the moment, must manually stop all threads in the core, and manually
restart them. Can change behaviour depending on what exactly we want
(e.g., sreset all threads may be good for debugging).
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This makes a few changes to stop and ram procedure.
First of all, the existing thread_stop procedure is also setting up some
of the ram state. Change that to just do the stop sequence from the
workbook, and move the ram stuff into ram setup and destroy.
The workbook calls for inactive threads being rammed to set a thread
active state before ram mode is exited, in order for GPRs modified by
ramming to avoid getting lost. Currently the code does that in the
stop sequence before ram mode is activated.
The code also currently deasserts the thread active bit after exiting
ram mode, which is not part of the workbook, so this is no longer done.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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XXX: have to ensure this still does the right thing on P9
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This copies the special wakeup release logic from p9chip.c
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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The workbook recipe is to write SP_STOP once, then poll for status.
Also add a small delay between polling to give a reasonable timeout
and avoid hitting the scom bus hard for no good reason.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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Not all memory can be read with the default ADU block size of 8
bytes. Specifically cache-inhibited access to some MMIO regions such
as PCIe BAR spaces requires 4 byte accesses to avoid check stopping
the machine.
This patch adds library functions to read/write IO memory which takes
a block size argument and two new put/getmemio commands to allow a
specific block size to be specified from the command line.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Instead of using two different ways to id various chiplets, consistently
use "index" property.
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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The kernel uses "%08x" to create a directory in debugfs.
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Even though device tree compatible property can hold multiple strings,
the struct pdbg_target definition can only take a single compatible
string.
Also, rename chtm hw unit to match nhtm.
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
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Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
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Commit 936dbdcedb27 ("libpdbg: Rework target addressing") introduced a
bug leading to the following assertion failing:
pdbg: libpdbg/device.c:634: pdbg_target_address: Assertion `(pos + n) <= p->len' failed.
When this function was reworked the index parameter was dropped as
every caller set index == 0. Removal should have also resulted in the
local pos variable being removed. Instead it was set as if index == 1
resulting in the above violation.
Fix the bug and add a test to check pdbg_target_address().
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Rework the target compatible code to reuse existing libpdbg code where
possible. Renames and exports these functions for use by external
libraries.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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The dt_prop functions were copied over from Skiboot. Rework and rename
these to make use of the existing libpdbg property functions. These
should not have been used by external projects so maintaining
backwards compatibility is not a concern.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Clean up the target addressing functions and rename them to be
consistent with other libpdbg function names.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Rename the chip-id functions to be consistent with other libpdbg
function names and move them in with the rest of the general libpdbg
code.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Some of the functions dealing with target properties have somewhat
inconsistent naming. This patch renames them and adds #defines for
backwards compatibility for external projects. These will be removed
once older projects have moved over to the new names.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Many of the functions in device.c are only used within that file and
should be made static.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Much of the code in device.c was originally copied over from Skiboot
and is not applicable or used by pdbg.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
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Some hardware targets have more complicated addressing schemes than a
simple base address + offset. It may be possible to determine a
device-tree representation for these schemes but for the moment it is
more straight forward to define a callback to do the translation.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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The root device tree node does not have a class. Therefore this assert
was not useful as the strcmp() may cause a segfault comparing the root
node class.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Amitay Isaacs <amitay@ozlabs.org>
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I have changed a few bits here and there but this patch is largely
authored by Alistair Popple.
Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Signed-off-by: Alistair Popple <alistair@popple.id.au>
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Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
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Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
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