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| author | Alistair Popple <alistair@popple.id.au> | 2016-12-19 21:07:51 +1100 |
|---|---|---|
| committer | Alistair Popple <alistair@popple.id.au> | 2017-03-30 15:37:41 +1100 |
| commit | f045f14437ef63e10f57580978dc9ca3e0256007 (patch) | |
| tree | 86c0bdfe2fd6a54d5517ee5313e89765cd801a08 /p9w-fsi.dts | |
| parent | 72bf33c09f06ae63cd9f8d05e412b64622b340d1 (diff) | |
| download | pdbg-f045f14437ef63e10f57580978dc9ca3e0256007.tar.gz pdbg-f045f14437ef63e10f57580978dc9ca3e0256007.zip | |
Clean-up target configuration in preparation for adding P9 support
The previous implementation of targeting was hardcoded, cumbersome
and difficult to reconfigure for different chip types. This moves to a
method of configuring targets using device-tree which is much easier
to maintain and allows methods to be added to support operations like
getmem on POWER9.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Diffstat (limited to 'p9w-fsi.dts')
| -rw-r--r-- | p9w-fsi.dts | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/p9w-fsi.dts b/p9w-fsi.dts new file mode 100644 index 0000000..224c665 --- /dev/null +++ b/p9w-fsi.dts @@ -0,0 +1,16 @@ +/dts-v1/; + +/include/ "p9-fsi.dtsi" + +/ { +}; + +&fsi0 { + /* GPIO pin definitions */ + fsi_clk = <0x1e0 0x10>; /* AA0 */ + fsi_dat = <0x20 0x0>; /* E0 */ + fsi_dat_en = <0x80 0xa>; /* R2 */ + fsi_enable = <0x0 0x18>; /* D0 */ + cronus_sel = <0x0 0x6>; /* A6 */ + clock_delay = <0x14>; +}; |
