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| author | Alistair Popple <alistair@popple.id.au> | 2016-12-19 21:07:51 +1100 |
|---|---|---|
| committer | Alistair Popple <alistair@popple.id.au> | 2017-03-30 15:37:41 +1100 |
| commit | f045f14437ef63e10f57580978dc9ca3e0256007 (patch) | |
| tree | 86c0bdfe2fd6a54d5517ee5313e89765cd801a08 /p8-fsi.dts.m4 | |
| parent | 72bf33c09f06ae63cd9f8d05e412b64622b340d1 (diff) | |
| download | pdbg-f045f14437ef63e10f57580978dc9ca3e0256007.tar.gz pdbg-f045f14437ef63e10f57580978dc9ca3e0256007.zip | |
Clean-up target configuration in preparation for adding P9 support
The previous implementation of targeting was hardcoded, cumbersome
and difficult to reconfigure for different chip types. This moves to a
method of configuring targets using device-tree which is much easier
to maintain and allows methods to be added to support operations like
getmem on POWER9.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Diffstat (limited to 'p8-fsi.dts.m4')
| -rw-r--r-- | p8-fsi.dts.m4 | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/p8-fsi.dts.m4 b/p8-fsi.dts.m4 new file mode 100644 index 0000000..e975313 --- /dev/null +++ b/p8-fsi.dts.m4 @@ -0,0 +1,49 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + fsi@0 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,bmcfsi"; + reg = <0x0 0x0 0x0>; + + /* GPIO pin definitions */ + fsi_clk = <0x0 0x4>; /* A4 */ + fsi_dat = <0x0 0x5>; /* A5 */ + fsi_dat_en = <0x20 0x1e>; /* H6 */ + fsi_enable = <0x0 0x18>; /* D0 */ + cronus_sel = <0x0 0x6>; /* A6 */ + clock_delay = <0x14>; + + index = <0x0>; + status = "hidden"; + + pib@1000 { + #address-cells = <0x2>; + #size-cells = <0x1>; + reg = <0x0 0x1000 0x7>; + compatible = "ibm,fsi-pib", "ibm,power8-fsi-pib"; + index = <0x0>; + include(p8-pib.dts.m4)dnl + }; + + hmfsi@100000 { + compatible = "ibm,fsi-hmfsi"; + reg = <0x0 0x100000 0x8000>; + index = <0x1>; + + pib@1000 { + #address-cells = <0x2>; + #size-cells = <0x1>; + reg = <0x0 0x1000 0x7>; + compatible = "ibm,fsi-pib", "ibm,power8-fsi-pib"; + index = <0x1>; + include(p8-pib.dts.m4)dnl + }; + + }; + }; +}; |
