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authorAlistair Popple <alistair@popple.id.au>2018-02-21 15:15:35 +1100
committerAlistair Popple <alistair@popple.id.au>2018-02-21 15:15:35 +1100
commitf863855adfae92bc0e67e2b0a3cd4d112d5486b8 (patch)
tree90b46f3a3785ad284eb34e180b31758f900c4bbf
parent88a6d568b94c447f1ef354696bd68a4c82d0e26e (diff)
downloadpdbg-f863855adfae92bc0e67e2b0a3cd4d112d5486b8.tar.gz
pdbg-f863855adfae92bc0e67e2b0a3cd4d112d5486b8.zip
libpdbg/cfam.c: Remove fsi2pib engine reset
Prior to every pib read and write we would reset the fsi2pib engine. This was primarily added to improve reliability on P8 BMC's which do not allow exclusive access to the GPIO registers for bitbanging FSI. Newer BMC's have a built in kernel driver to allow FSI access and this reset causes the fsi2pib engine to loose existing settings such as the true mask register. To avoid this only reset the PIB master interface once at startup. Signed-off-by: Alistair Popple <alistair@popple.id.au>
-rw-r--r--libpdbg/cfam.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/libpdbg/cfam.c b/libpdbg/cfam.c
index 3df0a06..cf0017f 100644
--- a/libpdbg/cfam.c
+++ b/libpdbg/cfam.c
@@ -88,7 +88,6 @@ static int fsi2pib_getscom(struct pib *pib, uint64_t addr, uint64_t *value)
/* Get scom works by putting the address in FSI_CMD_REG and
* reading the result from FST_DATA[01]_REG. */
- CHECK_ERR(fsi_write(&pib->target, FSI_RESET_REG, FSI_RESET_CMD));
CHECK_ERR(fsi_write(&pib->target, FSI_CMD_REG, addr));
CHECK_ERR(fsi_read(&pib->target, FSI_DATA0_REG, &result));
*value = ((uint64_t) result) << 32;
@@ -102,7 +101,6 @@ static int fsi2pib_putscom(struct pib *pib, uint64_t addr, uint64_t value)
{
usleep(FSI2PIB_RELAX);
- CHECK_ERR(fsi_write(&pib->target, FSI_RESET_REG, FSI_RESET_CMD));
CHECK_ERR(fsi_write(&pib->target, FSI_DATA0_REG, (value >> 32) & 0xffffffff));
CHECK_ERR(fsi_write(&pib->target, FSI_DATA1_REG, value & 0xffffffff));
CHECK_ERR(fsi_write(&pib->target, FSI_CMD_REG, FSI_CMD_REG_WRITE | addr));
@@ -110,11 +108,22 @@ static int fsi2pib_putscom(struct pib *pib, uint64_t addr, uint64_t value)
return 0;
}
+static int fsi2pib_reset(struct pdbg_target *target)
+{
+ /* Reset the PIB master interface. We used to reset the entire FSI2PIB
+ * engine but that had the unfortunate side effect of clearing existing
+ * settings such as the true mask register (0xd) */
+ CHECK_ERR(fsi_write(target, FSI_SET_PIB_RESET_REG, FSI_SET_PIB_RESET));
+
+ return 0;
+}
+
struct pib fsi_pib = {
.target = {
.name = "POWER FSI2PIB",
.compatible = "ibm,fsi-pib",
.class = "pib",
+ .probe = fsi2pib_reset,
},
.read = fsi2pib_getscom,
.write = fsi2pib_putscom,
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