diff options
Diffstat (limited to 'freed-ora/tags/f16/3.1.1-1.fc16/drm-i915-fbc-stfu.patch')
| -rw-r--r-- | freed-ora/tags/f16/3.1.1-1.fc16/drm-i915-fbc-stfu.patch | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/freed-ora/tags/f16/3.1.1-1.fc16/drm-i915-fbc-stfu.patch b/freed-ora/tags/f16/3.1.1-1.fc16/drm-i915-fbc-stfu.patch new file mode 100644 index 000000000..9240387ee --- /dev/null +++ b/freed-ora/tags/f16/3.1.1-1.fc16/drm-i915-fbc-stfu.patch @@ -0,0 +1,102 @@ +From c5d1455d9340c63e5c5d987e2d816e77538caa90 Mon Sep 17 00:00:00 2001 +From: Adam Jackson <ajax@redhat.com> +Date: Tue, 13 Sep 2011 12:07:37 -0400 +Subject: [PATCH] drm/i915: Shut the fbc messages up + +FB compression enable/disable fires on pretty much every pageflip now, +which is just uncredibly excessive. Hush that noise. + +Signed-off-by: Adam Jackson <ajax@redhat.com> +--- + drivers/gpu/drm/i915/intel_display.c | 19 ------------------- + 1 files changed, 0 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 56a8554..a6d14eb 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -1474,8 +1474,6 @@ static void i8xx_disable_fbc(struct drm_device *dev) + DRM_DEBUG_KMS("FBC idle timed out\n"); + return; + } +- +- DRM_DEBUG_KMS("disabled FBC\n"); + } + + static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) +@@ -1516,9 +1514,6 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) + fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; + fbc_ctl |= obj->fence_reg; + I915_WRITE(FBC_CONTROL, fbc_ctl); +- +- DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %d, ", +- cfb_pitch, crtc->y, intel_crtc->plane); + } + + static bool i8xx_fbc_enabled(struct drm_device *dev) +@@ -1551,8 +1546,6 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) + + /* enable it... */ + I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN); +- +- DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); + } + + static void g4x_disable_fbc(struct drm_device *dev) +@@ -1565,8 +1558,6 @@ static void g4x_disable_fbc(struct drm_device *dev) + if (dpfc_ctl & DPFC_CTL_EN) { + dpfc_ctl &= ~DPFC_CTL_EN; + I915_WRITE(DPFC_CONTROL, dpfc_ctl); +- +- DRM_DEBUG_KMS("disabled FBC\n"); + } + } + +@@ -1631,8 +1622,6 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) + I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); + sandybridge_blit_fbc_update(dev); + } +- +- DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); + } + + static void ironlake_disable_fbc(struct drm_device *dev) +@@ -1645,8 +1634,6 @@ static void ironlake_disable_fbc(struct drm_device *dev) + if (dpfc_ctl & DPFC_CTL_EN) { + dpfc_ctl &= ~DPFC_CTL_EN; + I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl); +- +- DRM_DEBUG_KMS("disabled FBC\n"); + } + } + +@@ -1701,8 +1688,6 @@ static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv) + if (dev_priv->fbc_work == NULL) + return; + +- DRM_DEBUG_KMS("cancelling pending FBC enable\n"); +- + /* Synchronisation is provided by struct_mutex and checking of + * dev_priv->fbc_work, so we can perform the cancellation + * entirely asynchronously. +@@ -1743,8 +1728,6 @@ static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) + + dev_priv->fbc_work = work; + +- DRM_DEBUG_KMS("scheduling delayed FBC enable\n"); +- + /* Delay the actual enabling to let pageflipping cease and the + * display to settle before starting the compression. Note that + * this delay also serves a second purpose: it allows for a +@@ -1800,8 +1783,6 @@ static void intel_update_fbc(struct drm_device *dev) + struct drm_i915_gem_object *obj; + int enable_fbc; + +- DRM_DEBUG_KMS("\n"); +- + if (!i915_powersave) + return; + +-- +1.7.6 + |
