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<?xml version="1.0" encoding="UTF-8"?>
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: DDR3_DRAM_ABSTRACT.xml $ -->
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- Contributors Listed Below - COPYRIGHT 2014 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
<!-- you may not use this file except in compliance with the License. -->
<!-- You may obtain a copy of the License at -->
<!-- -->
<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
<!-- -->
<!-- Unless required by applicable law or agreed to in writing, software -->
<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
<!-- implied. See the License for the specific language governing -->
<!-- permissions and limitations under the License. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<!-- $Header: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/systems/pegasus/xml/parts/DDR3_DRAM_ABSTRACT.xml,v 1.1 2012-02-07 20:15:26 njames Exp $ -->
<parts xmlns:xi="http://www.w3.org/2001/XInclude"
xmlns:mrw="http://w3.ibm.com/stg/power-firmware/schema/mrw"
xmlns="http://w3.ibm.com/stg/power-firmware/schema/mrw"
>
<part>
<id>DDR3_DRAM_ABSTRACT</id>
<part-class>chip</part-class>
<part-type>dram</part-type>
<units>
<ddr-slave-units>
<ddr-slave-unit>
<id>DDR_INTERFACE</id>
<pin-name>ddr_addr</pin-name>
</ddr-slave-unit>
</ddr-slave-units>
<power-units>
<power-unit>
<id>VDD</id>
<pin-name>VDD</pin-name>
<voltage voltage-units="Volts">1.35</voltage>
<current-nom current-units="Amps">lookup</current-nom>
<current-max current-units="Amps">lookup</current-max>
</power-unit>
</power-units>
</units>
</part>
</parts>
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