Usually, a location code shows the card hierarchy in the system, which each level of plug giving a segment in the full location code. The absolute attribute controls if that segment is part of the full location code or not, and can also be used for cases, typically fans and power supplies, that don't obey the hierarchy. absolute="yes": Don't use the location code segments in the previous hierarchy while making this location code. For example, for a fan, with location absolute="yes" and value A1 the location code would be Ufcs-A1, even if it was plugged on a card with a P1 location code If it didn't say absolute="yes", the location code would be Ufcs-P1-A1. absolute="ignore". Ignore this card's contribution to the location code hierarchy. For example on the Laramie-0/Wyoming-0/Pryor-0 plugging hierarchy, the wyoming has absolute="ignore", which gives a location code for the pryor to be Ufcs-P1-C8, where the P1 is from the Laramie and the C8 is from the pryor, without a contribution from the wyoming. This page is generated automatically from the MRW schema files. Any updates or corrections must be done in the schema files. An endpoint address, or a register address. An alias name to refer to an element. A reference to a specific assembly element. Cache associativity. A bitmask value Bit(s) of i2c port expander which is part of the secondary pgood checks, can be multiple of these. The blink rate in Hertz, like 0, 2, etc, or empty. TBD............................ Bus width, in bytes. Defines the CAPI setting of a unit. A reference to a card. A cache size. A cache line size. A cache block size. The human-readable card type, such as planar, dimm, etc. The four hex-digit CCIN value. The CFAM ID number/name. Defines a CFAM unit. The CFAM units in this part. The channel number of a DDR unit. Denotes when to check PGOOD during PSEQ. Defines a connection-point's child in an assembly plug hierarchy. A reference to a chiplet. The cmfsi number of an FSI cascade master unit. Defines the color of an LED. What this configuration is determined by, such as an MTM. The value for the configuration-type, such as the actual MTM value. A reference to a connector. A reference to a connector instance. Says this is the last segment of this bus and it has an endpoint that is a connector instead of a part. Describes the contents of a particular part, when applicable. The core processor type, such as "PowerPC440". The maximum current of a part. The nominal current of a part. Number of data TLB entries N way associativity for the data TLB Contains the default value that should be set in the GPIO. A human-readable description of the containing element. Defines an /dev/aio_brk unit. Defines a set of /dev/aio_brk units. Defines an /dev/dd_ffdc_all unit. Defines a set of /dev/dd_ffdc_all units. Defines an /dev/dd_ffdc_all unit. Defines a set of /dev/dd_ffdc_all units. Defines an /dev/dd_ffdc_driver unit. Defines a set of /dev/dd_ffdc_driver units. Defines an /dev/dd_ffdc_process unit. Defines a set of /dev/dd_ffdc_process units. Defines an /dev/dd_ffdc_thread unit. Defines a set of /dev/dd_ffdc_thread units. Defines an /dev/dma unit. Defines a set of /dev/dma units. Defines an /dev/iomux unit. Defines a set of /dev/iomux units. Defines an /dev/jtag-irq unit. Defines a set of /dev/jtag-irq units. Defines an /dev/mbx unit. Defines a set of /dev/mbx units. Defines an /dev/mbx/host unit. Defines a set of /dev/mbx/host units. Defines an internal FSP /dev mem unit Defines a set of FSP /dev mem units Defines an internal FSP /dev misc unit Defines a set of FSP /dev misc units Defines an internal FSP /dev mmc unit Defines a set of FSP /dev mmc units Defines an internal FSP /dev rtc unit Defines a set of FSP /dev rtc units Defines an internal FSP /dev mmc-host unit Defines a set of FSP /dev mmc-host units Defines an internal FSP /dev mtd unit Defines a set of FSP /dev mtd units Defines an internal FSP /dev mtdblock unit Defines a set of FSP /dev mtdblock units Defines an internal FSP /dev scp unit Defines a set of FSP /dev scp units Defines an internal FSP /dev tone unit Defines a set of FSP /dev tone units Defines an internal FSP /dev uart unit Defines a set of FSP /dev uart units The device ID of a PCIe card. A DIO number. Defines a DIO Defines a set of dio configs Specifies an IN or OUT direction. The downstream n_/p_ lane swap values for powerbus and DMI bus links. It's a bitmask where if the bit is set then the corresponding lane is swapped. Bit 31 is tx_clk_invert. Defines the amount of memory in a DRAM module. Defines the type of a DRAM (memory) module. A GPIO's driver type The engineering change (EC) level of a hardware part. This is only needed when different levels are functionally different and the system being defined requires a specific level. Defines whether or not the containing element can be an ecmd target. The engineering change (EC) level at which a hardware part for a particular CCIN is to operate. Defines the enable-power units Defines a set of enable-power units. Defines a enable unit Defines a enable master unit Defines a set of enable units Defines a set of enable master-units Defines the enclosure/drawer type of a platform. Defines an engine number. Defines an internal CFAM engine unit Defines a set of CFAM engines Defines an ethernet unit Defines a set of ethernet units The external ID for an entity. What to do upon a PGOOD fault. An I2C address. Defines the host interface to the flash module. Defines the amount of space in a flash module. Defines the technology type of a flash module. Defines the frequency of a hardware part. The function of an LED indicator or GPIO pin, etc. Defines a GPIO unit. The identification string for the containing entity. To support varying cable configuration for different node configurations, this element defines what set of configurations the containing element is applicable for. ID of a secondary pgood I/O expander. Number of instruction TLB entries N way associativity for the instruction TLB Specifies the PCIE IOP instance number in the processor chip. Is the entity on standby power. Defines an LED rollups for a card or part. Defines a set of LED rollups. The ID of an FSI link. The location code for the containing entity. The location code for the containing entity. Indicates whether the power thermal location is to be enforced. If the processor has a logically unified L1 instruction and data cache i.e. the DMI_REFCLOCK_SWIZZLE. The bit number to set in the refclock enable field of the FSI GP8 register in P8 to enable the refclock to this DMI bus. The four hex-digit MRU ID instance number. The MRU type of this card/part. This overrides the default mapping based on card-type/part-type that is normally correct. The mux group number of the containing unit. The mux select numeric value of the containing unit. The name of an entity n/a Defines the amount of memory in a NVRAM module. TBD............................ The function of an LED when it is off. Defines a connection-point's child in an assembly plug hierarchy. Defines the class of a part, such as chip, sp, etc. A reference to an associated/target part. A reference to a part instance. The hardware part number. The hardware part type, such as seeprom, io, etc. Defines the power characteristics of a PCIe card in a system. The cooling type of a PCIe card. The default cooling type of a PCIe card. Defines the power characteristics of PCIe cards in a system. Specified is the containing entry is on a per-cpu basis Identifies a PCI Host Bridge (PHB) in a PCI-E unit. If the processor has a physically unified L1 instruction and data cache The name of a pin. A pin "number", which may include characters as well (e.g. "H27"). Defines a port number. Defines the position of a plug. Defines an internal FSP ppp unit Defines a set of FSP ppp units Defines the power consumption of a hardware part. Defines the default power consumption of a hardware part. The processor family, such as "IBM Power8". TLB reservation size The target location code of an LED to be rolled up from this card/part's LED. This may be an explicit location code string or it may contain special pattern strings: Ux = substitute the assembly's location code Ux-Px = substitute the card's location code within this assembly Defines a set of LED rollup target location codes The replaceable unit type. This is cru, fru, mru, or the card-id of the card acting as the FRU in the case of combined card FRUs. Specifies if the RX MSB and LSB are swapped along this segment of the bus. Specifies if the TX MSB and LSB are swapped along this segment of the bus. The number of bytes a SEEPROM device requires to set its internal address/offset. The size of the SEEPROM memory in KB. The SEEPROM write-page boundary in bytes. A reference to a selection group. Defines a slot number. Defines the first PCIE lane in a pcie-root-unit. Can be either 0 or 8. Defines a sub-type, when necessary If the processor has a split TLB organization The subsystem device ID of a PCIe card. The subsystem vendor ID of a PCIe card. If the processor supports the tlbia instruction If the processor CPU has a performance monitor If the processor supports the instructions stfiwx/fres/frsqrte/fsel If the processor support an external control facility If the processor support bridge facilities The human-readable system type, such as apollo, pegasus, etc. The FRU type for thermal sensors. In a LED rollup, identifies the card's or part's location code. This is optional and it is generally not required. The implicit value is "the location code of the card/part with the specified ID". It would only be provided if there is an exception case where most of the cards/parts rollup in the same way, but some specific instance of the card/part in this assembly rolls up differently The name of a chiplet target. The number of threads per core in the processor. A human-readable title string for a containing entity. This can be thought of as an extension of the id element which may be added for readability. A power bus type. The name of a hardware unit. A unit type A unit ID The upstream n_/p_ lane swap values for powerbus and DMI bus links. It's a bitmask where if the bit is set then the corresponding lane is swapped. Bit 31 is tx_clk_invert. The value associated with containing element. The vendor ID of a PCIe card. A reference to a virtual connector. The angle from which an LED is visible. Specifies if the LED angle of view is front. Specifies if the LED angle of view is internal. Specifies if the LED angle of view is rear. Encodes the size of a VPD chip. Number after the 'c' is the size in kbits. Defines the voltage of a hardware part. Defines the output voltage of a part Defines the VRM for a power rail. Defines the width of a PCI-E endpoint. Defines a connection to a Analog to Digital Converter Defines the the ADC busses Defines an adc unit. Defines a set of adc units. Defines the set of plug assemblies for a system. This is the "assembly manifest" for this system. It lists the specific assemblies (aka "enclosures") included in this system config, with the position in which they are used. It lists each assembly by name, referring to the assemblies section for details about the assembly topologies. Defines a plug assembly for a system. A reference to an assembly used within a system. Defines the set of busses in a card. Defines a card in a system. Defines the set of cards available to a system. Defines a card actually used in a system, along with the data that may be unique to that system's usage of the card such as EC level, replaceable unit type, etc. Defines the set of cards actually used in a system. Defines the CCIN of a hardware part. Defines a chiplet. Defines a set of chiplets. Defines a set of CCINs. Defines an CFSI bus. Defines the CFSI busses. Defines a clock bus. Defines the set of clock busses available to a system. Contains entries that make up a specific configuration Defines a set of configuration specific settings Contains 1 specific configuration data entry. Contains a list of configuration entries. Defines the characteristics of a connection point for an assembly plug. Defines the characteristics of a connector. Maps actual to virtual connector in a selection group. Defines an instance of a connector. Defines the set of instanced of connectors in the containing entity. Maps actual to virtual connectors in a selection group. This is a reference to a connector used in the containing elements. Defines a cooling zone of the containing entity. Defines the cooling zones of the containing entity. Defines an 8-bit bitmask that lists which cooling zones something belongs in. Each bit represents a cooling zone where the lsb is for zone 1. Defines a fan zone management in the containing entity. Defines fan zone managements for the containing entity. Defines the processor cores in the containing entity. Contains CPU attributes needed by the OS Contains attributes of the L1 data cache Defines a DDR bus. Defines the DDR busses. Defines a DDR master unit. Defines a set of DDR master units. Defines a DDR slave unit. Defines a set of DDR slave units. Defines a DDR unit. Defines a set of DDR units. Defines a DIO unit. Defines a set of DIO units. Defines a DMI bus. Defines the DMI busses. Defines a DMI master unit. Defines a set of dmi-master-units. Defines a DMI slave unit. Defines a set of dmi-slave-units. Defines a DRAM (memory) unit in the containing part. Defines the set of DRAM (memory) units in the containing part. Defines the index of duplication for parts that are split into more than 1 part definition. Necessary for ServerWiz to find the correct part definition. Defines the endpoint of a bus. Defines the units that represent error indicators Defines a set of error units. Defines an Ethernet bus. Defines the Ethernet busses. Defines an EX (core) unit. Defines a set of EX (core) units. Defines information about a fan in the containing entity. Defines the fan information for the containing entity. Defines an fan controller unit. Defines a set of fan controller units. Defines the flash storage internal unit within a part. Defines the set of flash storage internal units within a part. Defines an FSI bus. Defines the FSI busses. Defines an FSI cascade master unit. Defines a set of cascade FSI master units. Defines an FSI master unit. Defines a set of FSI master units. Defines an FSI slave unit. Defines a set of FSI slave units. Defines a GPIO bus. Defines the GPIO busses. Defines a GPIO master-unit. Defines a set of GPIO master units. Defines a GPIO slave unit. Defines a set of GPIO units. Defines a GPIO unit. Defines a set of GPIO units. Defines a GX bus. Defines the GX busses. Index into the HX VPD keyword this link uses, if applicable. Usually used for ITE Mezzanine cards. Defines an I2C bus. Defines the I2C busses. Defines an I2C master unit. Defines a set of I2C master units. Defines an I2C slave unit. Defines a set of I2C slave units. Describes an IM Keyword and value for an MTM Describes a list of IM Keywords and values for MTMs Defines a reference to an IM keyword. Defines a set of IM keyword IDs. Contains attributes of the L1 instruction cache Contains internal attributes. (internal means serverwiz ignores them) Defines the internal units within a part. These are units which do not represent connections to other hardware. Defines the jtag-master unit characteristics of a part. Defines a set of jtag-master units. Contains attributes of the L2 cache Contains attributes of the L3 cache Defines the layout characteristics of a system Defines a LED unit. Defines a set of LED units. Defines an LED bus. Defines the LED busses. Defines a LED driver unit. Defines a set of LED driver units. Defines a virtual connection between an LED and the FRU/part that it is an indicator for. Defines a set of ledgroup virtual busses An led-group-unit is used to define the logical association between an LED and what FRU it is an indicator for. It is not a physical connection. Defines the set of LED group units The same as led-group-unit. The same as led-group-units. Defines an LPC bus. Defines an LPC *master* unit. Defines a set of LPC *master* units. Defines an net-emac unit. Defines a set of net-emac units. Defines an net-mbx unit. Defines a set of net-mbx units. Defines an LPC slave unit. Defines a set of LPC slave units. Defines the LPC busses. IOMUX Voltage Mode Control Value, ie the MC value. Describes a Machine Type Model Describes a list of Machine Type Models A supported Machine Type Model Describes a list of supported Machine Type Models Defines the number of good cores in a processor Defines number of current phases Defines a non-volatile RAM unit in the containing part. Defines the set of non-volatile RAM units in the containing part. Defines the characteristics/contents of a type of hardware part. These are "black-box" parts that we just represent the interface(s) to (e.g. chips). The set of parts enumerated may or may not be present in this system. This is one of a "bucket of parts" from which many different system types may be built. Defines an instance of a hardware part. Defines the set of instances of parts in the containing entity. This is a reference to a part used in the containing elements. Defines a set of parts for a system. This is the "parts manifest" for this layout. It lists the parts actually used, referring to part elements in the parts section without duplicating any information. The only additional information included for parts here is information which may vary from system-to-system for the same part, such as the EC level and replaceable unit category. Defines a PCI-E bus. PCIE max-virtual-functions attribute. PCIE MSI attribute. PCIE slot index. If slot is CAPI enabled If the slot is hot plug enabled If slot is DSMP (Distributed SMP) enabled If the endpoint is a physical pci slot PCI card size. PCI generation the PCIE lane swap value Size of the 64b DMA window Size of the 32b MMIO window Size of the 64b MMIO window The 3 bit PCIE lane swap value. The 3 bit PCIE lane reversal value. If slot is LSI enabled Size of the 32b DMA window PCI bus width Defines the PCI-E busses. Defines a endpoint of a PCI-E unit. Defines a set of endpoints of a PCI-E unit. Defines an internal PCIE PHB unit. Defines a set of PCIE PHB units Defines a PCI-E root unit. Defines a set of PCI-E root units. Defines a PCI-E downstream bridge unit. This is the unit on a PCIE switch that connects dopwnstream to an endpoint. Defines a set of PCI-E downstream bridge units. Defines a PCI-E upstream bridge unit. This is the unit on a PCIE switch that connects upstream to the master pci-root. Defines a set of PCI-E upstream bridge units. Defines a LED driver unit. Defines a set of LED driver units. The ID of the PGOOD this secondary pgood utilizes. Defines a power good unit Defines a set of pgood units Indicates whether the card is pluggable at standby. Defines a plug in an assembly. Defines cabling scheme. A list of card instances from the cabling diagram. A single card instance from the cabling diagram. Defines a single cable connection. Indicates the type of cable represented by the containing element. Binary identification code for this cable. Indicates a virtual or real object. The identification for the source card instance of a cable. The identification for the connector instance within the source card of a cable. The instance of the source connector from the source card. The identification for the target card instance of a cable. The identification for the connector instance within the target card of a cable. The instance of the target connector from the target card. Indicates positive or negative polarity of something. The Power On Reset value Defines the power connection/bus Defines a set of power connections The power efficiency rating of a part. Defines a power rail. Defines a set of power rails. Defines the power unit characteristics of a part. Defines a set of power units. Defines the power input unit characteristics of a part. Defines a set of power input units. Defines the power output unit characteristics of a part. Defines a set of power input units. Defines the power sequencing unit characteristics of a part. Defines a set of power sequencing units. Defines a power bus. Defines the power busses. Defines a power bus unit. Defines a power bus units. Defines a bus used for presence detect Defines a set of presence detect busses Defines an endpoint unit of a presence detect line. Defines a set of presence detect units Defines a presence detect master unit. (a gpio) Defines a set of presence detect master units. Defines a PSI bus. Defines the PSI busses. Defines a PWM bus. Defines the PWM busses. Defines the PSI master unit characteristics of a part. Defines a set of PSI master units. Defines the PSI unit characteristics of a part. Defines a set of PSI units. Defines the pwm-dac unit characteristics of a part. Defines a set of pwm-dac units. Defines the pwm-master unit characteristics of a part. Defines a set of pwm-master units. Defines the pwm-slave unit characteristics of a part. Defines a set of pwm-slave units. Defines the ref-clockin unit characteristics of a part. Defines a set of ref-clockin units. Defines an I2C slave unit. Defines a set of reference clock source units Defines a chip register Defines a set of chip registers Defines a resistance value Identifies a variations to which a part-instance is restricted. Defines a s16550 bus Defines a set of s16550 busses Defines an s16550 master unit. Defines a set of s16550 master units. Defines a SAS bus. Defines the SAS busses. Defines a SAS device unit. Defines a set of SAS device units. Defines a SAS master unit. Defines a set of SAS master units. Defines the SAS unit characteristics of a part. Defines a set of SAS units. Defines smartchip bus Defines a set of smartchip busses Defines a smartchip slave unit. Defines a set of smartchip slave units. Defines a smartchip master unit. Defines a set of smartchip master units. Defines a secondary PGOOD unit Defines a set of secondary PGOOD units. Defines a group of related cards from which a particular one may be configured. Defines a used group of related cards from which a particular one may be configured. Defines the set of selection groups used in the containing element. Selection groups represent groups of cards that can plug into the same slot. Defines a sink for a power rail. Defines the source of a bus. Defines the spcn-master unit characteristics of a part. Defines a set of spcn-master units. The speed of a part or bus, in MHz. Defines a SPI bus. Defines the SPI busses. Defines a SPCN uart bus. Defines the SPCN uart busses Defines the spi-master unit characteristics of a part. Defines a set of spi-master units. Defines the spi-slave unit characteristics of a part. Defines a set of spi-slave units. Defines the 'station' parameter number of a PCIE switch. Defines a DIO bus used to connect to a tachometer Defines a set of tach busses Defines the tach-master unit characteristics of a part. Defines a set of tach-master units. Defines the tach-slave unit characteristics of a part. Defines a set of tach-slave units. Defines the thermal properties of listed MTMs. Defines the thermal properties of the specified MTM. The type of entity for which these properties apply. The ID (name, not the external-id) of the MTM for which these properties apply. Defines the thermal properties of the containing entity. Defines a wire used to connect to a speaker. Defines a set of tone wires Defines the tone unit characteristics of a part. Defines a set of tone units. Defines a uart bus Defines a set of uart busses Defines the uart-slave unit characteristics of a part. Defines a set of uart-slave units. Defines the units within a part. Defines a USB bus Defines a set of USB busses Defines the usb device unit characteristics of a part. Defines a set of USB device units. Defines the usb-slave unit characteristics of a part. Defines a set of USB master units. Field or lab-only use of a part. If the bus should be used for FRU presence detect. In the case of I2c, it is via data line sensing. Defines a variation which can each be referenced by ID in other elements. Defines a set of variations which can each be referenced by ID in other elements. Defines the version of a chip, bus, standard, etc. Defines a connector within a selection group. Defines a set of connectors within a selection group. The name of an HTML file containing supplemental documentation to be included in the generated workbook. Defines the XFI bus Defines a set of XFI master units. An XFI (ethernet) device unit Defines a set of XFI device units. Defines the XFI master unit characteristics of a part. Defines a set of XFI master units. Defines the characteristics of a system. This is the top-level element of a Machine Readable Workbook.