From 7de45b93c898a691cd86010faff78a550a4ec783 Mon Sep 17 00:00:00 2001
From: Mike Baiocchi <baiocchi@us.ibm.com>
Date: Tue, 16 Dec 2014 09:43:36 -0600
Subject: These changes fix the parsing of the Processor PCIE busses

Specifically, the PROC_PCIE_LANE_MASK_NON_BIFURCATED attribute, and
related attributes, are now being handled properly.
---
 OPNPWR_VENICE.xml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'OPNPWR_VENICE.xml')

diff --git a/OPNPWR_VENICE.xml b/OPNPWR_VENICE.xml
index 659d32a..597763e 100644
--- a/OPNPWR_VENICE.xml
+++ b/OPNPWR_VENICE.xml
@@ -157,7 +157,8 @@
 		<pcie-root-units>
 			<pcie-root-unit><id>PCIE_IOP0</id><iop>0</iop><starting-lane>0</starting-lane></pcie-root-unit>   <!-- IOP 0 is x16, or 2 x8s -->
 			<pcie-root-unit><id>PCIE_IOP0_1</id><iop>0</iop><starting-lane>8</starting-lane></pcie-root-unit> <!-- if IOP 0 is bifucated into 2 x8s, use this -->
-			<pcie-root-unit><id>PCIE_IOP1</id><iop>1</iop><starting-lane>0</starting-lane></pcie-root-unit>   <!-- IOP 1 is x8 -->
+			<pcie-root-unit><id>PCIE_IOP1</id><iop>1</iop><starting-lane>0</starting-lane></pcie-root-unit>   <!-- IOP 1 is x16, or 2 x8s -->
+			<pcie-root-unit><id>PCIE_IOP1_1</id><iop>1</iop><starting-lane>8</starting-lane></pcie-root-unit> <!-- if IOP 1 is bifucated into 2 x8s, use this -->
 		</pcie-root-units>			
 
 			
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