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| author | Patrick Williams <williamspatrick@gmail.com> | 2014-12-16 09:55:14 -0600 |
|---|---|---|
| committer | Patrick Williams <williamspatrick@gmail.com> | 2014-12-16 09:55:14 -0600 |
| commit | dc15d115bffca490e96a440195fca2c90920b3ca (patch) | |
| tree | 962324fba15f60ceb201e75ff676a4f7138acd67 /OPNPWR_VENICE.xml | |
| parent | e02b6f6ddd5f225ddb70c286a10685df5b9267db (diff) | |
| parent | 7de45b93c898a691cd86010faff78a550a4ec783 (diff) | |
| download | common-op-xml-dc15d115bffca490e96a440195fca2c90920b3ca.tar.gz common-op-xml-dc15d115bffca490e96a440195fca2c90920b3ca.zip | |
These changes fix the parsing of the Processor PCIE busses
Diffstat (limited to 'OPNPWR_VENICE.xml')
| -rw-r--r-- | OPNPWR_VENICE.xml | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/OPNPWR_VENICE.xml b/OPNPWR_VENICE.xml index 659d32a..597763e 100644 --- a/OPNPWR_VENICE.xml +++ b/OPNPWR_VENICE.xml @@ -157,7 +157,8 @@ <pcie-root-units>
<pcie-root-unit><id>PCIE_IOP0</id><iop>0</iop><starting-lane>0</starting-lane></pcie-root-unit> <!-- IOP 0 is x16, or 2 x8s -->
<pcie-root-unit><id>PCIE_IOP0_1</id><iop>0</iop><starting-lane>8</starting-lane></pcie-root-unit> <!-- if IOP 0 is bifucated into 2 x8s, use this -->
- <pcie-root-unit><id>PCIE_IOP1</id><iop>1</iop><starting-lane>0</starting-lane></pcie-root-unit> <!-- IOP 1 is x8 -->
+ <pcie-root-unit><id>PCIE_IOP1</id><iop>1</iop><starting-lane>0</starting-lane></pcie-root-unit> <!-- IOP 1 is x16, or 2 x8s -->
+ <pcie-root-unit><id>PCIE_IOP1_1</id><iop>1</iop><starting-lane>8</starting-lane></pcie-root-unit> <!-- if IOP 1 is bifucated into 2 x8s, use this -->
</pcie-root-units>
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