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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-06-06 14:49:19 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2018-06-06 14:49:19 +1000
commit98d365ba53fa61531befe68bbf74db676405f7f7 (patch)
tree9456b0ed4423fab4e34f8469e883ab0e46cb3970
parent32260a89442b6e0cc07fab598ad767bad861f065 (diff)
downloadcf-fsi-98d365ba53fa61531befe68bbf74db676405f7f7.tar.gz
cf-fsi-98d365ba53fa61531befe68bbf74db676405f7f7.zip
Cleanup GPIO config
-rw-r--r--cf-code/cf-fsi-fw.S16
1 files changed, 11 insertions, 5 deletions
diff --git a/cf-code/cf-fsi-fw.S b/cf-code/cf-fsi-fw.S
index 60affc7..4cabaf1 100644
--- a/cf-code/cf-fsi-fw.S
+++ b/cf-code/cf-fsi-fw.S
@@ -170,19 +170,27 @@ _start:
/* Store clock bit number */
moveq.l #CLOCK_GPIO_BIT,%d5
- /* Load GPIO values into caches and Configure clock & data GPIO as output */
+ /* Load GPIO values into caches and set initial values */
move.l %a5@(0),%DCLK
move.l %a4@(0),%DDAT
+ move.l %a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG),%DTRA
bset.l #CLOCK_GPIO_BIT,%DCLK
bset.l #DATA_GPIO_BIT,%DDAT
- move.l %DCLK, %a5@(0)
- move.l %DDAT, %a4@(0)
+ bset.l #TRANS_GPIO_BIT,%DTRA
+ move.l %DCLK,%a5@(0)
+ move.l %DDAT,%a4@(0)
+ move.l %DTRA,%a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG)
+
+ /* Configure all GPIOs as output */
move.l %a5@(4),%d0
bset.l #CLOCK_GPIO_BIT,%d0
move.l %d0,%a5@(4)
move.l %a4@(4),%d0
bset.l #DATA_GPIO_BIT,%d0
move.l %d0,%a4@(4)
+ move.l %DTRA,%a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG+4)
+ bset.l #TRANS_GPIO_BIT,%d0
+ move.l %DTRA,%a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG+4)
/* Initialize A6 to point to command area */
lea %a1@(CMD_DATA),%a6
@@ -475,14 +483,12 @@ config_gpio_out:
move.l %d0,%a4@(4)
/* Set transceivers to output */
- move.l %a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG),%DTRA
bset.l #TRANS_GPIO_BIT,%DTRA
move.l %DTRA,%a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG)
rts
config_gpio_in:
/* Set transceiver to input */
- move.l %a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG),%DTRA
bclr.l #TRANS_GPIO_BIT,%DTRA
move.l %DTRA,%a5@(TRANS_GPIO_REG-CLOCK_GPIO_REG)
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