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author | Spenser Gilliland <spenser@gillilanding.com> | 2013-07-15 16:44:19 -0500 |
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committer | Peter Korsgaard <jacmet@sunsite.dk> | 2013-07-16 00:28:15 +0200 |
commit | 7fdcf8e897c5b095eda10cbae6def00dd27f3666 (patch) | |
tree | db37b38f7f74ced0bfa6fa7301d195cb49a10043 /package/ti-gfx/ti-gfx-newclkapi.patch | |
parent | 61900d9245806ce1387fac730a5fd926bf032443 (diff) | |
download | buildroot-7fdcf8e897c5b095eda10cbae6def00dd27f3666.tar.gz buildroot-7fdcf8e897c5b095eda10cbae6def00dd27f3666.zip |
ti-gfx: add new package
adds accelerated GPU support for the OMAP35xx, AM35xx, AM37xx, DM37xx,
AM387x, DM814x, AM389x, DM816x, and AM335x platforms.
[Peter: fix .pc files install]
Signed-off-by: Spenser Gilliland <spenser@gillilanding.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sundareson, Prabindh <prabu@ti.com>
Cc: Peter Korsgaard <jacmet@uclibc.org>
Cc: Sinan Akpolat <sinan@linkas.com.tr>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'package/ti-gfx/ti-gfx-newclkapi.patch')
-rw-r--r-- | package/ti-gfx/ti-gfx-newclkapi.patch | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/package/ti-gfx/ti-gfx-newclkapi.patch b/package/ti-gfx/ti-gfx-newclkapi.patch new file mode 100644 index 0000000000..8f50c7ee12 --- /dev/null +++ b/package/ti-gfx/ti-gfx-newclkapi.patch @@ -0,0 +1,143 @@ +This patch adjusts the omap3630 portion of the powervr driver to use the new +clk kernel api. + +Signed-off-by: Spenser Gilliland <spenser@gillilanding.com> +---- +Index: ti-gfx-4_09_00_01/GFX_Linux_KM/services4/system/omap3630/sysutils_linux.c +=================================================================== +--- ti-gfx-4_09_00_01.orig/GFX_Linux_KM/services4/system/omap3630/sysutils_linux.c 2013-06-28 13:44:06.352701522 -0500 ++++ ti-gfx-4_09_00_01/GFX_Linux_KM/services4/system/omap3630/sysutils_linux.c 2013-06-28 13:45:12.364702727 -0500 +@@ -153,6 +153,49 @@ + psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS; + } + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) ++int clk_disable_unprepare(struct clk *clk) ++{ ++ return clk_disable(clk); ++} ++#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) ++int clk_disable_unprepare(struct clk *clk) ++{ ++ res = clk_disable(clk); ++ if (res < 0) ++ return res; ++ ++ res = clk_unprepare(clk); ++ if (ret < 0) ++ return res; ++ ++ return 0; ++} ++#endif ++ ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) ++int clk_prepare_enable(struct clk *clk) ++{ ++ return clk_enable(clk); ++} ++#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) ++int clk_prepare_enable(struct clk *clk) ++{ ++ res = clk_prepare(clk); ++ if (ret < 0) ++ return res; ++ ++ res = clk_enable(clk); ++ if (res < 0) { ++ clk_unprepare(clk); ++ return res; ++ } ++ ++ return 0; ++} ++#endif ++ + PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData) + { + #if !defined(NO_HARDWARE) +@@ -167,19 +210,19 @@ + + PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks")); + +- res=clk_enable(psSysSpecData->psSGX_FCK); ++ res=clk_prepare_enable(psSysSpecData->psSGX_FCK); + if (res < 0) + { + PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res)); + return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK; + } + +- res=clk_enable(psSysSpecData->psSGX_ICK); ++ res=clk_prepare_enable(psSysSpecData->psSGX_ICK); + if (res < 0) + { + PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res)); + +- clk_disable(psSysSpecData->psSGX_FCK); ++ clk_disable_unprepare(psSysSpecData->psSGX_FCK); + return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK; + } + +@@ -233,7 +276,6 @@ + return PVRSRV_OK; + } + +- + IMG_VOID DisableSGXClocks(SYS_DATA *psSysData) + { + #if !defined(NO_HARDWARE) +@@ -246,9 +288,9 @@ + + PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks")); + +- clk_disable(psSysSpecData->psSGX_FCK); ++ clk_disable_unprepare(psSysSpecData->psSGX_FCK); + +- clk_disable(psSysSpecData->psSGX_ICK); ++ clk_disable_unprepare(psSysSpecData->psSGX_ICK); + + // SysDisableSGXInterrupts(psSysData); + +@@ -374,14 +416,14 @@ + rate = clk_get_rate(psSysSpecData->psGPT11_FCK); + PVR_TRACE(("GPTIMER11 clock is %dMHz", HZ_TO_MHZ(rate))); + +- res = clk_enable(psSysSpecData->psGPT11_FCK); ++ res = clk_prepare_enable(psSysSpecData->psGPT11_FCK); + if (res < 0) + { + PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 functional clock (%d)", res)); + goto ExitError; + } + +- res = clk_enable(psSysSpecData->psGPT11_ICK); ++ res = clk_prepare_enable(psSysSpecData->psGPT11_ICK); + if (res < 0) + { + PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 interface clock (%d)", res)); +@@ -444,9 +486,9 @@ + + ExitDisableGPT11ICK: + #if defined(PVR_OMAP3_TIMING_PRCM) +- clk_disable(psSysSpecData->psGPT11_ICK); ++ clk_disable_unprepare(psSysSpecData->psGPT11_ICK); + ExitDisableGPT11FCK: +- clk_disable(psSysSpecData->psGPT11_FCK); ++ clk_disable_unprepare(psSysSpecData->psGPT11_FCK); + ExitError: + #endif + eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED; +@@ -490,9 +532,9 @@ + #endif + + #if defined(PVR_OMAP3_TIMING_PRCM) +- clk_disable(psSysSpecData->psGPT11_ICK); ++ clk_disable_unprepare(psSysSpecData->psGPT11_ICK); + +- clk_disable(psSysSpecData->psGPT11_FCK); ++ clk_disable_unprepare(psSysSpecData->psGPT11_FCK); + #endif + } + #endif |