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| author | Vicente Olivert Riera <Vincent.Riera@imgtec.com> | 2017-06-28 16:17:10 +0100 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2017-07-16 16:35:39 +0200 |
| commit | 2d8f3fc430fe4f16c570097cf3dc33aa78ccb702 (patch) | |
| tree | 46a8e021c6cbabd259a1d49e7a39981940809826 /arch | |
| parent | 14645274a4ee91704a9585e3285ec578337b40c0 (diff) | |
| download | buildroot-2d8f3fc430fe4f16c570097cf3dc33aa78ccb702.tar.gz buildroot-2d8f3fc430fe4f16c570097cf3dc33aa78ccb702.zip | |
arch/mips: add support for MIPS NaN
MIPS supports two different NaN encodings, legacy and 2008. Information
about MIPS NaN encodings can be found here:
https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
NaN legacy is the only option available for R2 cores and older.
NaN 2008 is the only option available for R6 cores.
R5 cores can have either NaN legacy or NaN 2008, depending on the
implementation. So, if the user selects a generic R5 target architecture
variant, we show a choice menu with both options available. For well
known R5 cores we directly select the NaN enconding they use.
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Config.in | 3 | ||||
| -rw-r--r-- | arch/Config.in.mips | 35 |
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/Config.in b/arch/Config.in index 50377a9af8..e921879d01 100644 --- a/arch/Config.in +++ b/arch/Config.in @@ -264,6 +264,9 @@ config BR2_GCC_TARGET_ARCH config BR2_GCC_TARGET_ABI string +config BR2_GCC_TARGET_NAN + string + config BR2_GCC_TARGET_CPU string diff --git a/arch/Config.in.mips b/arch/Config.in.mips index 4e9ad12ad2..ee1b43862b 100644 --- a/arch/Config.in.mips +++ b/arch/Config.in.mips @@ -1,20 +1,26 @@ # mips default CPU ISAs config BR2_MIPS_CPU_MIPS32 bool + select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS32R2 bool + select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS32R5 bool config BR2_MIPS_CPU_MIPS32R6 bool + select BR2_MIPS_NAN_2008 config BR2_MIPS_CPU_MIPS64 bool + select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS64R2 bool + select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS64R5 bool config BR2_MIPS_CPU_MIPS64R6 bool + select BR2_MIPS_NAN_2008 choice prompt "Target Architecture Variant" @@ -51,6 +57,7 @@ config BR2_mips_m5150 bool "M5150" depends on !BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS32R5 + select BR2_MIPS_NAN_2008 config BR2_mips_m6250 bool "M6250" depends on !BR2_ARCH_IS_64 @@ -59,6 +66,7 @@ config BR2_mips_p5600 bool "P5600" depends on !BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS32R5 + select BR2_MIPS_NAN_2008 config BR2_mips_xburst bool "XBurst" depends on !BR2_ARCH_IS_64 @@ -126,6 +134,33 @@ config BR2_MIPS_SOFT_FLOAT floating point functions, then everything will need to be compiled with soft floating point support (-msoft-float). +config BR2_MIPS_NAN_LEGACY + bool + +config BR2_MIPS_NAN_2008 + bool + +choice + prompt "Target NaN" + depends on BR2_mips_32r5 || BR2_mips_64r5 + default BR2_MIPS_ENABLE_NAN_2008 + help + NaN encoding to be used + +config BR2_MIPS_ENABLE_NAN_LEGACY + bool "legacy" + select BR2_MIPS_NAN_LEGACY + +config BR2_MIPS_ENABLE_NAN_2008 + bool "2008" + depends on !BR2_MIPS_SOFT_FLOAT + select BR2_MIPS_NAN_2008 +endchoice + +config BR2_GCC_TARGET_NAN + default "legacy" if BR2_MIPS_NAN_LEGACY + default "2008" if BR2_MIPS_NAN_2008 + config BR2_ARCH default "mips" if BR2_mips default "mipsel" if BR2_mipsel |
