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| author | Yann E. MORIN <yann.morin.1998@free.fr> | 2017-07-09 11:30:00 +0200 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2017-07-22 23:29:24 +0200 |
| commit | 78c2a9f763de82746c9eb688d8e16400eb2c1730 (patch) | |
| tree | 6ff014d21f03cf2eb6876b0c052222af3fae9a94 /arch | |
| parent | e734c633875ae22e2baebe0d8e76d6e10686d804 (diff) | |
| download | buildroot-78c2a9f763de82746c9eb688d8e16400eb2c1730.tar.gz buildroot-78c2a9f763de82746c9eb688d8e16400eb2c1730.zip | |
arch/arm: add big.LITTLE cpu variants
The big.LITTLE configurations can be optimised for by gcc, and a few
users wonder what they should choose when they have such CPUs.
Add new entries for those big.LITTLE configurations.
Note: the various combos were added in various gcc versions, but only
really worked in later versions:
Variant | Introduced in | First built in
----------+---------------+----------------
a15-a7 | 4.9 | 4.9
a17-a7 | 5 | 5
a57-a53 | 4.9 | 6
a72-a53 | 5 | 6
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Thomas De Schampheleire <patrickdepinguin@gmail.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Config.in.arm | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/Config.in.arm b/arch/Config.in.arm index 3cafe21700..09916df7ad 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -182,6 +182,15 @@ config BR2_cortex_a15 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL depends on !BR2_ARCH_IS_64 +config BR2_cortex_a15_a7 + bool "cortex-A15/A7 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_HAS_NEON + select BR2_ARM_CPU_HAS_VFPV4 + select BR2_ARM_CPU_HAS_THUMB2 + select BR2_ARM_CPU_ARMV7A + select BR2_ARCH_HAS_MMU_OPTIONAL + depends on !BR2_ARCH_IS_64 config BR2_cortex_a17 bool "cortex-A17" select BR2_ARM_CPU_HAS_ARM @@ -191,6 +200,15 @@ config BR2_cortex_a17 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL depends on !BR2_ARCH_IS_64 +config BR2_cortex_a17_a7 + bool "cortex-A17/A7 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_HAS_NEON + select BR2_ARM_CPU_HAS_VFPV4 + select BR2_ARM_CPU_HAS_THUMB2 + select BR2_ARM_CPU_ARMV7A + select BR2_ARCH_HAS_MMU_OPTIONAL + depends on !BR2_ARCH_IS_64 config BR2_cortex_a53 bool "cortex-A53" select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 @@ -207,6 +225,14 @@ config BR2_cortex_a57 select BR2_ARM_CPU_HAS_FP_ARMV8 select BR2_ARM_CPU_ARMV8 select BR2_ARCH_HAS_MMU_OPTIONAL +config BR2_cortex_a57_a53 + bool "cortex-A57/A53 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8 + select BR2_ARCH_HAS_MMU_OPTIONAL config BR2_cortex_a72 bool "cortex-A72" select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 @@ -215,6 +241,14 @@ config BR2_cortex_a72 select BR2_ARM_CPU_HAS_FP_ARMV8 select BR2_ARM_CPU_ARMV8 select BR2_ARCH_HAS_MMU_OPTIONAL +config BR2_cortex_a72_a53 + bool "cortex-A72/A53 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8 + select BR2_ARCH_HAS_MMU_OPTIONAL config BR2_cortex_m3 bool "cortex-M3" select BR2_ARM_CPU_HAS_THUMB2 @@ -526,7 +560,9 @@ config BR2_GCC_TARGET_CPU default "cortex-a9" if BR2_cortex_a9 default "cortex-a12" if BR2_cortex_a12 default "cortex-a15" if BR2_cortex_a15 + default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7 default "cortex-a17" if BR2_cortex_a17 + default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7 default "cortex-m3" if BR2_cortex_m3 default "cortex-m4" if BR2_cortex_m4 default "fa526" if BR2_fa526 @@ -536,7 +572,9 @@ config BR2_GCC_TARGET_CPU default "iwmmxt" if BR2_iwmmxt default "cortex-a53" if BR2_cortex_a53 default "cortex-a57" if BR2_cortex_a57 + default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53 default "cortex-a72" if BR2_cortex_a72 + default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53 config BR2_GCC_TARGET_ABI default "aapcs-linux" if BR2_arm || BR2_armeb |
