buildroot/package/gcc, branch 2017.08

toolchain/buildroot: not available for a few mips cores

2017-08-29T21:18:56+00:00

Commit 1b974425 (MIPS: add support for M6201 cores) explained that the new core was not supported by upstream gcc, and as of gcc-8-trunk that's still the case. Ditto for 3cfbeb83 (MIPS: add support for P6600 cores). This means that we currently allow to build an internal tolchain for those cores, yet we have no suitable gcc version. Disable the internal backend in this case. Signed-off-by: "Yann E. MORIN" Cc: Vicente Olivert Riera Cc: Thomas Petazzoni Signed-off-by: Thomas Petazzoni

gcc: bump 7.x series to 7.2.0

2017-08-21T21:30:39+00:00

All patches continue to apply with no changes. 7.2.0 is a bugfix release of the 7.x branch. The only change that is not a simple bump is that the 7.2.0 tarball is now available xz-compressed instead of bz2-compressed. Signed-off-by: Thomas Petazzoni Reviewed-by: Arnout Vandecappelle (Essensium/Mind) Signed-off-by: Thomas Petazzoni

package/gcc: remove legacy leftover for PR60102

2017-08-16T21:14:01+00:00

Commit 2c8de6c4 (gcc 4.9.1: add patch for PR60102) removed the SPE condition becasue of said PR, but forgot to remove the associated comment, which has been tagging along all this time... Remove it, it is no longer valid and causes confusion. Signed-off-by: "Yann E. MORIN" Cc: Thomas Petazzoni Signed-off-by: Thomas Petazzoni

gcc: fix sparcv8 compile issue

2017-08-10T08:23:39+00:00

Fix compile issue with gcc 7.1.0: /tmp/ccxalnSf.s: Assembler messages: /tmp/ccxalnSf.s:12: Error: Architecture mismatch on "rd %tick,%o1". /tmp/ccxalnSf.s:12: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) /tmp/ccxalnSf.s:13: Error: Architecture mismatch on "srlx %o1,32,%o0". /tmp/ccxalnSf.s:13: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) /tmp/ccxalnSf.s:30: Error: Architecture mismatch on "rd %ccr,%g0". /tmp/ccxalnSf.s:30: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) /tmp/ccxalnSf.s:33: Error: Architecture mismatch on "rd %ccr,%g0". /tmp/ccxalnSf.s:33: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) /tmp/ccxalnSf.s:36: Error: Architecture mismatch on "rd %ccr,%g0". /tmp/ccxalnSf.s:36: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) /tmp/ccxalnSf.s:39: Error: Architecture mismatch on "rd %ccr,%g0". /tmp/ccxalnSf.s:39: (Requires v9|v9a|v9b|v9c|v9d|v9e|v9v|v9m|m8; requested architecture is v8.) Makefile:684: recipe for target 'os-unix-sysdep.lo' failed Signed-off-by: Waldemar Brodkorb Signed-off-by: Arnout Vandecappelle (Essensium/Mind)

gcc: support grahite only for GCC 5 or above

2017-08-02T19:16:45+00:00

GCC 4.9.x requires an old version of ISL to support graphite, and this old version of ISL is not sufficient to support graphite in modern GCC versions. Since GCC 4.9.x is getting older, and to keep things simple, we stop supporting graphite on old GCC < 5.x. This way, we will be able to bump ISL to a version that is suitable for modern GCC versions. In addition, this allows to drop the dependency on cloog, which was only needed for GCC 4.9. Signed-off-by: Andrey Yurovsky [Thomas: rework commit log.] Signed-off-by: Thomas Petazzoni

arch/arm: add big.LITTLE cpu variants

2017-07-22T21:29:24+00:00

The big.LITTLE configurations can be optimised for by gcc, and a few users wonder what they should choose when they have such CPUs. Add new entries for those big.LITTLE configurations. Note: the various combos were added in various gcc versions, but only really worked in later versions: Variant | Introduced in | First built in ----------+---------------+---------------- a15-a7 | 4.9 | 4.9 a17-a7 | 5 | 5 a57-a53 | 4.9 | 6 a72-a53 | 5 | 6 Signed-off-by: "Yann E. MORIN" Cc: Thomas Petazzoni Cc: Thomas De Schampheleire Cc: Baruch Siach Signed-off-by: Thomas Petazzoni

arch/mips: add support for MIPS32 FP mode

2017-07-16T14:45:22+00:00

MIPS32 support different FP modes (32,xx,64), so give the user the opportunity to choose between them. That will cause host-gcc to be built using the --with-fp-32=[32|xx|64] configure option. Also the -mfp[32|xx|64] gcc option will be added to TARGET_CFLAGS and to the toolchain wrapper. FP mode option shouldn't be used for soft-float, so we add logic in the toolchain wrapper if -msoft-float is among the arguments in order to not append the -fp[[32|xx|64] option, otherwise the compilation may fail. Information about FP modes here: - https://sourceware.org/binutils/docs/as/MIPS-Options.html - https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code Signed-off-by: Vicente Olivert Riera Signed-off-by: Thomas Petazzoni

arch/mips: add support for MIPS NaN

2017-07-16T14:35:39+00:00

MIPS supports two different NaN encodings, legacy and 2008. Information about MIPS NaN encodings can be found here: https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html NaN legacy is the only option available for R2 cores and older. NaN 2008 is the only option available for R6 cores. R5 cores can have either NaN legacy or NaN 2008, depending on the implementation. So, if the user selects a generic R5 target architecture variant, we show a choice menu with both options available. For well known R5 cores we directly select the NaN enconding they use. Signed-off-by: Vicente Olivert Riera Signed-off-by: Thomas Petazzoni

gcc: fix build of libsanitizer in gcc 4.9 and 5.x on PowerPC

2017-07-15T08:24:28+00:00

libsanitizer in gcc fails to build on PowerPC with gcc versions 4.9 and 5.x used in conjunction with glibc 2.25, with the following error: ../../../../gcc-host/libsanitizer/asan/asan_linux.cc: In function 'bool __asan::AsanInterceptsSignal(int)': ../../../../gcc-host/libsanitizer/asan/asan_linux.cc:222:20: error: 'SIGSEGV' was not declared in this scope return signum == SIGSEGV && common_flags()->handle_segv; This commit adds a patch that has been submitted to upstream gcc (https://patchwork.ozlabs.org/patch/725596/) but not merged. The patch is no longer needed with gcc 6.x and later because the code has been reworked. Fixes Buildroot bug #10061 Signed-off-by: Matthew Weber [Thomas: rework commit log.] Signed-off-by: Thomas Petazzoni

gcc: bump 6.x series to version 6.4.0

2017-07-11T20:17:12+00:00

Drop the following patches: * the Xtensa patches 870 and 871 are upstream now * patch 942 was backported to GCC 6 branch Note, that a bz2 release tarball is not provided anymore and is replaced by a xz tarball file. Signed-off-by: Jörg Krause Signed-off-by: Peter Korsgaard