<feed xmlns='http://www.w3.org/2005/Atom'>
<title>buildroot/arch, branch 2016.11</title>
<subtitle>OpenPOWER buildroot sources</subtitle>
<id>https://git.raptorcs.com/git/buildroot/atom?h=2016.11</id>
<link rel='self' href='https://git.raptorcs.com/git/buildroot/atom?h=2016.11'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/'/>
<updated>2016-11-09T21:42:12+00:00</updated>
<entry>
<title>MIPS: rename M6201 core to M6250</title>
<updated>2016-11-09T21:42:12+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-11-08T10:32:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=e5b3fa3ae4f1cbeac6ab19ee763c7118ab3b1d80'/>
<id>urn:sha1:e5b3fa3ae4f1cbeac6ab19ee763c7118ab3b1d80</id>
<content type='text'>
m6201 is the -march option for GCC, but the real core name is
M6250.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>MIPS: rename M5101 core to M5150</title>
<updated>2016-11-09T21:41:51+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-11-08T10:32:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=b2bae3b523aedd3ccf798c492f525660c4943770'/>
<id>urn:sha1:b2bae3b523aedd3ccf798c492f525660c4943770</id>
<content type='text'>
m5101 is the -march option for GCC, but the real core name is M5150.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>MIPS: remove M5100 core</title>
<updated>2016-11-09T21:41:07+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-11-08T10:32:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=84bd58d5bb06bfedb88e8abca53ec5b88ae9b29f'/>
<id>urn:sha1:84bd58d5bb06bfedb88e8abca53ec5b88ae9b29f</id>
<content type='text'>
This is a microcontroller class (MCU) core which is not suitable for
running Linux.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/Config.in.mips: add support for XBurst cores</title>
<updated>2016-11-09T20:36:34+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-11-09T16:16:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=240564a6933d9300473b5ced02d2f6f2a2fa4cd9'/>
<id>urn:sha1:240564a6933d9300473b5ced02d2f6f2a2fa4cd9</id>
<content type='text'>
The Ingenic XBurst is a MIPS32R2 microprocessor.

It has a bug in the FPU that can generate incorrect results in certain
cases. The problem shows up when you have several fused madd
instructions in sequence with dependant operands.

Using the -mno-fused-madd option prevents gcc from emitting these
instructions. This patch adds changes to the toolchain wrapper to use
that option.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for M6201 cores</title>
<updated>2016-10-19T21:31:29+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-10-18T15:55:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=1b974425d12e38225ce2313c048f854f82f766ed'/>
<id>urn:sha1:1b974425d12e38225ce2313c048f854f82f766ed</id>
<content type='text'>
-march=m6201 is not yet supported in GCC upstream, so disabling all
versions when selecting this core.

Note that M6201 implies a MIPS R6 CPU, and some GCC versions are already
disabled for R6, so we don't need to disable those ones for M6201 as
well.

The external Codescape IMG GNU Linux Toolchain has support for this
core.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for P6600 cores</title>
<updated>2016-10-15T11:22:17+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-09-30T09:36:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=3cfbeb8363e61d7652e9f67d7dffc225d9261b13'/>
<id>urn:sha1:3cfbeb8363e61d7652e9f67d7dffc225d9261b13</id>
<content type='text'>
-march=p6600 is not yet supported in GCC upstream, so disabling all
versions when selecting this core.

Note that P6600 implies a MIPS R6 CPU, and some GCC versions are already
disabled for R6, so we don't need to disable those ones for P6600 as
well.

The external Codescape IMG GNU Linux Toolchain has support for this
core.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for P5600 cores</title>
<updated>2016-10-15T11:22:17+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-09-30T09:36:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=73e16457469f18d755c115a77c193c8cdeee00ab'/>
<id>urn:sha1:73e16457469f18d755c115a77c193c8cdeee00ab</id>
<content type='text'>
Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for I6400 cores</title>
<updated>2016-10-15T11:22:17+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-09-30T09:36:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=ea52e3d01a7b79a80b635308422a9df042394008'/>
<id>urn:sha1:ea52e3d01a7b79a80b635308422a9df042394008</id>
<content type='text'>
-march=i6400 support starts from GCC-6, so disable previous versions
when selecting this core.

Note that I6400 implies a MIPS R6 CPU, and some GCC versions are already
disabled for R6, so we don't need to disable those ones for I6400 as
well.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for M5101 cores</title>
<updated>2016-10-15T11:22:17+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-09-30T09:36:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=55a37eaa911437352c8b5ad7b7bd9cc9160229ce'/>
<id>urn:sha1:55a37eaa911437352c8b5ad7b7bd9cc9160229ce</id>
<content type='text'>
-march=m5101 support starts from GCC-6, so disable previous versions
when selecting this core.

Note that M5101 implies a MIPS R5 CPU, and some GCC versions are already
disabled for R5, so we don't need to disable those ones for M5101 as
well.

Also disable external toolchains that don't support this core.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
<entry>
<title>MIPS: add support for M5100 cores</title>
<updated>2016-10-15T11:22:17+00:00</updated>
<author>
<name>Vicente Olivert Riera</name>
<email>Vincent.Riera@imgtec.com</email>
</author>
<published>2016-09-30T09:36:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=067a46474ad2ebe3b335f6fecaa3816b833d0afb'/>
<id>urn:sha1:067a46474ad2ebe3b335f6fecaa3816b833d0afb</id>
<content type='text'>
-march=m5100 support starts from GCC-6, so disable previous versions
when selecting this core.

Note that M5100 implies a MIPS R5 CPU, and some GCC versions are already
disabled for R5, so we don't need to disable those ones for M5100 as
well.

Also disable external toolchains that don't support this core.

Signed-off-by: Vicente Olivert Riera &lt;Vincent.Riera@imgtec.com&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
</feed>
