<feed xmlns='http://www.w3.org/2005/Atom'>
<title>buildroot/arch, branch 2016.05</title>
<subtitle>OpenPOWER buildroot sources</subtitle>
<id>https://git.raptorcs.com/git/buildroot/atom?h=2016.05</id>
<link rel='self' href='https://git.raptorcs.com/git/buildroot/atom?h=2016.05'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/'/>
<updated>2016-04-30T16:50:46+00:00</updated>
<entry>
<title>toolchain: add coldfire support</title>
<updated>2016-04-30T16:50:46+00:00</updated>
<author>
<name>Waldemar Brodkorb</name>
<email>wbx@openadk.org</email>
</author>
<published>2016-04-29T17:51:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=015322fccb0b785af3f7dd62618aa717f8aca064'/>
<id>urn:sha1:015322fccb0b785af3f7dd62618aa717f8aca064</id>
<content type='text'>
Add support for m68k/coldfire. A gcc patch is required
to avoid gcc ICE.

Signed-off-by: Waldemar Brodkorb &lt;wbx@openadk.org&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>i386: properly define BR2_ARCH for all x86 subarchitectures</title>
<updated>2016-04-21T21:05:28+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-04-21T19:52:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=633f20002e4184e91ead8599fcc557e9fd17e1e0'/>
<id>urn:sha1:633f20002e4184e91ead8599fcc557e9fd17e1e0</id>
<content type='text'>
We were not defining BR2_ARCH for two of the x86 subarchitecture,
which means the architecture part of the GNU_TARGET_NAME tuple was
empty, leading to weird build failures.

This commit fixes that by defining the appropriate values.

Fixes bug #8861.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/x86: remove support for i386</title>
<updated>2016-04-18T21:38:34+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-04-17T21:31:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=6cb4814c87cb1282b4a1d35e73743e8dd1b12ec5'/>
<id>urn:sha1:6cb4814c87cb1282b4a1d35e73743e8dd1b12ec5</id>
<content type='text'>
The Linux kernel doesn't even support i386 anymore, there is no NPTL
support for i386 and uClibc-ng only supports NPTL on x86, so there is
essentially no usable thread implementation. Most likely glibc and
musl also don't support i386 either. So it's time to remove the
support for this architecture variant.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/arm: add Cortex-M4 entry</title>
<updated>2016-03-20T14:37:30+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-03-18T21:08:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=472434323663d31e2aa6162b6907f6e6828669a8'/>
<id>urn:sha1:472434323663d31e2aa6162b6907f6e6828669a8</id>
<content type='text'>
This commit adds the option to select the Cortex-M4 ARM core, in the
same family as Cortex-M3. This will be useful to enable the internal
toolchain backend for this ARM core, and provide some defconfigs for
Cortex-M4 platforms.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Reviewed-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/arm: Cortex-M3 provides only Thumb-2</title>
<updated>2016-03-20T14:37:24+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-03-18T21:08:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=41bcc440b1a4a85530b45c2b2a30662e6a823b75'/>
<id>urn:sha1:41bcc440b1a4a85530b45c2b2a30662e6a823b75</id>
<content type='text'>
The Cortex-M cores only support Thumb-2, not Thumb. In fact, Thumb-2
is a superset of Thumb, and we could have a single option for both in
Buildroot, since -mthumb on ARMv4/v5 means original Thumb, while
-mthumb on ARMv7 means Thumb 2. However, for clarity, it makes sense
to have two separate options. But in this case, Cortex-M3 should not
advertise that it supports Thumb, as in fact selecting Thumb would
generate Thumb-2 code.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Reviewed-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
Reviewed-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/arm: introduce and use BR2_ARM_CPU_ARMV7M</title>
<updated>2016-03-20T14:37:07+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-03-18T21:08:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=a5152f0cb0fcd496a9dabca4a1e07be98fed5679'/>
<id>urn:sha1:a5152f0cb0fcd496a9dabca4a1e07be98fed5679</id>
<content type='text'>
All ARM cores should select a BR2_ARM_CPU_* option. Currently, the
cortex-m3 does not, which this commit fixes by introducing a
BR2_ARM_CPU_ARMV7M option.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Acked-by: Arnout Vandecappelle (Essensium/Mind) &lt;arnout@mind.be&gt;
Acked-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/m68k: re-enable the architecture</title>
<updated>2016-03-20T14:28:44+00:00</updated>
<author>
<name>Waldemar Brodkorb</name>
<email>wbx@openadk.org</email>
</author>
<published>2016-03-19T19:04:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=7ea0f64dc33a31d7a8a70594babd822db8e04188'/>
<id>urn:sha1:7ea0f64dc33a31d7a8a70594babd822db8e04188</id>
<content type='text'>
This allows to build a m68k toolchain with uClibc.

Signed-off-by: Waldemar Brodkorb &lt;wbx@openadk.org&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>arch/arm: add the cortex A17 variant supported by gcc 5.x</title>
<updated>2016-02-22T08:31:42+00:00</updated>
<author>
<name>Ezequiel García</name>
<email>ezequiel@vanguardiasur.com.ar</email>
</author>
<published>2016-02-21T13:12:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=027b7ca0f240d3c7a51f3b2ea151c04329c4b569'/>
<id>urn:sha1:027b7ca0f240d3c7a51f3b2ea151c04329c4b569</id>
<content type='text'>
Add the Cortex A17 variant. This core is considered a replacement
of the Cortex A12 and is supported by gcc 5 / binutils 2.25+

Suggested-by: Ross Green &lt;greenfross@netscape.net&gt;
Signed-off-by: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
<entry>
<title>arch: remove BR2_ARCH_HAS_ATOMICS option</title>
<updated>2016-02-06T10:16:00+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-02-02T15:31:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/buildroot/commit/?id=4a3f597a0ea3392bbd1063c40291743955309472'/>
<id>urn:sha1:4a3f597a0ea3392bbd1063c40291743955309472</id>
<content type='text'>
Now that BR2_ARCH_HAS_ATOMICS is no longer used anywhere, we can
remove it from arch/Config.in*, as well as from the documentation.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Acked-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
</content>
</entry>
<entry>
<title>Add ARM11 MPCore CPU target support</title>
<updated>2016-01-03T21:35:22+00:00</updated>
<author>
<name>Sergi Granell</name>
<email>sergi_g_12@hotmail.com</email>
</author>
<published>2015-11-28T14:55:21+00:00</published>
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<id>urn:sha1:449d7b9127096cf0a40118b298bc2fbbdac99d2a</id>
<content type='text'>
gcc differentiates the mpcore-with-vfp from the mcpore-without-vfp
CPUs. The former is named just 'mpcore', while the latter is named
'mpcorenovfp'.

We only add one entry, 'mpcore' and let the user select whether or
not to use the VFP. We then name the CPU according to the user's
selection.

Signed-off-by: Sergi Granell &lt;xerpi.g.12@gmail.com&gt;
Tested-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
Acked-by: "Yann E. MORIN" &lt;yann.morin.1998@free.fr&gt;
Signed-off-by: Peter Korsgaard &lt;peter@korsgaard.com&gt;
</content>
</entry>
</feed>
