From 536c8fbf932d6a790f95cb8cf39dacf4a2de06cb Mon Sep 17 00:00:00 2001 From: Frederic Barrat Date: Tue, 12 Mar 2019 21:35:09 +0100 Subject: npu2-opencapi: Rework ODL register access ODL registers used to control the opencapi link state have an address built on a base address and an offset for each brick which can be computed instead of hard-coded individually for each brick. Rework how we access the ODL registers, to avoid repeating switch statements all over the place. Signed-off-by: Frederic Barrat Reviewed-by: Andrew Donnellan Reviewed-by: Christophe Lombard Signed-off-by: Stewart Smith --- hw/npu2-hw-procedures.c | 17 +------- hw/npu2-opencapi.c | 109 ++++-------------------------------------------- 2 files changed, 10 insertions(+), 116 deletions(-) (limited to 'hw') diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index 627a8428..a10ccb7c 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -981,22 +981,7 @@ void npu2_opencapi_bump_ui_lane(struct npu2_dev *dev) uint64_t status_xscom; int lane, bit = 7; - switch (dev->brick_index) { - case 2: - status_xscom = OB0_ODL0_TRAINING_STATUS; - break; - case 3: - status_xscom = OB0_ODL1_TRAINING_STATUS; - break; - case 4: - status_xscom = OB3_ODL1_TRAINING_STATUS; - break; - case 5: - status_xscom = OB3_ODL0_TRAINING_STATUS; - break; - default: - assert(false); - } + status_xscom = OB_ODL_TRAINING_STATUS(dev->brick_index); xscom_read(dev->npu->chip_id, status_xscom, ®); reg = GETFIELD(OB_ODL_TRAINING_STATUS_STS_RX_PATTERN_B, reg); diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index aa3c434e..6ad561c4 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -128,24 +128,11 @@ static inline uint64_t index_to_block(uint64_t index) { } } -static uint64_t get_odl_status(uint32_t gcid, uint64_t index) { +static uint64_t get_odl_status(uint32_t gcid, uint64_t index) +{ uint64_t reg, status_xscom; - switch (index) { - case 2: - status_xscom = OB0_ODL0_STATUS; - break; - case 3: - status_xscom = OB0_ODL1_STATUS; - break; - case 4: - status_xscom = OB3_ODL1_STATUS; - break; - case 5: - status_xscom = OB3_ODL0_STATUS; - break; - default: - assert(false); - } + + status_xscom = OB_ODL_STATUS(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -154,22 +141,7 @@ static uint64_t get_odl_training_status(uint32_t gcid, uint64_t index) { uint64_t status_xscom, reg; - switch (index) { - case 2: - status_xscom = OB0_ODL0_TRAINING_STATUS; - break; - case 3: - status_xscom = OB0_ODL1_TRAINING_STATUS; - break; - case 4: - status_xscom = OB3_ODL1_TRAINING_STATUS; - break; - case 5: - status_xscom = OB3_ODL0_TRAINING_STATUS; - break; - default: - assert(false); - } + status_xscom = OB_ODL_TRAINING_STATUS(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -178,22 +150,7 @@ static uint64_t get_odl_endpoint_info(uint32_t gcid, uint64_t index) { uint64_t status_xscom, reg; - switch (index) { - case 2: - status_xscom = OB0_ODL0_ENDPOINT_INFO; - break; - case 3: - status_xscom = OB0_ODL1_ENDPOINT_INFO; - break; - case 4: - status_xscom = OB3_ODL1_ENDPOINT_INFO; - break; - case 5: - status_xscom = OB3_ODL0_ENDPOINT_INFO; - break; - default: - assert(false); - } + status_xscom = OB_ODL_ENDPOINT_INFO(index); xscom_read(gcid, status_xscom, ®); return reg; } @@ -936,23 +893,7 @@ static void reset_odl(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Reset ODL */ reg = OB_ODL_CONFIG_RESET; reg = SETFIELD(OB_ODL_CONFIG_VERSION, reg, 0b000001); @@ -972,23 +913,7 @@ static void set_init_pattern(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Transmit Pattern A */ xscom_read(gcid, config_xscom, ®); reg = SETFIELD(OB_ODL_CONFIG_TRAIN_MODE, reg, 0b0001); @@ -999,23 +924,7 @@ static void start_training(uint32_t gcid, struct npu2_dev *dev) { uint64_t reg, config_xscom; - switch (dev->brick_index) { - case 2: - config_xscom = OB0_ODL0_CONFIG; - break; - case 3: - config_xscom = OB0_ODL1_CONFIG; - break; - case 4: - config_xscom = OB3_ODL1_CONFIG; - break; - case 5: - config_xscom = OB3_ODL0_CONFIG; - break; - default: - assert(false); - } - + config_xscom = OB_ODL_CONFIG(dev->brick_index); /* Start training */ xscom_read(gcid, config_xscom, ®); reg = SETFIELD(OB_ODL_CONFIG_TRAIN_MODE, reg, 0b1000); -- cgit v1.2.1