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* Add initial Blackbird supportRaptor Engineering Development Team2019-05-032-1/+79
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* Remove Talos DT match from Romulus fileTimothy Pearson2019-04-241-2/+1
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* Copy and convert Romulus descriptors to TalosTimothy Pearson2019-04-242-1/+88
| | | | Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
* platforms/firenze: Rework I2C controller fixupsOliver O'Halloran2019-03-281-49/+51
| | | | | | | | | | | | | | | | | For some system planars we need to apply some fixups to the PCI slot power controllers. These are done at boot time and a slightly bizzare in their construction since they share the I2C request completion callback with the runtime slot power on method which affects the PCI slot state machine. This is confusing to say the least, so this patch reworks the fixup code to use the synchronus I2C request code rather than open-coding the wait based on what PCI slot state is in use. It also does some general control flow cleanup and adds some comments explaining what the fixups are for. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Handle failure to initialise raw flashAndrew Jeffery2019-03-281-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialising raw flash lead to a dead assignment to rc. Check the return code and take the failure path as necessary. Both before and after the fix we see output along the lines of the following when flash_init() fails: [ 53.283182881,7] IRQ: Registering 0800..0ff7 ops @0x300d4b98 (data 0x3052b9d8) [ 53.283184335,7] IRQ: Registering 0ff8..0fff ops @0x300d4bc8 (data 0x3052b9d8) [ 53.283185513,7] PHB#0000: Initializing PHB... [ 53.288260827,4] FLASH: Can't load resource id:0. No system flash found [ 53.288354442,4] FLASH: Can't load resource id:1. No system flash found [ 53.342933439,3] CAPP: Error loading ucode lid. index=200ea [ 53.462749486,2] NVRAM: Failed to load [ 53.462819095,2] NVRAM: Failed to load [ 53.462894236,2] NVRAM: Failed to load [ 53.462967071,2] NVRAM: Failed to load [ 53.463033077,2] NVRAM: Failed to load [ 53.463144847,2] NVRAM: Failed to load Eventually followed by: [ 57.216942479,5] INIT: platform wait for kernel load failed [ 57.217051132,5] INIT: Assuming kernel at 0x20000000 [ 57.217127508,3] INIT: ELF header not found. Assuming raw binary. [ 57.217249886,2] NVRAM: Failed to load [ 57.221294487,0] FATAL: Kernel is zeros, can't execute! [ 57.221397429,0] Assert fail: core/init.c:615:0 [ 57.221471414,0] Aborting! CPU 0028 Backtrace: S: 0000000031d43c60 R: 000000003001b274 ._abort+0x4c S: 0000000031d43ce0 R: 000000003001b2f0 .assert_fail+0x34 S: 0000000031d43d60 R: 0000000030014814 .load_and_boot_kernel+0xae4 S: 0000000031d43e30 R: 0000000030015164 .main_cpu_entry+0x680 S: 0000000031d43f00 R: 0000000030002718 boot_entry+0x1c0 --- OPAL boot --- Analysis of the execution paths suggests we'll always "safely" end this way due the setup sequence for the blocklevel callbacks in flash_init() and error handling in blocklevel_get_info(), and there's no current risk of executing from unexpected memory locations. As such the issue is reduced to down to a fix for poor error hygene in the original change and a resolution for a Coverity warning (famous last words etc). Fixes: c826e1ca9e5b ("astbmc: Try IPMI HIOMAP for P8 (again)") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/vesnin: Disable PCIe port bifurcationArtem Senichev2019-03-281-34/+16
| | | | | | | PCIe ports connected to CPU1 and CPU3 now work as x16 instead of x8x8. Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* firenze-pci: Always init slot info from LXVPDOliver O'Halloran2019-03-281-8/+4
| | | | | | | | | | We can slot information from the LXVPD without having power control information about that slot. This patch changes the init path so that we always override the add_properties() call rather than only when we have power control information about the slot. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* fsp/lxvpd: Print more LXVPD slot informationOliver O'Halloran2019-03-281-0/+3
| | | | | | | Useful to know since it changes the behaviour of the slot core. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* witherspoon: Add nvlink2 interconnect informationAlexey Kardashevskiy2019-03-201-1/+131
| | | | | | | | | | | | | | | | | | | GPUs on Redbud and Sequoia platforms are interconnected in groups of 2 or 3 GPUs. The problem with that is if the user decides to pass a single GPU from a group to the userspace, we need to ensure that links between GPUs do not get enabled. A V100 GPU provides a way to disable selected links. In order to only disable links to peer GPUs, we need a topology map. This adds an "ibm,nvlink-peers" property to a GPU DT node with phandles of peer GPUs and NVLink2 bridges. The index in the property is a GPU link number. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Reza Arbab <arbab@linux.ibm.com> [stewart: fixed strtol found in review by Reza] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/romulus: Also support talosOliver O'Halloran2019-03-201-1/+2
| | | | | | | | | The two are similar enough and I'd like to have a slot table for our Talos. Cc: Timothy Pearson <tpearson@raptorengineering.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Undo slot label name changesDeb McLemore2019-03-151-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During some code updates the slot labels were updated to reflect the phb layout, however expectations were that the slot labels be aligned with the riser card slots and not the system planar slots. [stewart: The tale of how we got here is long and varied and not at all clear. The first ESS systems went out with a skiboot v5.9.8 with additional SuperMicro patches. It was probably a slot table, but who knows, we don't have the code so can't check. It's possible it was all coming in through HDAT instead). The op-build tree (thus the exact patches) shipped on systems that work correct seems to not be around anywhere anymore (if it ever was). It was only in skiboot v6.0 that a slot table made it in, and, of course, only having remote machines in random configs, including possibly with riser cards from Briggs&Stratton rather than the ones destined for this system, doesn't make for verifying this at all. It also doesn't help that *consistently* there is *never* any review on slot tables, and we've had things be wrong in the past. Combine this with not upstream Hostboot patches.] Cc: skiboot-stable@lists.ozlabs.org Cc: Benjamin Mashak <mashak@us.ibm.com> Cc: Michael Lim <youhour@us.ibm.com> Fixes: 64a16ae05bb2 ("p9dsu: Fix slot labels for p9dsu2u") Fixes: 87517c8737b9 ("p9dsu: Fix p9dsu slot tables") Fixes: 31231ed300f2 ("p9dsu: Fix p9dsu default variant") Signed-off-by: Deb McLemore <debmc@linux.ibm.com> [stewart: added more detailed explanation, cc stable] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Fix slot labels for p9dsu2uDeb McLemore2019-03-051-5/+5
| | | | | | | Update the slot labels for the p9dsu2u tables. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/zz: Re-enable LXVPD slot information parsingOliver O'Halloran2019-03-051-4/+3
| | | | | | | | | | | >From memory this was disabled in the distant past since we were waiting for an updates to the LXPVD format. It looks like that never happened so re-enable it for the ZZ platform so that we can get PCI slot location codes on ZZ. Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* zaius: Add BMC descriptionAndrew Jeffery2019-03-051-1/+20
| | | | | | | | | | | | | Frederic reported that Zaius was failing with a NULL dereference when trying to initialise IPMI HIOMAP. It turns out that the BMC wasn't described at all, so add a description. Tested on zaius1, which reached petitboot with the patch applied. Reported-by: Frederic Barrat <fbarrat@linux.ibm.com> Tested-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Enable IPMI HIOMAP for AMI platformsAndrew Jeffery2019-03-011-0/+1
| | | | | | | | | Required for Habanero, Palmetto and Romulus. Cc: Lei YU <mine260309@gmail.com> Cc: Uma Yadlapati <yadlapat@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Try IPMI HIOMAP for P8 (again)Andrew Jeffery2019-02-252-31/+59
| | | | | | | | | | | | | | | The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Tested on Garrison, Palmetto without HIOMAP, Palmetto with HIOMAP, and Witherspoon. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/witherspoon: Make PCIe shared slot error message more informativeAndrew Donnellan2019-02-181-2/+3
| | | | | | | | | | | | | If we're missing chips for some reason, we print a warning when configuring the PCIe shared slot. The warning doesn't really make it clear what "shared slot" is, and if it's printed, it'll come right after a bunch of messages about NPU setup, so let's clarify the message to explicitly mention PCI. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> [stewart: bikeshed] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Revert "astbmc: Try IPMI HIOMAP for P8"Joel Stanley2019-02-102-59/+31
| | | | | | | | | | | | | | | | | | | This reverts commit bd9839684d482417e8c60449592f4308e9a91dac as it broke booting on P8 systems, including Garrison (AMI BMC), Firestone (AMI BMC) and QEMU (BMC simulator). Issue https://github.com/open-power/skiboot/issues/217 tracks the failure. The P8 IPMI HIOMAP feature can be re-enabled once this issue is resolved. Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Fix p9dsu slot tablesDeb McLemore2019-02-041-15/+30
| | | | | | | | | | | | | Set the attributes on the slot tables to account for builtin or pluggable etypes, this will allow pci enumeration to calculate subordinate buses. Update some slot label strings. Add WIO Slot5 which is standard on the ESS config. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Fix p9dsu default variantDeb McLemore2019-01-251-19/+21
| | | | | | | | | | | Add the default when no riser_id is returned from the ipmi query. This addresses: https://github.com/open-power/boston-openpower/issues/1369 Allow a little more time for BMC reply and cleanup some label strings. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p8dtu: Configure BMC graphicsAndrew Jeffery2019-01-181-1/+9
| | | | | | | | We can no-longer read the values from the BMC in the way we have in the past. Values were provided by Eric Chen of SMC. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p8dtu: Enable HIOMAP supportAndrew Jeffery2019-01-181-0/+1
| | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Try IPMI HIOMAP for P8Andrew Jeffery2019-01-182-31/+59
| | | | | | | | | | | | The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* zaius: zaius_ocapi can be staticStewart Smith2019-01-181-1/+1
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* zz: platform_ocapi can be staticStewart Smith2019-01-181-1/+1
| | | | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* sparse: Make tree 'constant is so big' warning cleanStewart Smith2019-01-184-6/+6
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* qemu: bt device isn't always hanging off /Stewart Smith2019-01-161-3/+2
| | | | | | | | | | | | | Just use the normal for_each_compatible instead. Otherwise in the qemu model as executed by op-test, we wouldn't go down the astbmc_init() path, thus not having flash. Cc: stable # v6.2+ Fixes: 2f0b6af6e01c5f7b3c762647d06c4f792e2cb3b7 Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* plat/qemu: fix platform initialization when the BT device is not presentCédric Le Goater2018-12-131-1/+20
| | | | | | | | | | | | | | A QEMU PowerNV machine does not necessarily have a BT device. It needs to be defined on the command line with : -device ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq=10 When the QEMU platform is initialized by skiboot, we need to check that such a device is present and if not, skip the AST initialization. Fixes: 8340a9642bba ("plat/qemu: use the common OpenPOWER routines to initialize") Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* plat/qemu: use the common OpenPOWER routines to initializeCédric Le Goater2018-12-101-230/+6
| | | | | | | | | | | Back in 2016, we did not have a large support of the PowerNV devices under QEMU and we were using our own custom ones. This has changed and we can now use all the common init routines of the OpenPOWER platforms. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platform/firenze: Fix branch-to-null crashOliver O'Halloran2018-11-261-0/+1
| | | | | | | | | | | | When the bus alloc and free methods were removed we missed a case in the Firenze platform slot code that relied on the the bus-specific method to the bus pointer in the request structure. This results in a branch-to-null during boot and a crash. This patch fixes it by initialising it manually here. Fixes: 801462feb7d6 ("core/i2c: Remove bus specific alloc and free callbacks") Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platform/witherspoon: Fix opencapi lane-mask used on GPU0Frederic Barrat2018-11-191-3/+3
| | | | | | | | | | | When an opencapi device is used via the Acorn adapter, the link used is connected to the "middle" group of lanes of the obus. We were using the wrong set of lanes. The link was somehow still training, likely because the default settings at power-on were good enough, but it's still wrong. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platform/witherspoon: Avoid harmless error messageFrederic Barrat2018-11-191-0/+7
| | | | | | | | | | | | The I2C read to find out if a device on the GPU slot is an opencapi adapter or nvidia card is reporting an "arbitration loss" error if no device is connected on the GPU slot. That I2C read is actually useless if we already know there's no device connected, so let's skip it. It will avoid logging an harmless error. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Describe platform BMC register configurationAndrew Jeffery2018-11-011-1/+9
| | | | | | | | Provide the p9dsu-specific BMC configuration values required for the host kernel to drive the VGA display correctly. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* p9dsu: Add HIOMAP-over-IPMI supportAndrew Jeffery2018-11-011-0/+1
| | | | | | | Boston uses the same netfn / command values as OpenBMC. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Quieten 'warnings' now that SIO is disabledStewart Smith2018-10-251-2/+9
| | | | Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* npu2-opencapi: Enable presence detection on ZZFrederic Barrat2018-10-251-5/+0
| | | | | | | | | | | | | | | | | | Presence detection for opencapi adapters was broken for ZZ planars v3 and below. All ZZ systems currently used in the lab have had their planar upgraded, so we can now remove the override we had to force presence and activate presence detection. Which should improve boot time. Considering the state of opal support on ZZ, this is really only for lab usage on BML. The opencapi enablement team has okay'd the change. In the unlikely case somebody tries opencapi on an old ZZ, the presence detection through i2c will show that no adapter is present and skiboot won't try to access or train the link. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/astbmc/vesnin: Send list of PCI devices to BMC through IPMIArtem Senichev2018-10-231-2/+101
| | | | | | | | | | | Implements sending a list of installed PCI devices through IPMI protocol. Each PCI device description is sent as a standalone IPMI message. A list of devices can be gathered from separate messages using the session identifier. The session Id is an incremental counter that is updated at the start of synchronization session. Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platform: Restructure bmc_platform typeAndrew Jeffery2018-10-1112-23/+74
| | | | | | | | | | Segregate the BMC platform configuration into hardware and software components. This allows population of platform default values for hardware configuration that may no-longer be accessible by the host. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fixup pci-quirk unit test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Remove coordinated isolation supportAndrew Jeffery2018-10-111-41/+6
| | | | | Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* astbmc: Prefer ipmi-hiomap for PNOR accessAndrew Jeffery2018-10-112-14/+38
| | | | | | | | | If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fix up mbox test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* libflash: Add ipmi-hiomapAndrew Jeffery2018-10-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | ipmi-hiomap implements the PNOR access control protocol formerly known as "the mbox protocol" but uses IPMI instead of the AST LPC mailbox as a transport. As there is no-longer any mailbox involved in this alternate implementation the old protocol name is quite misleading, and so it has been renamed to "the hiomap protoocol" (Host I/O Mapping protocol). The same commands and events are used though this client-side implementation assumes v2 of the protocol is supported by the BMC. The code is a heavily-reworked copy of the mbox-flash source and is introduced this way to allow for the mbox implementation's eventual removal. mbox-flash should in theory be renamed to mbox-hiomap for consistency, but as it is on life-support effective immediately we may as well just remove it entirely when the time is right. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: prlog debug over prerror for mbox fallback, fix indent] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* witherspoon: Rename shared slot fixup functionOliver O'Halloran2018-09-271-7/+2
| | | | | | | | Rename and set it as a pre_pci_fixup platform function. The indirect call doesn't make a whole of of sense IMO. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/i2c: Remove bus specific alloc and free callbacksOliver O'Halloran2018-09-171-1/+1
| | | | | | | These are now pointless and they can be replaced with zalloc() and free(). Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* core/i2c: Move the timeout field into i2c_requestOliver O'Halloran2018-09-171-12/+12
| | | | | | | | | | | Currently to set a per-request timeout you need to use i2c_req_set_timeout() which is a wrapper for a per-bus method that sets the actual timeout. This design doesn't make a whole lot of sense, so move the timeout field into the generic i2c_request structure and set the timeout to be set using that. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* platforms/astbmc/witherspoon: Implement OpenCAPI supportAndrew Donnellan2018-09-171-3/+202
| | | | | | | | | | | | | | | | | | | | | | OpenCAPI on Witherspoon is slightly more involved than on Zaius and ZZ, due to the OpenCAPI links using the SXM2 connectors that are used for NVLink GPUs. This patch adds the regular OpenCAPI platform information, and also a Witherspoon-specific presence detection callback that uses the previously added OCC GPU presence detection to figure out the device types plugged into each SXM2 socket. The SXM2 connectors are capable of carrying 2 OpenCAPI links, and future OpenCAPI devices are expected to make use of this. However, we don't yet support ganged links and the various implications that has for handling things like device reset, so for now, we only enable 1 brick per device. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Alistair Popple <alistair@popple.id.au> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2, platform: Restructure OpenCAPI i2c reset/presence pinsAndrew Donnellan2018-09-172-19/+27
| | | | | | | | | | | | | | | | | | | | | | In platform_ocapi, we define i2c_{reset,presence}_odl{0,1} to specify the appropriate reset/presence GPIO pins for devices connected to ODL0 and ODL1 respectively. This is obviously wrong, because a device connected to brick 2 and a device connected to brick 4 are going to be different devices connected to different I2C pins, but rather conveniently we haven't had to deal with systems that can use the full 4 bricks as yet. Now that we're adding OpenCAPI support for Witherspoon, we should change this to specify pins separately for all 4 bricks. Replace i2c_{reset,presence}_odl{0,1} with i2c_{reset,presence}_brick{2,3,4,5} and update the presence detection code, device reset code, and existing platforms accordingly. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* hw/npu2, platform: Add NPU2 platform device detection callbackAndrew Donnellan2018-09-173-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no standardised way to determine the presence and type of devices connected to an NPU on POWER9. Currently, we hardcode device types based on platform type (as no platform currently supports both OpenCAPI and NVLink), and for OpenCAPI platforms we use I2C to detect presence. Witherspoon (and potentially other platforms later on) supports both NVLink and OpenCAPI, and additionally uses SXM2 connectors which can carry more than one link, rather than the SlimSAS connectors used for OpenCAPI on Zaius and ZZ. This necessitates some special handling. Add a platform callback for NPU device detection. In a later patch, we will use this to implement Witherspoon-specific device detection. For now, add a Witherspoon stub that sets all links to NVLink (i.e. current behaviour). Move the existing I2C-based presence detection for OpenCAPI devices on Zaius/ZZ into common code, which we use by default for platforms which do not define a callback. Clean up the use of the ibm,npu-link-type property, which will now be exposed solely for debugging and not consumed internally. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
* Qemu: don't print PR_WARNING on qemu defining rtc/uartStewart Smith2018-09-131-2/+2
| | | | | | | This helps us boot more warning/error free on qemu Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* zaius: Add slots for the Barreleye G2 HDD rackOliver O'Halloran2018-09-131-1/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Barreleye G2 is distinct from the Zaius in that it features a 24 Bay NVMe/SATA HDD rack. To provide meaningful slot names for each NVMe device we need to define a slot table for the NVMe capable HDD bays. Unfortunately this isn't straightforward because the PCIe path to the NVMe devices isn't fixed. The PCIe topology is something like: P9 -> HBA card -> 9797 switch -> 20x NVMe HDD slots The 9797 switch is partitioned into two (or four) virtual switches which allow multiple HBA cards to be used (e.g. one per socket). As a result the exact BDFN of the ports will vary depending on how the system is configured. That said, the virtual switch configuration of the 9797 does not change the device and function numbers of the switch downports. This means that we can define a single slot table that maps switch ports to the NVMe bay names. Unfortunately we still need to guess which bus to use this table on, so we assume that any switch downport we find with the PEX9797 VDID is part of the 9797 that supports the HDD rack. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* astbmc/slot: Add _add_slot_info()Oliver O'Halloran2018-09-132-9/+18
| | | | | | | | | | | | Currently slot_table_get_slot_info() scans the platform defined slot table looking for a slot table entry that matches the device and adds the relevant information to the struct pci_device. This patch splits the searching and adding of the slot information into separate functions so that we can allow the platform code to use a different searching critera. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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