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* core: add flash_subpart_info()Claudio Carvalho2016-10-101-1/+3
| | | | | | | | | | | | | | | | | | Currently, the CAPP lid has the TOC (4K) and one supartition (36K). For secure boot we can either build one container for the TOC and another one for the subpartition, or build one container for the whole CAPP partition. We decided implement the second option. The first option would require changes to the CAPP TOC layout in order to correlate the TOC with the subpartitions. Besides that, the first option also increases the boot time since we would need to verify and measure the CAPP TOC. This patch adds the flash_subpart_info function so the correct CAPP subpartition can be selected also outside of the flash API. Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/init: remove master_cpu parameterOliver O'Halloran2016-09-271-1/+1
| | | | | | | | | | | | master_cpu is used to determine the ChipTOD master if no ChipTOD information is available in the HDAT. However, it is set to zero at every skiboot entry point (fdt_entry, the 0x180 FSP entry and opal_boot_trampoline) and is otherwise unused. This patch removes this passing around and uses the boot CPU PIR to find the ChipTOD master rather than zero. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* flash: Rework error paths and messages for multiple flash controllersMichael Neuling2016-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | The current flash code was written with only one flash chip, which is a system_flash (ie. the PNOR image), in mind. Now that we have mambo bogusdisk flash, we can have many flash chips. This is resulting in some confusing output messages. This reworks some of the error paths and warnings to make this more coherent when we have multiple flash chips. We assume everything can be a system flash, so I've removed the is_system_flash parameter from flash_register(). We'll use the first system flash we find and warn if we find another since discovery order is not a guaranteed API. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename rvwinkle patch to reset patch and install at bootBenjamin Herrenschmidt2016-08-221-0/+4
| | | | | | | | | | The patch code itself is unchanged (for now...). Install it during boot so we will be able to use power management instructions. We can't just have a proper exception code built at 0x100 as this is otherwise one of our entry points. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Rename enter_rvwinkle to enter_pm_stateBenjamin Herrenschmidt2016-08-221-0/+2
| | | | | | | And add an argument to specify whether to enter nap or rvwinkle Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hw/phb4: Add initial supportBenjamin Herrenschmidt2016-07-081-0/+3
| | | | | | | | | | This adds the base support for the PHB4. It currently only support the M32 window, EEH or in general error recovery aren't supported yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: update (C) year, fix indenting] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* uart: Cleanup initialization and remove simulator hackBenjamin Herrenschmidt2016-07-061-1/+2
| | | | | | | | | | Add more generic support for MMIO based UARTs, simplify code, use common initialization, and clean up the device-tree representation as well. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/fdt: Allow to exclude root nodeGavin Shan2016-06-141-1/+1
| | | | | | | | | | | | The root node is excluded in the device sub-tree created during PCI hot add time. This adds one extra argument @exclusive to flatten_dt_node(), __create_dtb() and create_dtb() to indicate the root node should be excluded or not. The changes are going to be used by PCI hot add path and it's not affecting anything at present. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* hdata: Make hdata_to_dt more suitable for fuzzingStewart Smith2016-05-181-1/+1
| | | | | | | | We make parse_hdat() return success/failure rather than assert. This allows the hdata_to_dt binary to gracefully error out rather than assert, which is useful when throwing it at a fuzzer. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add base POWER9 supportMichael Neuling2016-05-101-0/+1
| | | | | | | | | | | Add PVR detection, chip id and other misc bits for POWER9. POWER9 changes the location of the HILE and attn enable bits in the HID0 register, so add these definitions also. Signed-off-by: Michael Neuling <mikey@neuling.org> [stewart@linux.vnet.ibm.com: Fix Numbus typo, hdata_to_dt build fixes] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Drop support for p5ioc2Daniel Axtens2015-11-181-1/+0
| | | | | | | | | | | | | | | | | | | p5ioc2 is used by approximately 2 machines in the world, and has never ever been a supported configuration. Not only is the code virtually unused and very tricky to test, but keeping it around is making life unnecessarily difficult: - It's more complexity to manage for things such as PCI slot support - It's more code for static analysis to cover, which means more time fixing bugs that affect no-one. - It's bloating every single install of skiboot for no benefit. - It's reducing coverage stats, which is sad. Drop p5ioc2. Signed-off-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw: Move add_cpu_idle_state_properties() to add_opal_node()Shilpasri G Bhat2015-10-301-0/+1
| | | | | | | | | | | | | 05f52a8dd7c7e402896e049fd24f83d56b70aff4 core: Setup the OPAL DT node before platform probe add_cpu_idle_state_properties() was made local to slw.c in the above commit which caused p7 systems to not populate the nap idle state in DT. So moving add_cpu_idle_state_properties() to add_opal_node to fix this bug. Reported-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Nvlink: Add NPU PHB functionsAlistair Popple2015-10-261-1/+1
| | | | | | | | | | | | | | | | | This patch adds support for the NPU Nvlink PHB type. It provides access to each nvlink in the system by exposing them as PCIe devices under a NPU PHB type. Each PCIe device has a configuration space implemented in software which indicates the base address of the DL/TL/PL registers required by the device drivers. It also presents one LSI per device which is used to signal device drivers of changes in device status. The configuration space also adds a vendor specific capability which is used primarily by device drivers to power on an train the IBM PHY. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Add opal_boot_complete to debug descriptorJoel Stanley2015-09-301-1/+2
| | | | | | | | | | | This tells us when we've entered the host. First use case is knowing if we can can rely on host communication working, such as receiving and acting on an opal_msg. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> [stewart@linux.vnet.ibm.com: use real bit field rather than C bitfield] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* slw/timer: SBE based timer supportBenjamin Herrenschmidt2015-09-111-0/+6
| | | | | | | | | | | | | Recent HostBoot & SBE firmware provide a HW timer facility that can be used to implement OPAL timers and thus limit the reliance on the Linux heartbeat. This implements support for it. The side effect is that i2c from Centaurs is now usable. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [stewart@linux.vnet.ibm.com: fix run-timer unit test] Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* move enum ipl_state to hw/fsp/fsp.cStewart Smith2015-09-101-10/+0
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* plat/qemu: Add LPC based RTC supportBenjamin Herrenschmidt2015-07-031-0/+1
| | | | | | | | This adds a driver for standard CMOS RTC chips and use it from the QEMU platform. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Support for Naples LPC serial interruptsBenjamin Herrenschmidt2015-06-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | This adds support for the HW SerIRQ deserializer of the P8 LPC bridge which is properly wired up on Naples. It also adds support for detecting and reporting LPC error interrupts on all P8s. On most platforms (Rhesus is the exception here due to the way it lets Linux handle the UART interrupts directly), we modify the device-tree to properly represent the LPC controller as a cascaded interrupt-controller and the "interrupts" property of LPC devices to contain the actual LPC interrupt number for the device. We add a mechanism for drivers to register specific LPC interrupts, and a "workaround" for pre-Naples P8 which platforms can use to call all of them for when the external FPGA based deserializer is used. There's also a callback on LPC resets which isn't used yet, we need a bit more work on the general LPC error handling, but it can be done a separate patches. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* libflash: start using the blocklevel interface.Cyril Bur2015-06-091-1/+3
| | | | | | | | | | Converted all the libflash calls to use the blocklevel interface, modified all callers to libflash to use the blocklevel interface. This patch should introduce next to no functional change. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Merge PRD rework from stableStewart Smith2015-05-211-0/+4
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| * hw/prd: Expose prd ranges via device treeJeremy Kerr2015-05-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the prd reserved ranges are present in the reserved-ranges nodes in the device tree. While this works, it's difficult to filter the actual PRD ranges from general reserved memory. This change links the prd ranges into the /reserved-memory nodes, by adding ibm,prd-label properties to those used for PRD. This change adds a prd node to the ibm,opal node too, to giver kernel & userspace information about the prd infrastructure provided by OPAL. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
| * core: Add mem_region_nextJeremy Kerr2015-05-211-0/+3
| | | | | | | | | | | | | | This change adds a function to iterate mem_regions. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | Add pr_fmt to do printf/prlog prefixing automagicallyStewart Smith2015-05-121-1/+7
| | | | | | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | Add prlog_once for logging a message only onceJoel Stanley2015-05-071-0/+8
| | | | | | | | | | Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | Preload VPD LID and set up fsp_lid_load() for async queued loadingStewart Smith2015-05-071-0/+1
| | | | | | | | | | | | | | | | This means VPD LID is already loaded before we start preloading kernel and initramfs LIDs, thus ensuring VPD doesn't have to wait for them to finish being read from FSP. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | Asynchronously preload CAPP microcodeStewart Smith2015-05-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Instead of synchronously waiting for CAPP microcode during PCI probe, start preload of CAPP microcode early in boot so that it's present when we need it during PCI probing. On some platforms (astbmc), flash access is serialized, and prior to this patch, the async preload of BOOTKERNEL would have to finish before loading CAPP ucode would start, needlessly slowing boot. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | astbmc: asynchronous preloading of resourcesStewart Smith2015-05-071-2/+3
|/ | | | | | | | | | | | | | Implement start_preload_resource and resource_loaded platform functions for astbmc machines (palmetto, habanero, firestone). This means we start loading kernel and initramfs from flash much earlier in boot, doing things like PCI init concurrently so that by the time we go to boot the payload, it's already loaded. Implementation is a simple queue with a job running on another CPU doing the libflash calls. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Asynchronous LID/Resource loading for FSP systemsStewart Smith2015-03-241-2/+2
| | | | | | | | | | | | | | | This moves away from using fsp_sync_msg in fsp_fetch_data and instead using the platform hooks for start_preload_resource() to actually queue up a load and having the plumbing for checking if a resource is loaded yet. This gets rid of the "pollers called with locks held" warning we got heaps of previously. You can now boot some FSP systems without getting this warning at all. This also sets the stage for starting load of LIDs much earlier to when they're needed, improving boot time. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Change load_resource() API to be all about preloading.Stewart Smith2015-03-231-2/+2
| | | | | | | | | No functional changes in what happens, just have two calls, one for queueing preload the other for waiting until it has loaded. future patches will introduce platform specific queueing. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* occ: Inform OCC of BMC PNOR ownership requestsJeremy Kerr2015-03-041-0/+7
| | | | | | | We need to pass the PNOR access status to the OCCs, as they may write to the PNOR in the event of a checkstop. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* hw/ipmi: Disable flash access when requestedJoel Stanley2015-03-041-0/+3
| | | | | | | | | | | | | | | BMC based systems contain a PNOR to provide flash storage. The host normally has exclusive access to the PNOR, however the BMC may use IPMI to request access to perform functions such as update the firmware. Indicate to users of the flash that the device is busy by taking the lock, and setting a per-flash busy flag, which causes flash operations to return OPAL_BUSY. Minor changes from Jeremy Kerr Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* hw/prd: Add firmware PRD handling subsystemJeremy Kerr2015-03-041-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds Processor Recovery Diagnostics (PRD) code to skiboot firmware. This allows certain hardware RAS events to be handled by a userspace application. The core of the PRD code is a messaging interface to the kernel (and onwards to userspace). PRD events are logged with the prd.c code, and sent to the kernel as opal_msg messages. For responses to these messages, the kernel will reply using a new OPAL call, opal_prd_msg. Only one message is outstanding at a time; we collect events from hardware interrupts (hooked up by subsequent patches), and set per-processor event bits. Once an event has been consumed by the kernel, we clear that event from out pending set, and send any further pending events. Certain events (hardware attentions from the psi layer) need to be masked at interrupt time. For these, we have an acknowledgement facility to clear the mask once the userspace PRD application has cleared the source of the error. Includes multiple contributions from: Neelesh Gupta <neelegup@linux.vnet.ibm.com> Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com> Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* sparse: fix fonction declarationsCédric Le Goater2015-02-261-3/+3
| | | | | Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* OCC/hostservices: Queue pre-preload HBRT lid load requestsAnanth N Mavinakayanahalli2015-02-231-0/+3
| | | | | | | | | There is no guarantee that a hostservices lid load request will arrive after we have cached the required lids. For such cases, queue the request and service them after caching. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/flash: Move flash NVRAM handling to new flash moduleJeremy Kerr2015-02-191-3/+0
| | | | | | | | | | | | | | | | | | Since we want to prevent conflicts between PNOR and NVRAM, this change moves the flash-nvram handling out of flash-nvram.c and into the generic flash module. This way, the OPAL_FLASH_{READ,WRITE,ERASE} API won't conflict with the OPAL_*_NVRAM api. To do this, we use the flash_register function to look for an "NVRAM" partition. If one is found, it is automatically registered as the system NVRAM backend. We also change the rhesus and astmbc platforms to use the common flash code. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/flash: port pnor_load_resource to flash codeJeremy Kerr2015-02-191-1/+2
| | | | | | | | | Since we have a flash device registered as the system flash, use this as a generic load_resource backend. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* core/flash: Add flash APIJeremy Kerr2015-02-191-1/+5
| | | | | | | | | | | | | | | | | | | We'd like to enable access to the system PNOR, on platforms where its present. This change introduces an API for global flash operations: opal_flash_read opal_flash_erase opal_flash_write - plus device-tree bindings to expose the flash details. Since there are other components of the system that use the PNOR (NVRAM and pnor_load_resource), upcoming changes will port this these over to use the new interface. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* occ: Fix clearing of OCC interrupt on remote fixBenjamin Herrenschmidt2014-12-051-1/+1
| | | | | | | | If the OCC interrupt comes from another chip, we incorrectly try to clear it on the local one. This causes hangs at boot on some machines. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* tce: Use TCE macrosNeelesh Gupta2014-12-021-2/+3
| | | | | | | | | Use available TCE mask and size macros to make the code readable and easy to maintain. Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* Merge remote-tracking branch 'ltcgit/master'Benjamin Herrenschmidt2014-11-221-2/+2
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| * Implement skiboot versioningStewart Smith2014-11-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We grab a version from git tags (or SKIBOOT_VERSION environment variable), optionally tack on EXTRA_VERSION (if from git) as well as add things to the git version number if we're ahead of the most recent tag or the tree is dirty. Also fix-up makefiles so that we don't have to rebuild version.c every time you run make. fsp attn area needed updating as we can have >40 character version strings. We also export the version string via device tree rather than just the gitid. For buildroot builds, setting SKIBOOT_VERSION environment variable to the tag you grab will do the correct thing. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* | Add symbolic backtraces and expose skiboot map to LinuxBenjamin Herrenschmidt2014-11-181-0/+6
| | | | | | | | | | | | | | We use a double link technique, doing a first pass with a .o containing a dummy symbol map, then re-linking with a new .o Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Add functions to backtrace into a non-text bufferBenjamin Herrenschmidt2014-11-181-12/+0
| | | | | | | | | | | | Separate text translation from capture of the backtrace Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | Stack checking extensionsBenjamin Herrenschmidt2014-11-171-0/+5
|/ | | | | | | | | | | | This patch adds: - Normal builds are done with -fstack-protector (we want to investigate using -fstack-protector-strong on gcc4.9 but for now we just use that - Build with STACK_CHECK=1 will use -fstack-protector-all and -pg and will check the stack in mcount Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* irq/occ/opal: Add self-sent dummy interruptBenjamin Herrenschmidt2014-10-241-1/+4
| | | | | | | | | | | | | This makes OPAL use the OCC interrupt facility to send itself an interrupt whenever the OPAL event bit is set as a result of an OPAL call that wasn't itself opal_handle_interrupt() or opal_handle_hmi() (both of which we know the OS will already deal with appropriately). This ensures that OPAL event changes are notified to Linux via its interrupt path which is necessary for it to properly broadcast the state change to its various clients. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* uart: Give UART it's own OPAL console callbacks instead of dummy consoleBenjamin Herrenschmidt2014-10-151-1/+3
| | | | | | | | | | | This means the Linux output no longer gets into our internal log, which makes dumping of it from Linux a lot nicer. It will also allow us to improve the way we do the bufferring for Linux and to exploit eventually the TX interrupts. It will also allow us to implement some form of timeouts for the OPAL console variant of it so we don't get stuck of the BMC doesn't consume from the virtual UART. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* core: Setup the OPAL DT node before platform probeBenjamin Herrenschmidt2014-09-011-1/+0
| | | | | | | | | The platform probe code might want to add things to it. While at it, make add_cpu_idle_state_properties() local to slw.c and call it from slw_init() instead of from add_opal_node(). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* attn: Dump backtrace to bufferAruna Balakrishnaiah2014-08-131-0/+1
| | | | | | | | | | Existing backtrace will dump the backtrace to stderr. __backtrace will dump the backtrace to buffer. backtrace() will call __backtrace internally and dump it to stderr. Signed-off-by Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Add fake RTC to generic platformmillerjo@us.ibm.com2014-08-081-0/+2
| | | | | | | Adds a fake RTC that can be initialized via a named reserve in the device tree that may, at some point, be on NVRAM. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Make log level thresholds dynamic in debug_descriptor rather than staticStewart Smith2014-08-081-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables (advanced) users to vary what level of output they want at runtime in the memory console and through console drivers (fsp/uart) You can vary two things by poking in the debug descriptor: a) what log level is printed at all e.g. only turn on PR_TRACE at specific points during runtime b) what log level goes out the fsp/uart console defaults to PR_PRINTF We use two 4bit numbers (1 byte) for this in debug descriptor (saving some space, not needlessly wasting space that we may want in future). The default is 0x75 (7=PR_DEBUG to in memory console, 5=PR_PRINTF to drivers) If you write 0x77 you will get debug info on uart/fsp console as well as in memory. If you write 0x95 you get PR_INSANE in memory but still only PR_NOTICE through drivers. People who write something like 0x1f will get a very quiet boot indeed. A future patch would be to (when possible) peek at device tree entries for if we should change the default. A future patch would add an OPAL API to get/set this. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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