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* nx-compress: PR_DEBUG not prerror in the normal caseStewart Smith2017-10-061-1/+1
| | | | Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* NX: Add P9 NX support for gzip compression engineHaren Myneni2017-08-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Power 9 introduces NX gzip compression engine. This patch adds gzip compression support in NX. Virtual Accelerator Switch (VAS) is used to access NX gzip engine and the channel configuration will be done with the receive FIFO. So RxFIFO address, logical partition ID (lpid), process ID (pid) and thread ID (tid) are used to configure RxFIFO. P9 NX supports high and normal priority FIFOS. Skiboot configures User Mode Access Control (UMAC) noitify match register with these values and also enables other registers to enable / disable the engine. Creates the following device-tree entries to provide RxFIFO address, RxFIFO size, Fifo priority, lpid, pid and tid values so that kernel can drive P9 NX gzip engine. The following nodes are located under an xscom node: /xscom@<xscom_addr>/nx@<nx_addr> /ibm,gzip-high-fifo : High priority gzip RxFIFO /ibm,gzip-normal-fifo : Normal priority gzip RxFIFO Each RxFIFO node contains: compatible : ibm,p9-nx-gzip priority : High or Normal rx-fifo-address : RxFIFO address rx-fifo-size : RxFIFO size lpid : 0xfff (1's for 12 bits in UMAC notify match register) pid : gzip coprocessor type tid : counter for gzip Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* NX: Add P9 NX support for 842 compression engineHaren Myneni2017-08-011-1/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds changes needed for 842 compression engine on power 9. Virtual Accelerator Switch (VAS) is used to access NX 842 engine on P9 and the channel setup will be done with receive FIFO. So RxFIFO address, logical partition ID (lpid), process ID (pid) and thread ID (tid) are used for this setup. p9 NX supports high and normal priority FIFOs. skiboot is not involved to process data with 842 engine, but configures User Mode Access Control (UMAC) noitify match register with these values and export them to kernel with device-tree entries. Also configure registers to setup and enable / disable the engine with the appropriate registers. Creates the following device-tree entries to provide RxFIFO address, RxFIFO size, Fifo priority, lpid, pid and tid values so that kernel can drive P9 NX 842 engine. The following nodes are located under an xscom node: /xscom@<xscom_addr>/nx@<nx_addr> /ibm,842-high-fifo : High priority 842 RxFIFO /ibm,842-normal-fifo : Normal priority 842 RxFIFO Each RxFIFO node contains: compatible : ibm,p9-nx-842 priority : High or Normal rx-fifo-address : RxFIFO address rx-fifo-size : RXFIFO size lpid : 0xfff (1's for 12 bits set in UMAC notify match register) pid : 842 coprocessor type tid : Counter for 842 Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
* NX: Organize NX compression code to include 842 and gzip supportHaren Myneni2017-08-011-0/+34
P9 NX also supports gzip compression. So this patch creates nx-compress.c and reorg nx-842.c code so that common functions that are needed for both 842 and gzip compression will be moved in to nx-compress.c. This patch does not change the actual functionality. Signed-off-by: Haren Myneni <hmyneni@us.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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