| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Stability improvements in microcode for stop4/stop5 are
available in upstream hcode images. Stop4 and stop5 can
be safely enabled by default.
Use ~0xE0000000 to cut all but stop0,1,2 in case there
are any issues with stop4/5.
example:
nvram -p ibm,skiboot --update-config opal-stop-state-disable-mask=0x1FFFFFFF
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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In the recent patch:
eddff9bf40 hmi: Clear unknown debug trigger
I rebased the code from an older skiboot before the HMI rework. When I
did this, I missed the handled flag. Without this the HMER is not
cleared properly and the HMI keeps happening.
This properly sets the handled flag and hence clears the HMER bit.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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op-build commit 736a08b996e292a449c4996edb264011dfe56a40
added hcode to the VERSION partition, let's parse it out
and let the user know.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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BMC Get device ID command gives BMC firmware version details. Lets add this
to device tree. User space tools will use this information to display BMC
version details.
Stewart,
I have added bmc information under /ibm,firmware-version node as its firmware
version. But may be we should add new node (/bmc/firmware). So that we can
keep BMC related information separately. Let me know your thoughts on this.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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POWER9 adds 32 bit carry and overflow bits to the XER, but we need to
set the relevant CTRL1 bit to enable them.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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When on ppc64le and CROSS is not set by the environment, make assumes
ppc64 and sets a default CROSS. Check for ppc64le as well, so that
'make' works out of the box on ppc64le.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This snuck in recently.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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While CROSS can be set to a ppc64le toolchian, we don't want to build
for that target. Hardcode the target to powerpc64-linux-gnu.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Link with ld instead of gcc so we can build with clang as cc.
Remove the linker script and unnecessary flags. The application links
just fine without them.
Add cflags required by clang in order to build for the correct target.
Remove the dependency file generation. The assembly files don't include
any headers, so they weren't doing anything.
Simplify clean rule, as the $(RM) alias does -f for us, and we no longer
have .d files.
Build tested on ppc64le and amd64. Booted in Qemu on both using:
qemu-system-ppc64 -M powernv -nodefaults -nographic -serial stdio \
-kernel test/hello_world/hello_kernel/hello_kernel
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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When running this:
qemu-system-ppc64 -m 2G -M powernv -kernel debian-jessie-vmlinux \
-initrd debian-jessie-initrd.gz -nographic \
-device ipmi-bmc-sim,id=ipmi0 -device isa-ipmi-bt,bmc=ipmi0 \
-hda /tmp/debian-jessie-install.qcow2.kDubGYDrqa
We die with this error:
qemu-system-ppc64: -hda /tmp/debian-jessie-install.qcow2.kDubGYDrqa: machine type does not support if=ide,bus=0,unit=0
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Docker tries to cache stuff and it bites us.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This contains the latest features. It's close to upstream, but there's
enough stuff in there that it probably makes sense to continue using it
for now.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We can just use whatever qemu-img binary that's laying around,
including the distro one.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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p9_stop_thread should fail the operation if it finds the thread was
already quiescd. This implies something else is doing direct controls
on the thread (e.g., pdbg) or there is some exceptional condition we
don't know how to deal with. Proceeding here would cause things to
trample on each other, for example the hard lockup watchdog trying to
send a sreset to the core while it is stopped for debugging with pdbg
will end in tears.
If p9_stop_thread times out waiting for the thread to quiesce, do
not hit it with a core_start direct control, because we don't know
what state things are in and doing more things at this point is worse
than doing nothing. There is no good recipe described in the workbook
to de-assert the core_stop control if it fails to quiesce the thread.
After timing out here, the thread may eventually quiesce and get
stuck, but that's simpler to debug than undefied behaviour.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Firstly, p9_cont_thread should check that the thread actually was
quiesced before it tries to resume it. Anything could happen if we
try this from an arbitrary thread state.
Then when resuming a quiesced thread that is inactive or stopped (in
a stop idle state), we must not send a core_start direct control,
clear_maint must be used in these cases.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The minor version increments of the pstate table are backward
compatible. The minor version is changed when the pstate table
remains same and the existing reserved bytes are used for pointing
new data. So use only major version number while parsing the pstate
table. This will allow old skiboot to parse the pstate table and
handle minor version updates.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Now that skiboot supports building with clang we can use a modern distro
to cross compile using that compiler. Ubuntu 18.04 ships with clang 6,
so start with that.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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In today's lesson, Stewart learns shell.
Fixes: e101e85c9ff65e82f7ede4d5541d921b4a3ed923
Reported-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Start doing builds on latest LTS. We can simplify the build script a
little, as we know that this version of Ubuntu ships with an ARM cross
compiler and a Qemu that can run the tests.
This provides us with:
gcc 7.3.0 (for native and cross-builds)
qemu 2.11
clang 6
Simplify the docker script a little by merging the two different install
lines, and getting rid of the duplicate 'apt-get update' steps. We now
install clang in preparation for future shenanigans, and use the system
qemu instead of building one ourselves.
Signed-off-by: Joel Stanley <joel@jms.id.au>
[stewart: allow 18.04 to fail as we stabilise it in travis]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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On some systems, seeing hangs like this when Linux starts:
[ 170.027252763,5] OCC: All Chip Rdy after 0 ms
[ 170.062930145,5] INIT: Starting kernel at 0x20011000, fdt at 0x30ae0530 366247 bytes)
[ 171.238270428,5] OPAL: Switch to little-endian OS
If you look at the in memory skiboot console (or do 'nvram -p
ibm,skiboot --update-config log-level-driver=7') we see the console get
spammed with:
[ 5209.109790675,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000
[ 5209.109792716,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000
[ 5209.109794695,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000
[ 5209.109796689,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000
We're taking the debug trigger (bit 17) early on, before the
hmi_debug_trigger function in the kernel is set up.
This clears the HMI in Skiboot and reports to the kernel instead of
bringing down the machine.
Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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hw/fsp/fsp.c:1011:17: warning: passing an object that undergoes default argument promotion to
'va_start' has undefined behavior [-Wvarargs]
va_start(list, add_words);
^
hw/fsp/fsp.c:1007:59: note: parameter of type 'u8' (aka 'unsigned char') is declared here
void fsp_fillmsg(struct fsp_msg *msg, u32 cmd_sub_mod, u8 add_words, ...)
^
[CC] platforms/ibm-fsp/apollo-pci.o
hw/fsp/fsp.c:1026:17: warning: passing an object that undergoes default argument promotion to
'va_start' has undefined behavior [-Wvarargs]
va_start(list, add_words);
^
hw/fsp/fsp.c:1016:47: note: parameter of type 'u8' (aka 'unsigned char') is declared here
struct fsp_msg *fsp_mkmsg(u32 cmd_sub_mod, u8 add_words, ...)
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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These make clang angry:
hw/imc.c:690:29: warning: equality comparison with extraneous parentheses [-Wparentheses-equality]
if ((wakeup_engine_state == WAKEUP_ENGINE_PRESENT)) {
~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~
hw/imc.c:690:29: note: remove extraneous parentheses around the comparison to silence this warning
if ((wakeup_engine_state == WAKEUP_ENGINE_PRESENT)) {
~ ^ ~
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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core/pci-quirk.c:70:7: warning: missing field 'vendor_id' initializer
[-Wmissing-field-initializers]
{NULL}
^
Instead use an empty initaliser, as this is what the kernel does.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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There is a difference between the asm-offsets.s generated by clang and GCC:
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We were using gcc instead of ld. This isn't required, as we're disabling
all of the things that gcc could do for us.
This helps enable clang as the compiler, with GNU ld used for the
final linking step.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Clang doesn't know about msgsnd, msgclr, msgsync yet. Open code them
using .long asm() calls.
Instead of introducing ifdef hell, do this unconditionally for all
compilers as the code generation does not change.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We get the same code generation using the builtin:
GCC 7.3:
a3584: 7d 29 00 f4 popcntb r9,r9
a3588: 7d 29 01 74 prtyd r9,r9
GCC 6.3:
a0bfc: 7d 29 00 f4 popcntb r9,r9
a0c00: 7d 29 01 74 prtyd r9,r9
Clang 7 (and clang 6):
bd48c: 7c e7 03 f4 popcntd r7,r7
bd490: 54 e7 07 fe clrlwi r7,r7,31
(Not sure why the clang builtin generates different code)
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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asm/head.S:766:17: error: unknown operand
or %r0,%r4,%r5,
^
asm/head.S:800:17: error: unknown operand
or %r0,%r4,%r5,
^
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Clang doesn't like some of the warnings we have, so silence the ones we
know about in order to enable the build to succeed. These should be
investigated and removed in once the code issues are resolved.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Clang needs to be told which target it's building for, as unlike GCC the
one binary targets many architectures.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Clang errors out when attempting to build with these flags present.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This breaks the test when you don't have the SKIBOOT_ENABLE_MAMBO_STB
flag set, as the binary is removed as an intermediate artefact (I
suspect) when building the sreset_world.stb binary.
Fixes: 1ddf7e51936f ("Mambo: run hello_world and sreset_world tests with Secure and Trusted Boot")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Practically speaking, I don't think you'd *currently* hit this.
Found with Clang's scan-build.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Acked-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Balbir singh <bsingharora@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We've got a great disassembly function built-in, reuse
that to implement di (as in xmon).
Improves 1bcd6d84: (external/mambo: Add di command to decode instructions)
Signed-off-by: Balbir singh <bsingharora@gmail.com>
Acked-By: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This allows Qemu to work out of the box if the user has an appropriate
Qemu installed.
Support for running TCG power guests has come a long way from when we
first added these test scripts. It makes sense to use the system Qemu
where possible, as for most people this will succeed.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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After commit 35c66b8ce5a2 ("SLW: Move MAMBO simulator checks to
slw_init"), mambo boot no longer calls add_cpu_idle_state_properties()
and as such we never enable stop states.
After adding the call back, we get more testing coverage as well
as faster mambo SMT boots.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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CFG Write Request Timeout was incorrectly set to informational and not
fatal for both non-CAPI and CAPI, so set it to fatal. This was a
mistake in the specification. Correcting this fixes a niche bug in
escalation (which is necessary on pre-DD2.2) that can cause a checkstop
due to a NCU timeout.
In addition, set the values in the timeout control registers to match.
This fixes an extremely rare and unreproducible bug, though the current
timings don't make sense since they're higher than the NCU timeout (16)
which will checkstop the machine anyway.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> # CAPI
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We were getting:
[ 0.047155847,5] INIT: Starting kernel at 0x0, fdt at 0x30409d70 10390 bytes)
Now it says:
[ 0.048059045,5] INIT: Starting kernel at 0x0, fdt at 0x30409d80 10406 bytes
Fixes: 293ca03683bf ("init: print the FDT blob size in decimal")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Suggested-by: Daniel Black <danielgb@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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SBE on P9 provides one shot programmable timer facility. We can use this
to implement OPAL timers and hence limit the reliance on the Linux
heartbeat (similar to HW timer facility provided by SLW on P8).
Design:
- We will continue to run Linux heartbeat.
- Each chip has SBE. This patch always schedules timer on SBE on master chip.
- Start timer option starts new timer or modifies an active timer for the
specified timeout.
- SBE expects timeout value in microseconds. We track timeout value in TB.
Hence we convert tb to microseconds before sending request to SBE.
- We are requesting ack from SBE for timer message. It gaurantees that
SBE has scheduled timer.
- Disabling SBE timer
We expect SBE to send timer expiry interrupt whenever timer expires. We
wait for 10 more ms before disabling timer.
In future we can consider below alternative approaches:
- Presently SBE timer disable is permanent (until we reboot system).
SBE sends "I'm back" interrupt after reset. We can consider restarting
timer after SBE reset.
- Reset SBE and start timer again.
- Each chip has SBE. On multi chip system we can try to schedule timer
on different chip.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Lets move P8 timer support code from slw.c to sbe-p8.c (as suggested
by BenH). There is a difference between timer support in P8 and P9.
Hence I think it makes sense to name it as sbe-p8.c.
Note that this is pure code movement and renaming functions/variables.
No functionality changes.
Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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SBE (Self Boot Engine) on P9 has two different jobs:
- Boot the chip up to the point the core is functional
- Provide various services like timer, scom, stash MPIPL, etc., at runtime
OPAL can communicate to SBE via a set of data and control registers provided
by the PSU block in P9 chip.
- Four 8 byte registers for Host to send command packets to SBE
- Four 8 byte registers for SBE to send response packets to Host
- Two doorbell registers (1 on each side) to alert either party
when data is placed in above mentioned data register
Protocol constraints:
Only one command is accepted in the command buffer until the response for the
command is enqueued in the response buffer by SBE.
Usage:
We will use SBE for various purposes like timer, MPIPL, etc.
This patch implements the SBE MBOX spec for OPAL to communicate with
SBE.
Design consideration:
- Each chip has SBE. We need to track SBE messages per chip. Hence added
per chip sbe structure and list of messages to that chip
- SBE accepts only one command at a time. Hence serialized MBOX commands.
- OPAL gets interrupted once SBE sets doorbell register
- OPAL has to clear doorbell register after reading response
- Every command class has timeout option. Timed out messages are discarded
- SBE MBOX commands can be classified into four types :
- Those that must be sent to the master only (ex: sending MDST/MDDT info)
- Those that must be sent to slaves only (ex: continue MPIPL)
- Those that must be sent to all chips (ex: close insecure window)
- Those that can be sent to any chip (ex: timer)
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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