blob: 30efcd6643b1a10bc0f8a9f6db6fc94b64534610 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
|
/*
* This file is part of wl1271
*
* Copyright (C) 2010 Nokia Corporation
*
* Contact: Luciano Coelho <luciano.coelho@nokia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __INI_H__
#define __INI_H__
#define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
struct wl1271_ini_general_params {
u8 ref_clock;
u8 settling_time;
u8 clk_valid_on_wakeup;
u8 dc2dc_mode;
u8 dual_mode_select;
u8 tx_bip_fem_auto_detect;
u8 tx_bip_fem_manufacturer;
u8 general_settings;
u8 sr_state;
u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
} __packed;
#define WL128X_INI_MAX_SETTINGS_PARAM 4
struct wl128x_ini_general_params {
u8 ref_clock;
u8 settling_time;
u8 clk_valid_on_wakeup;
u8 tcxo_ref_clock;
u8 tcxo_settling_time;
u8 tcxo_valid_on_wakeup;
u8 tcxo_ldo_voltage;
u8 xtal_itrim_val;
u8 platform_conf;
u8 dual_mode_select;
u8 tx_bip_fem_auto_detect;
u8 tx_bip_fem_manufacturer;
u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
u8 sr_state;
u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
} __packed;
#define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
struct wl1271_ini_band_params_2 {
u8 rx_trace_insertion_loss;
u8 tx_trace_loss;
u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;
#define WL1271_INI_CHANNEL_COUNT_2 14
struct wl128x_ini_band_params_2 {
u8 rx_trace_insertion_loss;
u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;
#define WL1271_INI_RATE_GROUP_COUNT 6
struct wl1271_ini_fem_params_2 {
__le16 tx_bip_ref_pd_voltage;
u8 tx_bip_ref_power;
u8 tx_bip_ref_offset;
u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
u8 rx_fem_insertion_loss;
u8 degraded_low_to_normal_thr;
u8 normal_to_degraded_high_thr;
} __packed;
#define WL128X_INI_RATE_GROUP_COUNT 7
/* low and high temperatures */
#define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
struct wl128x_ini_fem_params_2 {
__le16 tx_bip_ref_pd_voltage;
u8 tx_bip_ref_power;
u8 tx_bip_ref_offset;
u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
u8 rx_fem_insertion_loss;
u8 degraded_low_to_normal_thr;
u8 normal_to_degraded_high_thr;
} __packed;
#define WL1271_INI_CHANNEL_COUNT_5 35
#define WL1271_INI_SUB_BAND_COUNT_5 7
struct wl1271_ini_band_params_5 {
u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;
struct wl128x_ini_band_params_5 {
u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;
struct wl1271_ini_fem_params_5 {
__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
u8 degraded_low_to_normal_thr;
u8 normal_to_degraded_high_thr;
} __packed;
struct wl128x_ini_fem_params_5 {
__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
WL128X_INI_PD_VS_TEMPERATURE_RANGES];
u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
u8 degraded_low_to_normal_thr;
u8 normal_to_degraded_high_thr;
} __packed;
/* NVS data structure */
#define WL1271_INI_NVS_SECTION_SIZE 468
#define WL1271_INI_FEM_MODULE_COUNT 2
#define WL1271_INI_LEGACY_NVS_FILE_SIZE 800
struct wl1271_nvs_file {
/* NVS section */
u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
/* INI section */
struct wl1271_ini_general_params general_params;
u8 padding1;
struct wl1271_ini_band_params_2 stat_radio_params_2;
u8 padding2;
struct {
struct wl1271_ini_fem_params_2 params;
u8 padding;
} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
struct wl1271_ini_band_params_5 stat_radio_params_5;
u8 padding3;
struct {
struct wl1271_ini_fem_params_5 params;
u8 padding;
} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
} __packed;
struct wl128x_nvs_file {
/* NVS section */
u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
/* INI section */
struct wl128x_ini_general_params general_params;
u8 fem_vendor_and_options;
struct wl128x_ini_band_params_2 stat_radio_params_2;
u8 padding2;
struct {
struct wl128x_ini_fem_params_2 params;
u8 padding;
} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
struct wl128x_ini_band_params_5 stat_radio_params_5;
u8 padding3;
struct {
struct wl128x_ini_fem_params_5 params;
u8 padding;
} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
} __packed;
#endif
|
