summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/mpc8548cds_36b.dts
blob: 10e551b11bd6bd6859458360ff69cd11c03bcf71 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
/*
 * MPC8548 CDS Device Tree Source (36-bit address map)
 *
 * Copyright 2012 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/include/ "fsl/mpc8548si-pre.dtsi"

/ {
	model = "MPC8548CDS";
	compatible = "MPC8548CDS", "MPC85xxCDS";

	memory {
		device_type = "memory";
		reg = <0 0 0x0 0x8000000>;	// 128M at 0x0
	};

	board_lbc: lbc: localbus@fe0005000 {
		reg = <0xf 0xe0005000 0 0x1000>;

		ranges = <0x0 0x0 0xf 0xff000000 0x01000000
			  0x1 0x0 0xf 0xf8004000 0x00001000>;

	};

	board_soc: soc: soc8548@fe0000000 {
		ranges = <0 0xf 0xe0000000 0x100000>;
	};

	board_pci0: pci0: pci@fe0008000 {
		reg = <0xf 0xe0008000 0 0x1000>;
		ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
			  0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
		clock-frequency = <66666666>;
	};

	pci1: pci@fe0009000 {
		reg = <0xf 0xe0009000 0 0x1000>;
		ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
			  0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

			/* IDSEL 0x15 */
			0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
			0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
			0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
			0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
	};

	pci2: pcie@fe000a000 {
		reg = <0xf 0xe000a000 0 0x1000>;
		ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;
		};
	};

	rio: rapidio@fe00c0000 {
		reg = <0xf 0xe00c0000 0x0 0x20000>;
		port1 {
			ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
		};
	};
};

/*
 * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
 * for interrupt-map & interrupt-map-mask.
 */

/include/ "fsl/mpc8548si-post.dtsi"
/include/ "mpc8548cds.dtsi"
OpenPOWER on IntegriCloud