summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/omap36xx.dtsi
blob: b7c7bd96c4041e70752e64c7f70c16c4d7ff4456 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
/*
 * Device Tree Source for OMAP3 SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include "omap3.dtsi"

/ {
	aliases {
		serial3 = &uart4;
	};

	cpus {
		/* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
		cpu@0 {
			operating-points = <
				/* kHz    uV */
				300000  1012500
				600000  1200000
				800000  1325000
			>;
			clock-latency = <300000>; /* From legacy driver */
		};
	};

	ocp {
		uart4: serial@49042000 {
			compatible = "ti,omap3-uart";
			reg = <0x49042000 0x400>;
			interrupts = <80>;
			dmas = <&sdma 81 &sdma 82>;
			dma-names = "tx", "rx";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
		};

		omap3_pmx_core2: pinmux@480025a0 {
			compatible = "ti,omap3-padconf", "pinctrl-single";
			reg = <0x480025a0 0x5c>;
			#address-cells = <1>;
			#size-cells = <0>;
			#interrupt-cells = <1>;
			interrupt-controller;
			pinctrl-single,register-width = <16>;
			pinctrl-single,function-mask = <0xff1f>;
		};
	};
};
OpenPOWER on IntegriCloud