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/*
* Copyright 2013 Free Electrons
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/*
* The CFA-10055 is an expansion board for the CFA-10036 module and
* CFA-10037, thus we need to include the CFA-10037 DTS.
*/
#include "imx28-cfa10037.dts"
/ {
model = "Crystalfontz CFA-10056 Board";
compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
apb@80000000 {
apbh@80000000 {
pinctrl@80018000 {
spi2_pins_cfa10056: spi2-cfa10056@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP2_SCK__GPIO_2_16
MX28_PAD_SSP2_MOSI__GPIO_2_17
MX28_PAD_SSP2_MISO__GPIO_2_18
MX28_PAD_AUART1_TX__GPIO_3_5
>;
fsl,drive-strength = <1>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
lcdif_pins_cfa10056: lcdif-10056@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_RD_E__LCD_VSYNC
MX28_PAD_LCD_WR_RWN__LCD_HSYNC
MX28_PAD_LCD_RS__LCD_DOTCLK
MX28_PAD_LCD_CS__LCD_ENABLE
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
lcdif_pins_cfa10056_pullup: lcdif-10056-pullup@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_RESET__GPIO_3_30
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <1>;
};
};
lcdif@80030000 {
pinctrl-names = "default";
pinctrl-0 = <&lcdif_24bit_pins_a
&lcdif_pins_cfa10056
&lcdif_pins_cfa10056_pullup >;
display = <&display>;
status = "okay";
display: display {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <32000000>;
hactive = <480>;
vactive = <800>;
hback-porch = <2>;
hfront-porch = <2>;
vback-porch = <2>;
vfront-porch = <2>;
hsync-len = <5>;
vsync-len = <5>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};
};
spi2 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_cfa10056>;
status = "okay";
gpio-sck = <&gpio2 16 0>;
gpio-mosi = <&gpio2 17 0>;
gpio-miso = <&gpio2 18 0>;
cs-gpios = <&gpio3 5 0>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
hx8369: hx8369@0 {
compatible = "himax,hx8369a", "himax,hx8369";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
gpios-reset = <&gpio3 30 0>;
};
};
};
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