/* * Copyright (c) 2010 Atheros Communications Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include "hw.h" /** * ar9003_hw_set_channel - set channel on single-chip device * @ah: atheros hardware structure * @chan: * * This is the function to change channel on single-chip devices, that is * all devices after ar9280. * * This function takes the channel value in MHz and sets * hardware channel value. Assumes writes have been enabled to analog bus. * * Actual Expression, * * For 2GHz channel, * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) * (freq_ref = 40MHz) * * For 5GHz channel, * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) * (freq_ref = 40MHz/(24>>amodeRefSel)) * * For 5GHz channels which are 5MHz spaced, * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) * (freq_ref = 40MHz) */ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ return 0; } /** * ar9003_hw_spur_mitigate - convert baseband spur frequency * @ah: atheros hardware structure * @chan: * * For single-chip solutions. Converts to baseband spur frequency given the * input channel frequency and compute register settings below. * * Spur mitigation for MRC CCK */ static void ar9003_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ } static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ return 0; } static void ar9003_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ } static void ar9003_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ } static int ar9003_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ return -1; } static void ar9003_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ } static void ar9003_hw_mark_phy_inactive(struct ath_hw *ah) { /* TODO */ } static void ar9003_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) { /* TODO */ } static bool ar9003_hw_rfbus_req(struct ath_hw *ah) { /* TODO */ return false; } static void ar9003_hw_rfbus_done(struct ath_hw *ah) { /* TODO */ } static void ar9003_hw_enable_rfkill(struct ath_hw *ah) { /* TODO */ } static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value) { /* TODO */ } void ar9003_hw_attach_phy_ops(struct ath_hw *ah) { struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); priv_ops->rf_set_freq = ar9003_hw_set_channel; priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate; priv_ops->compute_pll_control = ar9003_hw_compute_pll_control; priv_ops->set_channel_regs = ar9003_hw_set_channel_regs; priv_ops->init_bb = ar9003_hw_init_bb; priv_ops->process_ini = ar9003_hw_process_ini; priv_ops->set_rfmode = ar9003_hw_set_rfmode; priv_ops->mark_phy_inactive = ar9003_hw_mark_phy_inactive; priv_ops->set_delta_slope = ar9003_hw_set_delta_slope; priv_ops->rfbus_req = ar9003_hw_rfbus_req; priv_ops->rfbus_done = ar9003_hw_rfbus_done; priv_ops->enable_rfkill = ar9003_hw_enable_rfkill; priv_ops->set_diversity = ar9003_hw_set_diversity; }