/* * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC * * Copyright (C) 2011 Atmel, * 2011 Nicolas Ferre , * 2011 Jean-Christophe PLAGNIOL-VILLARD * * Licensed under GPLv2 or later. */ /include/ "skeleton.dtsi" / { model = "Atmel AT91SAM9260 family SoC"; compatible = "atmel,at91sam9260"; interrupt-parent = <&aic>; aliases { serial0 = &dbgu; serial1 = &usart0; serial2 = &usart1; serial3 = &usart2; serial4 = &usart3; serial5 = &usart4; serial6 = &usart5; gpio0 = &pioA; gpio1 = &pioB; gpio2 = &pioC; tcb0 = &tcb0; tcb1 = &tcb1; i2c0 = &i2c0; }; cpus { cpu@0 { compatible = "arm,arm926ejs"; }; }; memory { reg = <0x20000000 0x04000000>; }; ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; atmel,external-irqs = <29 30 31>; }; ramc0: ramc@ffffea00 { compatible = "atmel,at91sam9260-sdramc"; reg = <0xffffea00 0x200>; }; pmc: pmc@fffffc00 { compatible = "atmel,at91rm9200-pmc"; reg = <0xfffffc00 0x100>; }; rstc@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; }; shdwc@fffffd10 { compatible = "atmel,at91sam9260-shdwc"; reg = <0xfffffd10 0x10>; }; pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 4 7>; }; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; interrupts = <17 4 0 18 4 0 19 4 0>; }; tcb1: timer@fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; interrupts = <26 4 0 27 4 0 28 4 0>; }; pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; ranges = <0xfffff400 0xfffff400 0x600>; atmel,mux-mask = < /* A B */ 0xffffffff 0xffc00c3b /* pioA */ 0xffffffff 0x7fff3ccf /* pioB */ 0xffffffff 0x007fffff /* pioC */ >; /* shared pinctrl settings */ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = <1 14 0x1 0x0 /* PB14 periph A */ 1 15 0x1 0x1>; /* PB15 periph with pullup */ }; }; uart0 { pinctrl_uart0: uart0-0 { atmel,pins = <1 4 0x1 0x0 /* PB4 periph A */ 1 5 0x1 0x0>; /* PB5 periph A */ }; pinctrl_uart0_rts_cts: uart0_rts_cts-0 { atmel,pins = <1 26 0x1 0x0 /* PB26 periph A */ 1 27 0x1 0x0>; /* PB27 periph A */ }; pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 { atmel,pins = <1 24 0x1 0x0 /* PB24 periph A */ 1 22 0x1 0x0>; /* PB22 periph A */ }; pinctrl_uart0_dcd: uart0_dcd-0 { atmel,pins = <1 23 0x1 0x0>; /* PB23 periph A */ }; pinctrl_uart0_ri: uart0_ri-0 { atmel,pins = <1 25 0x1 0x0>; /* PB25 periph A */ }; }; uart1 { pinctrl_uart1: uart1-0 { atmel,pins = <2 6 0x1 0x1 /* PB6 periph A with pullup */ 2 7 0x1 0x0>; /* PB7 periph A */ }; pinctrl_uart1_rts_cts: uart1_rts_cts-0 { atmel,pins = <1 28 0x1 0x0 /* PB28 periph A */ 1 29 0x1 0x0>; /* PB29 periph A */ }; }; uart2 { pinctrl_uart2: uart2-0 { atmel,pins = <1 8 0x1 0x1 /* PB8 periph A with pullup */ 1 9 0x1 0x0>; /* PB9 periph A */ }; pinctrl_uart2_rts_cts: uart2_rts_cts-0 { atmel,pins = <0 4 0x1 0x0 /* PA4 periph A */ 0 5 0x1 0x0>; /* PA5 periph A */ }; }; uart3 { pinctrl_uart3: uart3-0 { atmel,pins = <2 10 0x1 0x1 /* PB10 periph A with pullup */ 2 11 0x1 0x0>; /* PB11 periph A */ }; pinctrl_uart3_rts_cts: uart3_rts_cts-0 { atmel,pins = <3 8 0x2 0x0 /* PB8 periph B */ 3 10 0x2 0x0>; /* PB10 periph B */ }; }; uart4 { pinctrl_uart4: uart4-0 { atmel,pins = <0 31 0x2 0x1 /* PA31 periph B with pullup */ 0 30 0x2 0x0>; /* PA30 periph B */ }; }; uart5 { pinctrl_uart5: uart5-0 { atmel,pins = <2 12 0x1 0x1 /* PB12 periph A with pullup */ 2 13 0x1 0x0>; /* PB13 periph A */ }; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; interrupts = <2 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; }; pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; interrupts = <3 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; }; pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; interrupts = <4 4 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; }; }; dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 4 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; status = "disabled"; }; usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; interrupts = <6 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; status = "disabled"; }; usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; interrupts = <7 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "disabled"; }; usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; interrupts = <8 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "disabled"; }; usart3: serial@fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; interrupts = <23 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; status = "disabled"; }; usart4: serial@fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; interrupts = <24 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; status = "disabled"; }; usart5: serial@fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; interrupts = <25 4 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5>; status = "disabled"; }; macb0: ethernet@fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; interrupts = <21 4 3>; status = "disabled"; }; usb1: gadget@fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; interrupts = <10 4 2>; status = "disabled"; }; i2c0: i2c@fffac000 { compatible = "atmel,at91sam9260-i2c"; reg = <0xfffac000 0x100>; interrupts = <11 4 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; adc0: adc@fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; interrupts = <5 4 0>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>; atmel,adc-num-channels = <4>; atmel,adc-startup-time = <15>; atmel,adc-channel-base = <0x30>; atmel,adc-drdy-mask = <0x10000>; atmel,adc-status-register = <0x1c>; atmel,adc-trigger-register = <0x04>; trigger@0 { trigger-name = "timer-counter-0"; trigger-value = <0x1>; }; trigger@1 { trigger-name = "timer-counter-1"; trigger-value = <0x3>; }; trigger@2 { trigger-name = "timer-counter-2"; trigger-value = <0x5>; }; trigger@3 { trigger-name = "external"; trigger-value = <0x13>; trigger-external; }; }; }; nand0: nand@40000000 { compatible = "atmel,at91rm9200-nand"; #address-cells = <1>; #size-cells = <1>; reg = <0x40000000 0x10000000 0xffffe800 0x200 >; atmel,nand-addr-offset = <21>; atmel,nand-cmd-offset = <22>; gpios = <&pioC 13 0 &pioC 14 0 0 >; status = "disabled"; }; usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; interrupts = <20 4 2>; status = "disabled"; }; }; i2c@0 { compatible = "i2c-gpio"; gpios = <&pioA 23 0 /* sda */ &pioA 24 0 /* scl */ >; i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; };