From 0c91c1a7012911e4b0180a1c1ae258e2b706f987 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 11:16:20 +0900 Subject: sh: Move smc37c93x.h for SystemH board use. SystemH needs this header as well, not just 770x SE. Signed-off-by: Paul Mundt --- include/asm-sh/se/smc37c93x.h | 190 ------------------------------------------ include/asm-sh/smc37c93x.h | 190 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 190 insertions(+), 190 deletions(-) delete mode 100644 include/asm-sh/se/smc37c93x.h create mode 100644 include/asm-sh/smc37c93x.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/se/smc37c93x.h b/include/asm-sh/se/smc37c93x.h deleted file mode 100644 index 585da2a8fc45..000000000000 --- a/include/asm-sh/se/smc37c93x.h +++ /dev/null @@ -1,190 +0,0 @@ -#ifndef __ASM_SH_SMC37C93X_H -#define __ASM_SH_SMC37C93X_H - -/* - * linux/include/asm-sh/smc37c93x.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * SMSC 37C93x Super IO Chip support - */ - -/* Default base I/O address */ -#define FDC_PRIMARY_BASE 0x3f0 -#define IDE1_PRIMARY_BASE 0x1f0 -#define IDE1_SECONDARY_BASE 0x170 -#define PARPORT_PRIMARY_BASE 0x378 -#define COM1_PRIMARY_BASE 0x2f8 -#define COM2_PRIMARY_BASE 0x3f8 -#define RTC_PRIMARY_BASE 0x070 -#define KBC_PRIMARY_BASE 0x060 -#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ - -/* Logical device number */ -#define LDN_FDC 0 -#define LDN_IDE1 1 -#define LDN_IDE2 2 -#define LDN_PARPORT 3 -#define LDN_COM1 4 -#define LDN_COM2 5 -#define LDN_RTC 6 -#define LDN_KBC 7 -#define LDN_AUXIO 8 - -/* Configuration port and key */ -#define CONFIG_PORT 0x3f0 -#define INDEX_PORT CONFIG_PORT -#define DATA_PORT 0x3f1 -#define CONFIG_ENTER 0x55 -#define CONFIG_EXIT 0xaa - -/* Configuration index */ -#define CURRENT_LDN_INDEX 0x07 -#define POWER_CONTROL_INDEX 0x22 -#define ACTIVATE_INDEX 0x30 -#define IO_BASE_HI_INDEX 0x60 -#define IO_BASE_LO_INDEX 0x61 -#define IRQ_SELECT_INDEX 0x70 -#define DMA_SELECT_INDEX 0x74 - -#define GPIO46_INDEX 0xc6 -#define GPIO47_INDEX 0xc7 - -/* UART stuff. Only for debugging. */ -/* UART Register */ - -#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ -#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ -#define UART_IER 0x2 /* Interrupt Enable Register */ -#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ -#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ -#define UART_LCR 0x6 /* Line Control Register */ -#define UART_MCR 0x8 /* MODEM Control Register */ -#define UART_LSR 0xa /* Line Status Register */ -#define UART_MSR 0xc /* MODEM Status Register */ -#define UART_SCR 0xe /* Scratch Register */ -#define UART_DLL 0x0 /* Divisor Latch (LS) */ -#define UART_DLM 0x2 /* Divisor Latch (MS) */ - -#ifndef __ASSEMBLY__ -typedef struct uart_reg { - volatile __u16 rbr; - volatile __u16 ier; - volatile __u16 iir; - volatile __u16 lcr; - volatile __u16 mcr; - volatile __u16 lsr; - volatile __u16 msr; - volatile __u16 scr; -} uart_reg; -#endif /* ! __ASSEMBLY__ */ - -/* Alias for Write Only Register */ - -#define thr rbr -#define tcr iir - -/* Alias for Divisor Latch Register */ - -#define dll rbr -#define dlm ier -#define fcr iir - -/* Interrupt Enable Register */ - -#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ -#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ -#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ -#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ - -/* Interrupt Ident Register */ - -#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ -#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ -#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ -#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ -#define IIR_FIFO 0xc000 /* FIFOs enabled */ - -/* FIFO Control Register */ - -#define FCR_FEN 0x0100 /* FIFO enable */ -#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ -#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ -#define FCR_DMA 0x0800 /* DMA mode select */ -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ - -/* Line Control Register */ - -#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ -#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ -#define LCR_STB 0x0400 /* Number of Stop Bits */ -#define LCR_PEN 0x0800 /* Parity Enable */ -#define LCR_EPS 0x1000 /* Even Parity Select */ -#define LCR_SP 0x2000 /* Stick Parity */ -#define LCR_SB 0x4000 /* Set Break */ -#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ - -/* MODEM Control Register */ - -#define MCR_DTR 0x0100 /* Data Terminal Ready */ -#define MCR_RTS 0x0200 /* Request to Send */ -#define MCR_OUT1 0x0400 /* Out 1 */ -#define MCR_IRQEN 0x0800 /* IRQ Enable */ -#define MCR_LOOP 0x1000 /* Loop */ - -/* Line Status Register */ - -#define LSR_DR 0x0100 /* Data Ready */ -#define LSR_OE 0x0200 /* Overrun Error */ -#define LSR_PE 0x0400 /* Parity Error */ -#define LSR_FE 0x0800 /* Framing Error */ -#define LSR_BI 0x1000 /* Break Interrupt */ -#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ -#define LSR_TEMT 0x4000 /* Transmitter Empty */ -#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ - -/* MODEM Status Register */ - -#define MSR_DCTS 0x0100 /* Delta Clear to Send */ -#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ -#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ -#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ -#define MSR_CTS 0x1000 /* Clear to Send */ -#define MSR_DSR 0x2000 /* Data Set Ready */ -#define MSR_RI 0x4000 /* Ring Indicator */ -#define MSR_DCD 0x8000 /* Data Carrier Detect */ - -/* Baud Rate Divisor */ - -#define UART_CLK (1843200) /* 1.8432 MHz */ -#define UART_BAUD(x) (UART_CLK / (16 * (x))) - -/* RTC register definition */ -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_FREQ_SELECT 10 -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 -/* This RTC can work under 32.768KHz clock only. */ -# define RTC_OSC_ENABLE 0x20 -# define RTC_OSC_DISABLE 0x00 -#define RTC_CONTROL 11 -# define RTC_SET 0x80 -# define RTC_PIE 0x40 -# define RTC_AIE 0x20 -# define RTC_UIE 0x10 -# define RTC_SQWE 0x08 -# define RTC_DM_BINARY 0x04 -# define RTC_24H 0x02 -# define RTC_DST_EN 0x01 - -#endif /* __ASM_SH_SMC37C93X_H */ diff --git a/include/asm-sh/smc37c93x.h b/include/asm-sh/smc37c93x.h new file mode 100644 index 000000000000..585da2a8fc45 --- /dev/null +++ b/include/asm-sh/smc37c93x.h @@ -0,0 +1,190 @@ +#ifndef __ASM_SH_SMC37C93X_H +#define __ASM_SH_SMC37C93X_H + +/* + * linux/include/asm-sh/smc37c93x.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * SMSC 37C93x Super IO Chip support + */ + +/* Default base I/O address */ +#define FDC_PRIMARY_BASE 0x3f0 +#define IDE1_PRIMARY_BASE 0x1f0 +#define IDE1_SECONDARY_BASE 0x170 +#define PARPORT_PRIMARY_BASE 0x378 +#define COM1_PRIMARY_BASE 0x2f8 +#define COM2_PRIMARY_BASE 0x3f8 +#define RTC_PRIMARY_BASE 0x070 +#define KBC_PRIMARY_BASE 0x060 +#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ + +/* Logical device number */ +#define LDN_FDC 0 +#define LDN_IDE1 1 +#define LDN_IDE2 2 +#define LDN_PARPORT 3 +#define LDN_COM1 4 +#define LDN_COM2 5 +#define LDN_RTC 6 +#define LDN_KBC 7 +#define LDN_AUXIO 8 + +/* Configuration port and key */ +#define CONFIG_PORT 0x3f0 +#define INDEX_PORT CONFIG_PORT +#define DATA_PORT 0x3f1 +#define CONFIG_ENTER 0x55 +#define CONFIG_EXIT 0xaa + +/* Configuration index */ +#define CURRENT_LDN_INDEX 0x07 +#define POWER_CONTROL_INDEX 0x22 +#define ACTIVATE_INDEX 0x30 +#define IO_BASE_HI_INDEX 0x60 +#define IO_BASE_LO_INDEX 0x61 +#define IRQ_SELECT_INDEX 0x70 +#define DMA_SELECT_INDEX 0x74 + +#define GPIO46_INDEX 0xc6 +#define GPIO47_INDEX 0xc7 + +/* UART stuff. Only for debugging. */ +/* UART Register */ + +#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ +#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ +#define UART_IER 0x2 /* Interrupt Enable Register */ +#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ +#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ +#define UART_LCR 0x6 /* Line Control Register */ +#define UART_MCR 0x8 /* MODEM Control Register */ +#define UART_LSR 0xa /* Line Status Register */ +#define UART_MSR 0xc /* MODEM Status Register */ +#define UART_SCR 0xe /* Scratch Register */ +#define UART_DLL 0x0 /* Divisor Latch (LS) */ +#define UART_DLM 0x2 /* Divisor Latch (MS) */ + +#ifndef __ASSEMBLY__ +typedef struct uart_reg { + volatile __u16 rbr; + volatile __u16 ier; + volatile __u16 iir; + volatile __u16 lcr; + volatile __u16 mcr; + volatile __u16 lsr; + volatile __u16 msr; + volatile __u16 scr; +} uart_reg; +#endif /* ! __ASSEMBLY__ */ + +/* Alias for Write Only Register */ + +#define thr rbr +#define tcr iir + +/* Alias for Divisor Latch Register */ + +#define dll rbr +#define dlm ier +#define fcr iir + +/* Interrupt Enable Register */ + +#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ +#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ +#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ +#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ + +/* Interrupt Ident Register */ + +#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ +#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ +#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ +#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ +#define IIR_FIFO 0xc000 /* FIFOs enabled */ + +/* FIFO Control Register */ + +#define FCR_FEN 0x0100 /* FIFO enable */ +#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ +#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ +#define FCR_DMA 0x0800 /* DMA mode select */ +#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ +#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ + +/* Line Control Register */ + +#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ +#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ +#define LCR_STB 0x0400 /* Number of Stop Bits */ +#define LCR_PEN 0x0800 /* Parity Enable */ +#define LCR_EPS 0x1000 /* Even Parity Select */ +#define LCR_SP 0x2000 /* Stick Parity */ +#define LCR_SB 0x4000 /* Set Break */ +#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ + +/* MODEM Control Register */ + +#define MCR_DTR 0x0100 /* Data Terminal Ready */ +#define MCR_RTS 0x0200 /* Request to Send */ +#define MCR_OUT1 0x0400 /* Out 1 */ +#define MCR_IRQEN 0x0800 /* IRQ Enable */ +#define MCR_LOOP 0x1000 /* Loop */ + +/* Line Status Register */ + +#define LSR_DR 0x0100 /* Data Ready */ +#define LSR_OE 0x0200 /* Overrun Error */ +#define LSR_PE 0x0400 /* Parity Error */ +#define LSR_FE 0x0800 /* Framing Error */ +#define LSR_BI 0x1000 /* Break Interrupt */ +#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ +#define LSR_TEMT 0x4000 /* Transmitter Empty */ +#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ + +/* MODEM Status Register */ + +#define MSR_DCTS 0x0100 /* Delta Clear to Send */ +#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ +#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ +#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ +#define MSR_CTS 0x1000 /* Clear to Send */ +#define MSR_DSR 0x2000 /* Data Set Ready */ +#define MSR_RI 0x4000 /* Ring Indicator */ +#define MSR_DCD 0x8000 /* Data Carrier Detect */ + +/* Baud Rate Divisor */ + +#define UART_CLK (1843200) /* 1.8432 MHz */ +#define UART_BAUD(x) (UART_CLK / (16 * (x))) + +/* RTC register definition */ +#define RTC_SECONDS 0 +#define RTC_SECONDS_ALARM 1 +#define RTC_MINUTES 2 +#define RTC_MINUTES_ALARM 3 +#define RTC_HOURS 4 +#define RTC_HOURS_ALARM 5 +#define RTC_DAY_OF_WEEK 6 +#define RTC_DAY_OF_MONTH 7 +#define RTC_MONTH 8 +#define RTC_YEAR 9 +#define RTC_FREQ_SELECT 10 +# define RTC_UIP 0x80 +# define RTC_DIV_CTL 0x70 +/* This RTC can work under 32.768KHz clock only. */ +# define RTC_OSC_ENABLE 0x20 +# define RTC_OSC_DISABLE 0x00 +#define RTC_CONTROL 11 +# define RTC_SET 0x80 +# define RTC_PIE 0x40 +# define RTC_AIE 0x20 +# define RTC_UIE 0x10 +# define RTC_SQWE 0x08 +# define RTC_DM_BINARY 0x04 +# define RTC_24H 0x02 +# define RTC_DST_EN 0x01 + +#endif /* __ASM_SH_SMC37C93X_H */ -- cgit v1.2.1 From e4e3b5ccd77226c9c4dbb0737106b868dfc182d9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 27 Sep 2006 11:28:20 +0900 Subject: sh: Add a simple cmpxchg(). We didn't have one of these before, a simple implementation borrowed from MIPS as well as the __HAVE_ARCH_CMPXCHG bits. Signed-off-by: Tom Rini Signed-off-by: Paul Mundt --- include/asm-sh/system.h | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index ad35ad4958f4..e89728d405d8 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -6,6 +6,7 @@ * Copyright (C) 2002 Paul Mundt */ +#include /* * switch_to() should switch tasks to task nr n, first @@ -260,6 +261,45 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int return x; } +static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, + unsigned long new) +{ + __u32 retval; + unsigned long flags; + + local_irq_save(flags); + retval = *m; + if (retval == old) + *m = new; + local_irq_restore(flags); /* implies memory barrier */ + return retval; +} + +/* This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + /* XXX * disable hlt during certain critical i/o operations */ -- cgit v1.2.1 From e4c2cfee5d5cf3e4c16b423be23551aeddf2717b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 12:31:01 +0900 Subject: sh: Various cosmetic cleanups. We had quite a bit of whitespace damage, clean most of it up.. Signed-off-by: Stuart Menefy Signed-off-by: Arthur Othieno Signed-off-by: Paul Mundt --- include/asm-sh/atomic.h | 1 + include/asm-sh/bitops.h | 16 ++++++++-------- include/asm-sh/checksum.h | 2 ++ include/asm-sh/fixmap.h | 2 +- include/asm-sh/watchdog.h | 3 --- 5 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index fb627de217f2..049eb2dda6b6 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -14,6 +14,7 @@ typedef struct { volatile int counter; } atomic_t; #define atomic_read(v) ((v)->counter) #define atomic_set(v,i) ((v)->counter = (i)) +#include #include /* diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h index e34f82508568..1c16792cee1d 100644 --- a/include/asm-sh/bitops.h +++ b/include/asm-sh/bitops.h @@ -6,7 +6,7 @@ /* For __swab32 */ #include -static __inline__ void set_bit(int nr, volatile void * addr) +static inline void set_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -24,7 +24,7 @@ static __inline__ void set_bit(int nr, volatile void * addr) */ #define smp_mb__before_clear_bit() barrier() #define smp_mb__after_clear_bit() barrier() -static __inline__ void clear_bit(int nr, volatile void * addr) +static inline void clear_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -37,7 +37,7 @@ static __inline__ void clear_bit(int nr, volatile void * addr) local_irq_restore(flags); } -static __inline__ void change_bit(int nr, volatile void * addr) +static inline void change_bit(int nr, volatile void * addr) { int mask; volatile unsigned int *a = addr; @@ -50,7 +50,7 @@ static __inline__ void change_bit(int nr, volatile void * addr) local_irq_restore(flags); } -static __inline__ int test_and_set_bit(int nr, volatile void * addr) +static inline int test_and_set_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -66,7 +66,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr) return retval; } -static __inline__ int test_and_clear_bit(int nr, volatile void * addr) +static inline int test_and_clear_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -82,7 +82,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) return retval; } -static __inline__ int test_and_change_bit(int nr, volatile void * addr) +static inline int test_and_change_bit(int nr, volatile void * addr) { int mask, retval; volatile unsigned int *a = addr; @@ -100,7 +100,7 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) #include -static __inline__ unsigned long ffz(unsigned long word) +static inline unsigned long ffz(unsigned long word) { unsigned long result; @@ -120,7 +120,7 @@ static __inline__ unsigned long ffz(unsigned long word) * * Undefined if no bit exists, so code should check against 0 first. */ -static __inline__ unsigned long __ffs(unsigned long word) +static inline unsigned long __ffs(unsigned long word) { unsigned long result; diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h index fa03b30c4269..08168afe6746 100644 --- a/include/asm-sh/checksum.h +++ b/include/asm-sh/checksum.h @@ -159,6 +159,7 @@ static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len) } #define _HAVE_ARCH_IPV6_CSUM +#ifdef CONFIG_IPV6 static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, @@ -194,6 +195,7 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr, return csum_fold(sum); } +#endif /* * Copy and checksum to user diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h index 412bccaa07e6..458e9fa59545 100644 --- a/include/asm-sh/fixmap.h +++ b/include/asm-sh/fixmap.h @@ -25,7 +25,7 @@ * addresses. The point is to have a constant address at * compile time, but to set the physical address only * in the boot process. We allocate these special addresses - * from the end of virtual memory (0xfffff000) backwards. + * from the end of P3 backwards. * Also this lets us do fail-safe vmalloc(), we * can guarantee that these special addresses and * vmalloc()-ed addresses never overlap. diff --git a/include/asm-sh/watchdog.h b/include/asm-sh/watchdog.h index 09ca41972a11..d19ea62ef8c6 100644 --- a/include/asm-sh/watchdog.h +++ b/include/asm-sh/watchdog.h @@ -62,7 +62,6 @@ /** * sh_wdt_read_cnt - Read from Counter - * * Reads back the WTCNT value. */ static inline __u8 sh_wdt_read_cnt(void) @@ -72,7 +71,6 @@ static inline __u8 sh_wdt_read_cnt(void) /** * sh_wdt_write_cnt - Write to Counter - * * @val: Value to write * * Writes the given value @val to the lower byte of the timer counter. @@ -95,7 +93,6 @@ static inline __u8 sh_wdt_read_csr(void) /** * sh_wdt_write_csr - Write to Control/Status Register - * * @val: Value to write * * Writes the given value @val to the lower byte of the control/status -- cgit v1.2.1 From 3f787fe2e077ecfe43ad9ad56f12a8e21cffafc3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 13:11:57 +0900 Subject: sh: hugetlb updates. For some of the larger sizes we permitted spanning pages across several PTEs, but this turned out to not be generally useful. This reverts the sh hugetlbpage interface to something more sensible using huge pages at single PTE granularity. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 6f7eb8a3aba5..4811d410d123 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -30,7 +30,6 @@ #define HPAGE_SIZE (1UL << HPAGE_SHIFT) #define HPAGE_MASK (~(HPAGE_SIZE-1)) #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) -#define ARCH_HAS_SETCLEAR_HUGE_PTE #endif #ifdef __KERNEL__ -- cgit v1.2.1 From d95fb13c960ae19e9fd4a95807eb68fa20caf537 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 13:30:08 +0900 Subject: sh: Fixup TMU_TOCR definition for SH7300. SH7300 has a different TMU_TOCR, make the TMU code work again. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh3/timer.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 3d8e95e8d10c..2082ad956f21 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h @@ -23,6 +23,10 @@ * --------------------------------------------------------------------------- */ +#if !defined(CONFIG_CPU_SUBTYPE_SH7727) +#define TMU_TOCR 0xfffffe90 /* Byte access */ +#endif + #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) #define TMU_TSTR 0xa412fe92 /* Byte access */ @@ -39,9 +43,6 @@ #define TMU2_TCR 0xa412feb4 /* Word access */ #else -#if !defined(CONFIG_CPU_SUBTYPE_SH7727) -#define TMU_TOCR 0xfffffe90 /* Byte access */ -#endif #define TMU_TSTR 0xfffffe92 /* Byte access */ #define TMU0_TCOR 0xfffffe94 /* Long access */ -- cgit v1.2.1 From 6d75e650f1d0d59fd97c7629f0903ef18e8dfb7b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 13:42:57 +0900 Subject: sh: Move hd64461.h to a more sensible location. With the I/O rework for hd64461 we're down to a single header, so move it by itself and get rid of the directory. Signed-off-by: Paul Mundt --- include/asm-sh/hd64461.h | 203 +++++++++++++++++++++++++++++++++++++++ include/asm-sh/hd64461/hd64461.h | 202 -------------------------------------- include/asm-sh/hd64461/io.h | 43 --------- include/asm-sh/hp6xx/io.h | 2 +- 4 files changed, 204 insertions(+), 246 deletions(-) create mode 100644 include/asm-sh/hd64461.h delete mode 100644 include/asm-sh/hd64461/hd64461.h delete mode 100644 include/asm-sh/hd64461/io.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h new file mode 100644 index 000000000000..0f2e2132cc35 --- /dev/null +++ b/include/asm-sh/hd64461.h @@ -0,0 +1,203 @@ +#ifndef __ASM_SH_HD64461 +#define __ASM_SH_HD64461 +/* + * $Id: hd64461.h,v 1.5 2004/03/16 00:07:51 lethal Exp $ + * Copyright (C) 2000 YAEGASHI Takeshi + * Hitachi HD64461 companion chip support + */ + +/* Constants for PCMCIA mappings */ +#define HD64461_PCC_WINDOW 0x01000000 + +#define HD64461_PCC0_BASE 0xb8000000 /* area 6 */ +#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) +#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) +#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) + +#define HD64461_PCC1_BASE 0xb4000000 /* area 5 */ +#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) +#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) + +#define HD64461_STBCR 0x10000 +#define HD64461_STBCR_CKIO_STBY 0x2000 +#define HD64461_STBCR_SAFECKE_IST 0x1000 +#define HD64461_STBCR_SLCKE_IST 0x0800 +#define HD64461_STBCR_SAFECKE_OST 0x0400 +#define HD64461_STBCR_SLCKE_OST 0x0200 +#define HD64461_STBCR_SMIAST 0x0100 +#define HD64461_STBCR_SLCDST 0x0080 +#define HD64461_STBCR_SPC0ST 0x0040 +#define HD64461_STBCR_SPC1ST 0x0020 +#define HD64461_STBCR_SAFEST 0x0010 +#define HD64461_STBCR_STM0ST 0x0008 +#define HD64461_STBCR_STM1ST 0x0004 +#define HD64461_STBCR_SIRST 0x0002 +#define HD64461_STBCR_SURTST 0x0001 + +#define HD64461_SYSCR 0x10002 +#define HD64461_SCPUCR 0x10004 + +#define HD64461_LCDCBAR 0x11000 +#define HD64461_LCDCLOR 0x11002 +#define HD64461_LCDCCR 0x11004 +#define HD64461_LCDCCR_MOFF 0x80 + +#define HD64461_LDR1 0x11010 +#define HD64461_LDR1_DON 0x01 +#define HD64461_LDR1_DINV 0x80 + +#define HD64461_LDR2 0x11012 +#define HD64461_LDHNCR 0x11014 +#define HD64461_LDHNSR 0x11016 +#define HD64461_LDVNTR 0x11018 +#define HD64461_LDVNDR 0x1101a +#define HD64461_LDVSPR 0x1101c +#define HD64461_LDR3 0x1101e + +#define HD64461_CPTWAR 0x11030 +#define HD64461_CPTWDR 0x11032 +#define HD64461_CPTRAR 0x11034 +#define HD64461_CPTRDR 0x11036 + +#define HD64461_GRDOR 0x11040 +#define HD64461_GRSCR 0x11042 +#define HD64461_GRCFGR 0x11044 +#define HD64461_GRCFGR_ACCSTATUS 0x10 +#define HD64461_GRCFGR_ACCRESET 0x08 +#define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 +#define HD64461_GRCFGR_ACCSTART_LINE 0x04 +#define HD64461_GRCFGR_COLORDEPTH16 0x01 + +#define HD64461_LNSARH 0x11046 +#define HD64461_LNSARL 0x11048 +#define HD64461_LNAXLR 0x1104a +#define HD64461_LNDGR 0x1104c +#define HD64461_LNAXR 0x1104e +#define HD64461_LNERTR 0x11050 +#define HD64461_LNMDR 0x11052 +#define HD64461_BBTSSARH 0x11054 +#define HD64461_BBTSSARL 0x11056 +#define HD64461_BBTDSARH 0x11058 +#define HD64461_BBTDSARL 0x1105a +#define HD64461_BBTDWR 0x1105c +#define HD64461_BBTDHR 0x1105e +#define HD64461_BBTPARH 0x11060 +#define HD64461_BBTPARL 0x11062 +#define HD64461_BBTMARH 0x11064 +#define HD64461_BBTMARL 0x11066 +#define HD64461_BBTROPR 0x11068 +#define HD64461_BBTMDR 0x1106a + +/* PC Card Controller Registers */ +#define HD64461_PCC0ISR 0x12000 /* socket 0 interface status */ +#define HD64461_PCC0GCR 0x12002 /* socket 0 general control */ +#define HD64461_PCC0CSCR 0x12004 /* socket 0 card status change */ +#define HD64461_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ +#define HD64461_PCC0SCR 0x12008 /* socket 0 software control */ +#define HD64461_PCC1ISR 0x12010 /* socket 1 interface status */ +#define HD64461_PCC1GCR 0x12012 /* socket 1 general control */ +#define HD64461_PCC1CSCR 0x12014 /* socket 1 card status change */ +#define HD64461_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ +#define HD64461_PCC1SCR 0x12018 /* socket 1 software control */ + +/* PCC Interface Status Register */ +#define HD64461_PCCISR_READY 0x80 /* card ready */ +#define HD64461_PCCISR_MWP 0x40 /* card write-protected */ +#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ +#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ +#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ +#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ +#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ +#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ + +#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ +#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ +#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ +#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ +#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ +#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ + +/* PCC General Control Register */ +#define HD64461_PCCGCR_DRVE 0x80 /* output drive */ +#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ +#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ +#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ +#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ +#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ +#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ +#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ + +/* PCC Card Status Change Register */ +#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ +#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ +#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ +#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ +#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ +#define HD64461_PCCCSCR_RC 0x04 /* READY change */ +#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ +#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ + +/* PCC Card Status Change Interrupt Enable Register */ +#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ +#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ +#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ +#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ +#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ +#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ + +#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ +#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ +#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ +#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ +#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ + +/* PCC Software Control Register */ +#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ +#define HD64461_PCCSCR_SWP 0x01 /* write protect */ + +#define HD64461_P0OCR 0x1202a +#define HD64461_P1OCR 0x1202c +#define HD64461_PGCR 0x1202e + +#define HD64461_GPACR 0x14000 +#define HD64461_GPBCR 0x14002 +#define HD64461_GPCCR 0x14004 +#define HD64461_GPDCR 0x14006 +#define HD64461_GPADR 0x14010 +#define HD64461_GPBDR 0x14012 +#define HD64461_GPCDR 0x14014 +#define HD64461_GPDDR 0x14016 +#define HD64461_GPAICR 0x14020 +#define HD64461_GPBICR 0x14022 +#define HD64461_GPCICR 0x14024 +#define HD64461_GPDICR 0x14026 +#define HD64461_GPAISR 0x14040 +#define HD64461_GPBISR 0x14042 +#define HD64461_GPCISR 0x14044 +#define HD64461_GPDISR 0x14046 + +#define HD64461_NIRR 0x15000 +#define HD64461_NIMR 0x15002 + +#define HD64461_IRQBASE OFFCHIP_IRQ_BASE +#define HD64461_IRQ_NUM 16 + +#define HD64461_IRQ_UART (HD64461_IRQBASE+5) +#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) +#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) +#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) +#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) +#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) +#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) +#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) + +#define __IO_PREFIX hd64461 +#include + +/* arch/sh/cchips/hd6446x/hd64461/setup.c */ +int hd64461_irq_demux(int irq); +void hd64461_register_irq_demux(int irq, + int (*demux) (int irq, void *dev), void *dev); +void hd64461_unregister_irq_demux(int irq); + +#endif diff --git a/include/asm-sh/hd64461/hd64461.h b/include/asm-sh/hd64461/hd64461.h deleted file mode 100644 index 87f13d24c630..000000000000 --- a/include/asm-sh/hd64461/hd64461.h +++ /dev/null @@ -1,202 +0,0 @@ -#ifndef __ASM_SH_HD64461 -#define __ASM_SH_HD64461 -/* - * $Id: hd64461.h,v 1.5 2004/03/16 00:07:51 lethal Exp $ - * Copyright (C) 2000 YAEGASHI Takeshi - * Hitachi HD64461 companion chip support - */ - -/* Constants for PCMCIA mappings */ -#define HD64461_PCC_WINDOW 0x01000000 - -#define HD64461_PCC0_BASE 0xb8000000 /* area 6 */ -#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) -#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) -#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) - -#define HD64461_PCC1_BASE 0xb4000000 /* area 5 */ -#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) -#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) - -#define HD64461_STBCR 0x10000 -#define HD64461_STBCR_CKIO_STBY 0x2000 -#define HD64461_STBCR_SAFECKE_IST 0x1000 -#define HD64461_STBCR_SLCKE_IST 0x0800 -#define HD64461_STBCR_SAFECKE_OST 0x0400 -#define HD64461_STBCR_SLCKE_OST 0x0200 -#define HD64461_STBCR_SMIAST 0x0100 -#define HD64461_STBCR_SLCDST 0x0080 -#define HD64461_STBCR_SPC0ST 0x0040 -#define HD64461_STBCR_SPC1ST 0x0020 -#define HD64461_STBCR_SAFEST 0x0010 -#define HD64461_STBCR_STM0ST 0x0008 -#define HD64461_STBCR_STM1ST 0x0004 -#define HD64461_STBCR_SIRST 0x0002 -#define HD64461_STBCR_SURTST 0x0001 - -#define HD64461_SYSCR 0x10002 -#define HD64461_SCPUCR 0x10004 - -#define HD64461_LCDCBAR 0x11000 -#define HD64461_LCDCLOR 0x11002 -#define HD64461_LCDCCR 0x11004 -#define HD64461_LCDCCR_MOFF 0x80 - -#define HD64461_LDR1 0x11010 -#define HD64461_LDR1_DON 0x01 -#define HD64461_LDR1_DINV 0x80 - -#define HD64461_LDR2 0x11012 -#define HD64461_LDHNCR 0x11014 -#define HD64461_LDHNSR 0x11016 -#define HD64461_LDVNTR 0x11018 -#define HD64461_LDVNDR 0x1101a -#define HD64461_LDVSPR 0x1101c -#define HD64461_LDR3 0x1101e - -#define HD64461_CPTWAR 0x11030 -#define HD64461_CPTWDR 0x11032 -#define HD64461_CPTRAR 0x11034 -#define HD64461_CPTRDR 0x11036 - -#define HD64461_GRDOR 0x11040 -#define HD64461_GRSCR 0x11042 -#define HD64461_GRCFGR 0x11044 -#define HD64461_GRCFGR_ACCSTATUS 0x10 -#define HD64461_GRCFGR_ACCRESET 0x08 -#define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 -#define HD64461_GRCFGR_ACCSTART_LINE 0x04 -#define HD64461_GRCFGR_COLORDEPTH16 0x01 - -#define HD64461_LNSARH 0x11046 -#define HD64461_LNSARL 0x11048 -#define HD64461_LNAXLR 0x1104a -#define HD64461_LNDGR 0x1104c -#define HD64461_LNAXR 0x1104e -#define HD64461_LNERTR 0x11050 -#define HD64461_LNMDR 0x11052 -#define HD64461_BBTSSARH 0x11054 -#define HD64461_BBTSSARL 0x11056 -#define HD64461_BBTDSARH 0x11058 -#define HD64461_BBTDSARL 0x1105a -#define HD64461_BBTDWR 0x1105c -#define HD64461_BBTDHR 0x1105e -#define HD64461_BBTPARH 0x11060 -#define HD64461_BBTPARL 0x11062 -#define HD64461_BBTMARH 0x11064 -#define HD64461_BBTMARL 0x11066 -#define HD64461_BBTROPR 0x11068 -#define HD64461_BBTMDR 0x1106a - -/* PC Card Controller Registers */ -#define HD64461_PCC0ISR 0x12000 /* socket 0 interface status */ -#define HD64461_PCC0GCR 0x12002 /* socket 0 general control */ -#define HD64461_PCC0CSCR 0x12004 /* socket 0 card status change */ -#define HD64461_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ -#define HD64461_PCC0SCR 0x12008 /* socket 0 software control */ -#define HD64461_PCC1ISR 0x12010 /* socket 1 interface status */ -#define HD64461_PCC1GCR 0x12012 /* socket 1 general control */ -#define HD64461_PCC1CSCR 0x12014 /* socket 1 card status change */ -#define HD64461_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ -#define HD64461_PCC1SCR 0x12018 /* socket 1 software control */ - -/* PCC Interface Status Register */ -#define HD64461_PCCISR_READY 0x80 /* card ready */ -#define HD64461_PCCISR_MWP 0x40 /* card write-protected */ -#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ -#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ -#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ -#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ -#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ -#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ - -#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ -#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ -#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ -#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ -#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ -#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ - -/* PCC General Control Register */ -#define HD64461_PCCGCR_DRVE 0x80 /* output drive */ -#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ -#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ -#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ -#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ -#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ -#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ -#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ - -/* PCC Card Status Change Register */ -#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ -#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ -#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ -#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ -#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ -#define HD64461_PCCCSCR_RC 0x04 /* READY change */ -#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ -#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ - -/* PCC Card Status Change Interrupt Enable Register */ -#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ -#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ -#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ -#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ -#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ -#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ - -#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ -#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ -#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ -#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ -#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ - -/* PCC Software Control Register */ -#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ -#define HD64461_PCCSCR_SWP 0x01 /* write protect */ - - -#define HD64461_P0OCR 0x1202a -#define HD64461_P1OCR 0x1202c -#define HD64461_PGCR 0x1202e - -#define HD64461_GPACR 0x14000 -#define HD64461_GPBCR 0x14002 -#define HD64461_GPCCR 0x14004 -#define HD64461_GPDCR 0x14006 -#define HD64461_GPADR 0x14010 -#define HD64461_GPBDR 0x14012 -#define HD64461_GPCDR 0x14014 -#define HD64461_GPDDR 0x14016 -#define HD64461_GPAICR 0x14020 -#define HD64461_GPBICR 0x14022 -#define HD64461_GPCICR 0x14024 -#define HD64461_GPDICR 0x14026 -#define HD64461_GPAISR 0x14040 -#define HD64461_GPBISR 0x14042 -#define HD64461_GPCISR 0x14044 -#define HD64461_GPDISR 0x14046 - -#define HD64461_NIRR 0x15000 -#define HD64461_NIMR 0x15002 - -#ifndef CONFIG_HD64461_IOBASE -#define CONFIG_HD64461_IOBASE 0xb0000000 -#endif -#ifndef CONFIG_HD64461_IRQ -#define CONFIG_HD64461_IRQ 36 -#endif - -#define HD64461_IRQBASE OFFCHIP_IRQ_BASE -#define HD64461_IRQ_NUM 16 - -#define HD64461_IRQ_UART (HD64461_IRQBASE+5) -#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) -#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) -#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) -#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) -#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) -#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) -#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) - -#endif diff --git a/include/asm-sh/hd64461/io.h b/include/asm-sh/hd64461/io.h deleted file mode 100644 index 67f2489088d9..000000000000 --- a/include/asm-sh/hd64461/io.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/io_hd64461.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an HD64461 - */ - -#ifndef _ASM_SH_IO_HD64461_H -#define _ASM_SH_IO_HD64461_H - -extern unsigned char hd64461_inb(unsigned long port); -extern unsigned short hd64461_inw(unsigned long port); -extern unsigned int hd64461_inl(unsigned long port); - -extern void hd64461_outb(unsigned char value, unsigned long port); -extern void hd64461_outw(unsigned short value, unsigned long port); -extern void hd64461_outl(unsigned int value, unsigned long port); - -extern unsigned char hd64461_inb_p(unsigned long port); -extern void hd64461_outb_p(unsigned char value, unsigned long port); - -extern void hd64461_insb(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insw(unsigned long port, void *addr, unsigned long count); -extern void hd64461_insl(unsigned long port, void *addr, unsigned long count); - -extern void hd64461_outsb(unsigned long port, const void *buffer, unsigned long count); -extern void hd64461_outsw(unsigned long port, const void *buffer, unsigned long count); -extern void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count); - -extern unsigned short hd64461_readw(unsigned long addr); -extern void hd64461_writew(unsigned short b, unsigned long addr); - - -extern int hd64461_irq_demux(int irq); -extern void hd64461_register_irq_demux(int irq, - int (*demux)(int irq, void *dev), void *dev); -extern void hd64461_unregister_irq_demux(int irq); - -#endif /* _ASM_SH_IO_HD64461_H */ diff --git a/include/asm-sh/hp6xx/io.h b/include/asm-sh/hp6xx/io.h index 731798003550..2044476ab199 100644 --- a/include/asm-sh/hp6xx/io.h +++ b/include/asm-sh/hp6xx/io.h @@ -4,7 +4,7 @@ /* * Nothing special here.. just use the generic cchip io routines. */ -#include +#include #endif /* __ASM_SH_HP6XX_IO_H */ -- cgit v1.2.1 From e8fb67f8e05bb1f4c07c3585967cfc6d44822ab0 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 13:56:28 +0900 Subject: sh: HS7751RVoIP board updates. Various cleanups for HS7751RVoIP. Mostly just getting rid of the old mach.c and splitting codec configuration in to its own Kconfig. Signed-off-by: Paul Mundt --- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 5f995f937a44..857cc2ebbc69 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -44,4 +44,10 @@ #define IRQ_RINGING 4 /* Ringing IRQ */ #define IRQ_CODEC 5 /* CODEC IRQ */ +/* arch/sh/boards/renesas/hs7751rvoip/irq.c */ +void init_hs7751rvoip_IRQ(void); + +/* arch/sh/boards/renesas/hs7751rvoip/io.c */ +void *hs7751rvoip_ioremap(unsigned long, unsigned long); + #endif /* __ASM_SH_RENESAS_HS7751RVOIP */ -- cgit v1.2.1 From fdfc74f9fcebdda14609159d5010b758a9409acf Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:05:52 +0900 Subject: sh: Support for SH-4A memory barriers. SH-4A supports 'synco' as a barrier, sprinkle it around the cache ops as necessary.. Signed-off-by: Paul Mundt --- include/asm-sh/system.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index e89728d405d8..eb4902ed920a 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -84,10 +84,17 @@ static __inline__ unsigned long tas(volatile int *m) extern void __xchg_called_with_bad_pointer(void); +#ifdef CONFIG_CPU_SH4A +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define read_barrier_depends() do { } while(0) +#else #define mb() __asm__ __volatile__ ("": : :"memory") #define rmb() mb() #define wmb() __asm__ __volatile__ ("": : :"memory") #define read_barrier_depends() do { } while(0) +#endif #ifdef CONFIG_SMP #define smp_mb() mb() -- cgit v1.2.1 From b638d0b921dc95229af0dfd09cd24850336a2f75 Mon Sep 17 00:00:00 2001 From: Richard Curnow Date: Wed, 27 Sep 2006 14:09:26 +0900 Subject: sh: Optimized cache handling for SH-4/SH-4A caches. This reworks some of the SH-4 cache handling code to more easily accomodate newer-style caches (particularly for the > direct-mapped case), as well as optimizing some of the old code. Signed-off-by: Richard Curnow Signed-off-by: Paul Mundt --- include/asm-sh/cache.h | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 656fdfe9e8b4..33f13367054b 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -23,15 +23,29 @@ #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) struct cache_info { - unsigned int ways; - unsigned int sets; - unsigned int linesz; + unsigned int ways; /* Number of cache ways */ + unsigned int sets; /* Number of cache sets */ + unsigned int linesz; /* Cache line size (bytes) */ - unsigned int way_incr; + unsigned int way_size; /* sets * line size */ + /* + * way_incr is the address offset for accessing the next way + * in memory mapped cache array ops. + */ + unsigned int way_incr; unsigned int entry_shift; unsigned int entry_mask; + /* + * Compute a mask which selects the address bits which overlap between + * 1. those used to select the cache set during indexing + * 2. those in the physical page number. + */ + unsigned int alias_mask; + + unsigned int n_aliases; /* Number of aliases */ + unsigned long flags; }; -- cgit v1.2.1 From e86d6b66f5b38680746b2cb71186d90af17f150f Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:20:54 +0900 Subject: sh: prefetch()/prefetchw() support. SH-2/3/4 are able to prefetch, add support for it.. Signed-off-by: Paul Mundt --- include/asm-sh/processor.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index eeb0f48bb99e..e99aff706cf7 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -266,5 +266,18 @@ extern unsigned long get_wchan(struct task_struct *p); #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() +#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ + defined(CONFIG_CPU_SH4) +#define PREFETCH_STRIDE L1_CACHE_BYTES +#define ARCH_HAS_PREFETCH +#define ARCH_HAS_PREFETCHW +static inline void prefetch(void *x) +{ + __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); +} + +#define prefetchw(x) prefetch(x) +#endif + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_H */ -- cgit v1.2.1 From a80fd21e52cc09ff1e4d36de5781173a5b87b2dc Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:26:53 +0900 Subject: sh: earlyprintk= support and cleanups. Allow multiple early printk consoles via earlyprintk=. With this change earlyprintk is no longer enabled by default, it must be specified on the kernel command line. Optionally with ,keep to prevent unreg by tty_io. Signed-off-by: Paul Mundt --- include/asm-sh/setup.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h index d19de7c8df4e..34ca8a7f06ba 100644 --- a/include/asm-sh/setup.h +++ b/include/asm-sh/setup.h @@ -4,5 +4,7 @@ #define COMMAND_LINE_SIZE 256 +int setup_early_printk(char *); + #endif /* _SH_SETUP_H */ #endif /* __KERNEL__ */ -- cgit v1.2.1 From 5b19c9081fbd0882c936ec087bf9055a20251dec Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:31:40 +0900 Subject: sh: Support for SH7770/SH7780 CPU subtypes. Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt --- include/asm-sh/bugs.h | 4 ++++ include/asm-sh/cpu-sh4/cache.h | 2 ++ 2 files changed, 6 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index a6de3d06a3d9..b4000c8bf31b 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -32,6 +32,10 @@ static void __init check_bugs(void) case CPU_SH7750 ... CPU_SH4_501: *p++ = '4'; break; + case CPU_SH7770 ... CPU_SH7781: + *p++ = '4'; + *p++ = 'a'; + break; default: *p++ = '?'; *p++ = '!'; diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h index 1fe20359312c..6e9c7e6ee8e4 100644 --- a/include/asm-sh/cpu-sh4/cache.h +++ b/include/asm-sh/cpu-sh4/cache.h @@ -22,7 +22,9 @@ #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ +#ifndef CONFIG_CPU_SUBTYPE_SH7780 #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ +#endif /* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ #define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) -- cgit v1.2.1 From ef9a1d4c0c383f75710f6adf2abb8cc264877e2c Mon Sep 17 00:00:00 2001 From: Alexey Dobriyan Date: Wed, 27 Sep 2006 14:32:57 +0900 Subject: sh: remove cpu_online() definition from It's defined in and log is horribly flooded by "redefined" messages. Signed-off-by: Alexey Dobriyan Signed-off-by: Paul Mundt --- include/asm-sh/smp.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h index f57c4fe9692a..71ecddf70db3 100644 --- a/include/asm-sh/smp.h +++ b/include/asm-sh/smp.h @@ -19,11 +19,6 @@ #include #include -extern cpumask_t cpu_online_map; -extern cpumask_t cpu_possible_map; - -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) - #define raw_smp_processor_id() (current_thread_info()->cpu) /* I've no idea what the real meaning of this is */ -- cgit v1.2.1 From 75c92acdd5b19a5e3536ed670e1122d73c635b4a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:36:44 +0900 Subject: sh: Wire up new syscalls. The syscall table has lagged behind a bit, wire up the new ones.. Signed-off-by: Paul Mundt --- include/asm-sh/unistd.h | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 76b5430cb458..49c6a6ee0ab2 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -300,9 +300,31 @@ #define __NR_inotify_init 290 #define __NR_inotify_add_watch 291 #define __NR_inotify_rm_watch 292 +#define __NR_migrate_pages 293 +#define __NR_openat 294 +#define __NR_mkdirat 295 +#define __NR_mknodat 296 +#define __NR_fchownat 297 +#define __NR_futimesat 298 +#define __NR_fstatat64 299 +#define __NR_unlinkat 300 +#define __NR_renameat 301 +#define __NR_linkat 302 +#define __NR_symlinkat 303 +#define __NR_readlinkat 304 +#define __NR_fchmodat 305 +#define __NR_faccessat 305 +#define __NR_pselect6 307 +#define __NR_ppoll 308 +#define __NR_unshare 309 +#define __NR_set_robust_list 310 +#define __NR_get_robust_list 311 +#define __NR_splice 312 +#define __NR_sync_file_range 313 +#define __NR_tee 314 +#define __NR_vmsplice 315 - -#define NR_syscalls 293 +#define NR_syscalls 316 #ifdef __KERNEL__ -- cgit v1.2.1 From 8b395265f81817385f12e62f03f795efb732a445 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:38:02 +0900 Subject: sh: Fix fatal oops in copy_user_page() on sh4a (SH7780). We had a pretty interesting oops happening, where copy_user_page() was down()'ing p3map_sem[] with a bogus offset (particularly, an offset that hadn't been initialized with sema_init(), due to the mismatch between cpu_data->dcache.n_aliases and what was assumed based off of the old CACHE_ALIAS value). Luckily, spinlock debugging caught this for us, and so we drop the old hardcoded CACHE_ALIAS for sh4 completely and rely on the run-time probed cpu_data->dcache.alias_mask. This in turn gets the p3map_sem[] index right, and everything works again. While we're at it, also convert to 4-level page tables.. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/cacheflush.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index f323567e085f..ea58c4c5944d 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -16,10 +16,6 @@ * caching; in which case they're only semi-broken), * so we need them. */ - -/* Page is 4K, OC size is 16K, there are four lines. */ -#define CACHE_ALIAS 0x00003000 - struct page; struct mm_struct; struct vm_area_struct; -- cgit v1.2.1 From 634bf4f69b925950ddb09ef99ad7516a449a4333 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:48:09 +0900 Subject: sh: Fix libata build. Drop virt_to_bus() from sg_dma_address() so libata builds. While we're at it, move sg_dma_address() and sg_dma_len() from pci.h to scatterlist.h. Signed-off-by: Paul Mundt --- include/asm-sh/pci.h | 9 --------- include/asm-sh/scatterlist.h | 9 +++++++++ 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 0a523c85b11c..18a109de0f2e 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -87,15 +87,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) */ #define pci_dac_dma_supported(pci_dev, mask) (0) -/* These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) (virt_to_bus((sg)->dma_address)) -#define sg_dma_len(sg) ((sg)->length) - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h index 7b91df140022..d19e7cd3b023 100644 --- a/include/asm-sh/scatterlist.h +++ b/include/asm-sh/scatterlist.h @@ -10,4 +10,13 @@ struct scatterlist { #define ISA_DMA_THRESHOLD (0x1fffffff) +/* These macros should be used after a pci_map_sg call has been done + * to get bus addresses of each of the SG entries and their lengths. + * You should only work with the number of sg entries pci_map_sg + * returns, or alternatively stop on the first sg_dma_len(sg) which + * is 0. + */ +#define sg_dma_address(sg) ((sg)->dma_address) +#define sg_dma_len(sg) ((sg)->length) + #endif /* !(__ASM_SH_SCATTERLIST_H) */ -- cgit v1.2.1 From 94c0fa520cc169ccf661e9c03b5b95f74d1520b8 Mon Sep 17 00:00:00 2001 From: kogiidena Date: Wed, 27 Sep 2006 14:53:35 +0900 Subject: sh: landisk board support. This adds support for the I-O DATA Landisk. Signed-off-by: kogiidena Signed-off-by: Paul Mundt --- include/asm-sh/landisk/gio.h | 45 +++++++++++++++++++ include/asm-sh/landisk/ide.h | 14 ++++++ include/asm-sh/landisk/iodata_landisk.h | 78 +++++++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 include/asm-sh/landisk/gio.h create mode 100644 include/asm-sh/landisk/ide.h create mode 100644 include/asm-sh/landisk/iodata_landisk.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/landisk/gio.h b/include/asm-sh/landisk/gio.h new file mode 100644 index 000000000000..3fce4c451a46 --- /dev/null +++ b/include/asm-sh/landisk/gio.h @@ -0,0 +1,45 @@ +#ifndef __ASM_SH_LANDISK_GIO_H +#define __ASM_SH_LANDISK_GIO_H + +#include + +/* version */ +#define VERSION_STR "1.00" + +/* Driver name */ +#define GIO_DRIVER_NAME "/dev/giodrv" + +/* Use 'k' as magic number */ +#define GIODRV_IOC_MAGIC 'k' + +#define GIODRV_IOCRESET _IO(GIODRV_IOC_MAGIC, 0) +/* + * S means "Set" through a ptr, + * T means "Tell" directly + * G means "Get" (to a pointed var) + * Q means "Query", response is on the return value + * X means "eXchange": G and S atomically + * H means "sHift": T and Q atomically + */ +#define GIODRV_IOCSGIODATA1 _IOW(GIODRV_IOC_MAGIC, 1, unsigned char *) +#define GIODRV_IOCGGIODATA1 _IOR(GIODRV_IOC_MAGIC, 2, unsigned char *) +#define GIODRV_IOCSGIODATA2 _IOW(GIODRV_IOC_MAGIC, 3, unsigned short *) +#define GIODRV_IOCGGIODATA2 _IOR(GIODRV_IOC_MAGIC, 4, unsigned short *) +#define GIODRV_IOCSGIODATA4 _IOW(GIODRV_IOC_MAGIC, 5, unsigned long *) +#define GIODRV_IOCGGIODATA4 _IOR(GIODRV_IOC_MAGIC, 6, unsigned long *) +#define GIODRV_IOCSGIOSETADDR _IOW(GIODRV_IOC_MAGIC, 7, unsigned long *) +#define GIODRV_IOCHARDRESET _IO(GIODRV_IOC_MAGIC, 8) /* debugging tool */ + +#define GIODRV_IOCSGIO_LED _IOW(GIODRV_IOC_MAGIC, 9, unsigned long *) +#define GIODRV_IOCGGIO_LED _IOR(GIODRV_IOC_MAGIC, 10, unsigned long *) +#define GIODRV_IOCSGIO_BUZZER _IOW(GIODRV_IOC_MAGIC, 11, unsigned long *) +#define GIODRV_IOCGGIO_LANDISK _IOR(GIODRV_IOC_MAGIC, 14, unsigned long *) +#define GIODRV_IOCGGIO_BTN _IOR(GIODRV_IOC_MAGIC, 22, unsigned long *) +#define GIODRV_IOCSGIO_BTNPID _IOW(GIODRV_IOC_MAGIC, 23, unsigned long *) +#define GIODRV_IOCGGIO_BTNPID _IOR(GIODRV_IOC_MAGIC, 24, unsigned long *) + +#define GIODRV_IOC_MAXNR 8 +#define GIO_READ 0x00000000 +#define GIO_WRITE 0x00000001 + +#endif /* __ASM_SH_LANDISK_GIO_H */ diff --git a/include/asm-sh/landisk/ide.h b/include/asm-sh/landisk/ide.h new file mode 100644 index 000000000000..6490e28415ed --- /dev/null +++ b/include/asm-sh/landisk/ide.h @@ -0,0 +1,14 @@ +/* + * modifed by kogiidena + * 2005.03.03 + */ + +#ifndef __ASM_SH_LANDISK_IDE_H +#define __ASM_SH_LANDISK_IDE_H + +/* Nothing to see here.. */ +#include +#define IRQ_CFCARD IRQ_FATA /* CF Card IRQ */ +#define IRQ_PCMCIA IRQ_ATA /* PCMCIA IRQ */ + +#endif /* __ASM_SH_LANDISK_IDE_H */ diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h new file mode 100644 index 000000000000..7189d3a36384 --- /dev/null +++ b/include/asm-sh/landisk/iodata_landisk.h @@ -0,0 +1,78 @@ +#ifndef __ASM_SH_IODATA_LANDISK_H +#define __ASM_SH_IODATA_LANDISK_H + +/* + * linux/include/asm-sh/landisk/iodata_landisk.h + * + * Copyright (C) 2000 Atom Create Engineering Co., Ltd. + * + * IO-DATA LANDISK support + */ + +/* Box specific addresses. */ + +#define PA_USB 0xa4000000 /* USB Controller M66590 */ + +#define PA_ATARST 0xb0000000 /* ATA/FATA Access Control Register */ +#define PA_LED 0xb0000001 /* LED Control Register */ +#define PA_STATUS 0xb0000002 /* Switch Status Register */ +#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */ +#define PA_PCIPME 0xb0000004 /* PCI PME Status Register */ +#define PA_IMASK 0xb0000005 /* Interrupt Mask Register */ +/* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */ +#define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */ + +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_LCD_CLRDSP 0x00 /* LCD Clear Display Offset */ +#define PA_LCD_RTNHOME 0x00 /* LCD Return Home Offset */ +#define PA_LCD_ENTMODE 0x00 /* LCD Entry Mode Offset */ +#define PA_LCD_DSPCTL 0x00 /* LCD Display ON/OFF Control Offset */ +#define PA_LCD_FUNC 0x00 /* LCD Function Set Offset */ +#define PA_LCD_CGRAM 0x00 /* LCD Set CGRAM Address Offset */ +#define PA_LCD_DDRAM 0x00 /* LCD Set DDRAM Address Offset */ +#define PA_LCD_RDFLAG 0x01 /* LCD Read Busy Flag Offset */ +#define PA_LCD_WTDATA 0x02 /* LCD Write Datat to RAM Offset */ +#define PA_LCD_RDDATA 0x03 /* LCD Read Data from RAM Offset */ +#define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */ +#define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */ + +#define IRQ_PCIINTA 5 /* PCI INTA IRQ */ +#define IRQ_PCIINTB 6 /* PCI INTB IRQ */ +#define IRQ_PCIINDC 7 /* PCI INTC IRQ */ +#define IRQ_PCIINTD 8 /* PCI INTD IRQ */ +#define IRQ_ATA 9 /* ATA IRQ */ +#define IRQ_FATA 10 /* FATA IRQ */ +#define IRQ_POWER 11 /* Power Switch IRQ */ +#define IRQ_BUTTON 12 /* USL-5P Button IRQ */ +#define IRQ_FAULT 13 /* USL-5P Fault IRQ */ + +#define SHUTDOWN_BTN_MAJOR 99 /* Shutdown button device major no. */ + +#define SHUTDOWN_LOOP_CNT 5 /* Shutdown button Detection loop */ +#define SHUTDOWN_DELAY 200 /* Shutdown button delay value(ms) */ + + +/* added by kogiidena */ +/* + * landisk_ledparam + * + * led ------10 -6543210 -6543210 -6543210 + * |000000..|0.......|0.......|U.......| + * | HARD |fastblik| blink | on | + * + * led0: power U:update flag + * led1: error + * led2: usb1 + * led3: usb2 + * led4: usb3 + * led5: usb4 + * led6: usb5 + * + */ +extern int landisk_ledparam; /* from setup.c */ +extern int landisk_buzzerparam; /* from setup.c */ +extern int landisk_arch; /* from setup.c */ + +#endif /* __ASM_SH_IODATA_LANDISK_H */ + -- cgit v1.2.1 From 298476220d1f793ca0ac6c9e5dc817e1ad3e9851 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 14:57:44 +0900 Subject: sh: Add control register barriers. Currently when making changes to control registers, we typically need some time for changes to take effect (8 nops, generally). However, for sh4a we simply need to do an icbi.. This is a simple patch for implementing a general purpose ctrl_barrier() which functions as a control register write barrier. There's some additional documentation in the patch itself, but it's pretty self explanatory. There were also some places where we were not doing the barrier, which didn't seem to have any adverse effects on legacy parts, but certainly did on sh4a. It's safer to have the barrier in place for legacy parts as well in these cases, though this does make flush_tlb_all() more expensive (by an order of 8 nops). We can ifdef around the flush_tlb_all() case for now if it's clear that all legacy parts won't have a problem with this. Signed-off-by: Paul Mundt --- include/asm-sh/mmu_context.h | 7 +++---- include/asm-sh/system.h | 43 ++++++++++++++++++++++++++++++++++--------- 2 files changed, 37 insertions(+), 13 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index 6760d064bd02..87678ba8d6b6 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -174,9 +174,7 @@ static inline void enable_mmu(void) { /* Enable MMU */ ctrl_outl(MMU_CONTROL_INIT, MMUCR); - - /* The manual suggests doing some nops after turning on the MMU */ - __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop\n\t"); + ctrl_barrier(); if (mmu_context_cache == NO_CONTEXT) mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; @@ -191,7 +189,8 @@ static inline void disable_mmu(void) cr = ctrl_inl(MMUCR); cr &= ~MMU_CONTROL_INIT; ctrl_outl(cr, MMUCR); - __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop\n\t"); + + ctrl_barrier(); } #else /* diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index eb4902ed920a..1630a5411e5f 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -67,8 +67,17 @@ static inline void sched_cacheflush(void) { } -#define nop() __asm__ __volatile__ ("nop") - +#ifdef CONFIG_CPU_SH4A +#define __icbi() \ +{ \ + unsigned long __addr; \ + __addr = 0xa8000000; \ + __asm__ __volatile__( \ + "icbi %0\n\t" \ + : /* no output */ \ + : "m" (__m(__addr))); \ +} +#endif #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) @@ -84,15 +93,31 @@ static __inline__ unsigned long tas(volatile int *m) extern void __xchg_called_with_bad_pointer(void); +/* + * A brief note on ctrl_barrier(), the control register write barrier. + * + * Legacy SH cores typically require a sequence of 8 nops after + * modification of a control register in order for the changes to take + * effect. On newer cores (like the sh4a and sh5) this is accomplished + * with icbi. + * + * Also note that on sh4a in the icbi case we can forego a synco for the + * write barrier, as it's not necessary for control registers. + * + * Historically we have only done this type of barrier for the MMUCR, but + * it's also necessary for the CCR, so we make it generic here instead. + */ #ifdef CONFIG_CPU_SH4A -#define mb() __asm__ __volatile__ ("synco": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define ctrl_barrier() __icbi() #define read_barrier_depends() do { } while(0) #else -#define mb() __asm__ __volatile__ ("": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("": : :"memory") +#define mb() __asm__ __volatile__ ("": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("": : :"memory") +#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") #define read_barrier_depends() do { } while(0) #endif @@ -218,8 +243,8 @@ do { \ #define back_to_P1() \ do { \ unsigned long __dummy; \ + ctrl_barrier(); \ __asm__ __volatile__( \ - "nop;nop;nop;nop;nop;nop;nop\n\t" \ "mov.l 1f, %0\n\t" \ "jmp @%0\n\t" \ " nop\n\t" \ -- cgit v1.2.1 From a09749dd86e9e93de10f12ab4ce4e90815b5650a Mon Sep 17 00:00:00 2001 From: Jamie Lenehan Date: Wed, 27 Sep 2006 15:05:39 +0900 Subject: sh: Titan board support. Add support for the titan board. Signed-off-by: Jamie Lenehan Signed-off-by: Paul Mundt --- include/asm-sh/titan.h | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 include/asm-sh/titan.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/titan.h b/include/asm-sh/titan.h new file mode 100644 index 000000000000..270a4f4bc8a9 --- /dev/null +++ b/include/asm-sh/titan.h @@ -0,0 +1,43 @@ +/* + * Platform defintions for Titan + */ + +#ifndef _ASM_SH_TITAN_TITAN_H +#define _ASM_SH_TITAN_TITAN_H + +#define __IO_PREFIX titan +#include + +/* IRQ assignments */ +#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */ +#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */ +#define TITAN_IRQ_MPCIA 8 /* mPCI A */ +#define TITAN_IRQ_MPCIB 11 /* mPCI B */ +#define TITAN_IRQ_USB 11 /* USB */ + +/* + * The external interrupt lines, these take up ints 0 - 15 inclusive + * depending on the priority for the interrupt. In fact the priority + * is the interrupt :-) + */ +#define IRL0_IRQ 0 +#define IRL0_IPR_ADDR INTC_IPRD +#define IRL0_IPR_POS 3 +#define IRL0_PRIORITY 8 + +#define IRL1_IRQ 1 +#define IRL1_IPR_ADDR INTC_IPRD +#define IRL1_IPR_POS 2 +#define IRL1_PRIORITY 8 + +#define IRL2_IRQ 2 +#define IRL2_IPR_ADDR INTC_IPRD +#define IRL2_IPR_POS 1 +#define IRL2_PRIORITY 8 + +#define IRL3_IRQ 3 +#define IRL3_IPR_ADDR INTC_IPRD +#define IRL3_IPR_POS 0 +#define IRL3_PRIORITY 8 + +#endif -- cgit v1.2.1 From 0c7b1df69c62209db19d1279dd882b37c04c5c2f Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:08:07 +0900 Subject: sh: SH-4A Privileged Space Mapping Buffer (PMB) support. Add support for 32-bit physical addressing through the SH-4A Privileged Space Mapping Buffer (PMB). Signed-off-by: Paul Mundt --- include/asm-sh/mmu.h | 48 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index 72f07be6117f..91c884634276 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -25,5 +25,51 @@ typedef struct { typedef unsigned long mm_context_t; #endif /* CONFIG_MMU */ -#endif /* __MMH_H */ + +/* + * Privileged Space Mapping Buffer (PMB) definitions + */ +#define PMB_PASCR 0xff000070 +#define PMB_IRMCR 0xff000078 + +#define PMB_ADDR 0xf6100000 +#define PMB_DATA 0xf7100000 +#define PMB_ENTRY_MAX 16 +#define PMB_E_MASK 0x0000000f +#define PMB_E_SHIFT 8 + +#define PMB_SZ_16M 0x00000000 +#define PMB_SZ_64M 0x00000010 +#define PMB_SZ_128M 0x00000080 +#define PMB_SZ_512M 0x00000090 +#define PMB_SZ_MASK PMB_SZ_512M +#define PMB_C 0x00000008 +#define PMB_WT 0x00000001 +#define PMB_UB 0x00000200 +#define PMB_V 0x00000100 + +#define PMB_NO_ENTRY (-1) + +struct pmb_entry { + unsigned long vpn; + unsigned long ppn; + unsigned long flags; + + /* + * 0 .. NR_PMB_ENTRIES for specific entry selection, or + * PMB_NO_ENTRY to search for a free one + */ + int entry; +}; + +/* arch/sh/mm/pmb.c */ +int __set_pmb_entry(unsigned long vpn, unsigned long ppn, + unsigned long flags, int *entry); +void set_pmb_entry(struct pmb_entry *pmbe); +void clear_pmb_entry(struct pmb_entry *pmbe); +struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, + unsigned long flags); +void pmb_free(struct pmb_entry *pmbe); + +#endif /* __MMU_H */ -- cgit v1.2.1 From 26ff6c11ef38e08990c1e417c299246e6ab18ff7 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:13:36 +0900 Subject: sh: page table alloc cleanups and page fault optimizations. Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt --- include/asm-sh/cache.h | 8 ---- include/asm-sh/cacheflush.h | 1 + include/asm-sh/cpu-sh3/cacheflush.h | 8 +--- include/asm-sh/cpu-sh4/cacheflush.h | 29 ++++++-------- include/asm-sh/page.h | 12 +----- include/asm-sh/pgalloc.h | 37 ++--------------- include/asm-sh/pgtable.h | 80 ++++++++++++++++++++++++------------- 7 files changed, 73 insertions(+), 102 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 33f13367054b..e3a180cf5062 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -10,7 +10,6 @@ #ifdef __KERNEL__ #include -#include #define SH_CACHE_VALID 1 #define SH_CACHE_UPDATED 2 @@ -49,12 +48,5 @@ struct cache_info { unsigned long flags; }; -/* Flush (write-back only) a region (smaller than a page) */ -extern void __flush_wback_region(void *start, int size); -/* Flush (write-back & invalidate) a region (smaller than a page) */ -extern void __flush_purge_region(void *start, int size); -/* Flush (invalidate only) a region (smaller than a page) */ -extern void __flush_invalidate_region(void *start, int size); - #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHE_H */ diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h index 9dfb33edb008..92930b4a40d4 100644 --- a/include/asm-sh/cacheflush.h +++ b/include/asm-sh/cacheflush.h @@ -2,6 +2,7 @@ #define __ASM_SH_CACHEFLUSH_H #ifdef __KERNEL__ +#include #include /* Flush (write-back only) a region (smaller than a page) */ diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index f51aed00c68f..db0cb071ea8e 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH3_CACHEFLUSH_H #define __ASM_CPU_SH3_CACHEFLUSH_H -/* +/* * Cache flushing: * * - flush_cache_all() flushes entire cache @@ -35,10 +35,6 @@ /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ #define CACHE_ALIAS 0x00001000 -struct page; -struct mm_struct; -struct vm_area_struct; - extern void flush_cache_all(void); extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, @@ -79,8 +75,6 @@ extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define p3_cache_init() do { } while (0) -#define HAVE_ARCH_UNMAPPED_AREA - #endif #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index ea58c4c5944d..a95fc951aff6 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -16,30 +16,26 @@ * caching; in which case they're only semi-broken), * so we need them. */ -struct page; -struct mm_struct; -struct vm_area_struct; - -extern void flush_cache_all(void); -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -extern void flush_dcache_page(struct page *pg); +void flush_cache_all(void); +void flush_cache_mm(struct mm_struct *mm); +void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, + unsigned long pfn); +void flush_dcache_page(struct page *pg); #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void flush_cache_sigtramp(unsigned long addr); -extern void flush_icache_user_range(struct vm_area_struct *vma, - struct page *page, unsigned long addr, - int len); +void flush_icache_range(unsigned long start, unsigned long end); +void flush_cache_sigtramp(unsigned long addr); +void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, + unsigned long addr, int len); #define flush_icache_page(vma,pg) do { } while (0) /* Initialization of P3 area for copy_user_page */ -extern void p3_cache_init(void); +void p3_cache_init(void); #define PG_mapped PG_arch_1 @@ -57,4 +53,3 @@ static inline int remap_area_pages(unsigned long addr, unsigned long phys_addr, } #endif /* CONFIG_MMU */ #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ - diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 4811d410d123..51d7281a546a 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -41,7 +41,8 @@ extern void (*copy_page)(void *to, void *from); extern void clear_page_slow(void *to); extern void copy_page_slow(void *to, void *from); -#if defined(CONFIG_SH7705_CACHE_32KB) && defined(CONFIG_MMU) +#if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \ + defined(CONFIG_SH7705_CACHE_32KB)) struct page; extern void clear_user_page(void *to, unsigned long address, struct page *pg); extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg); @@ -50,29 +51,20 @@ extern void __copy_user_page(void *to, void *from, void *orig_to); #elif defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH3) || !defined(CONFIG_MMU) #define clear_user_page(page, vaddr, pg) clear_page(page) #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) -#elif defined(CONFIG_CPU_SH4) -struct page; -extern void clear_user_page(void *to, unsigned long address, struct page *pg); -extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg); -extern void __clear_user_page(void *to, void *orig_to); -extern void __copy_user_page(void *to, void *from, void *orig_to); #endif /* * These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) #define pgd_val(x) ((x).pgd) #define pgprot_val(x) ((x).pgprot) #define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) #define __pgd(x) ((pgd_t) { (x) } ) #define __pgprot(x) ((pgprot_t) { (x) } ) diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h index f4f233f7a4f5..e841465ab4d2 100644 --- a/include/asm-sh/pgalloc.h +++ b/include/asm-sh/pgalloc.h @@ -1,15 +1,6 @@ #ifndef __ASM_SH_PGALLOC_H #define __ASM_SH_PGALLOC_H -#include -#include -#include - -#define pgd_quicklist ((unsigned long *)0) -#define pmd_quicklist ((unsigned long *)0) -#define pte_quicklist ((unsigned long *)0) -#define pgtable_cache_size 0L - #define pmd_populate_kernel(mm, pmd, pte) \ set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte))) @@ -24,38 +15,24 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, */ static inline pgd_t *pgd_alloc(struct mm_struct *mm) { - unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t)); - pgd_t *pgd = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL); - - if (pgd) - memset(pgd, 0, pgd_size); - - return pgd; + return (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline void pgd_free(pgd_t *pgd) { - kfree(pgd); + free_page((unsigned long)pgd); } static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) { - pte_t *pte; - - pte = (pte_t *) __get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); - - return pte; + return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) { - struct page *pte; - - pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); - - return pte; + return alloc_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); } static inline void pte_free_kernel(pte_t *pte) @@ -75,14 +52,8 @@ static inline void pte_free(struct page *pte) * inside the pgd, so has no extra memory associated with it. */ -#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); }) #define pmd_free(x) do { } while (0) #define __pmd_free_tlb(tlb,x) do { } while (0) -#define pgd_populate(mm, pmd, pte) BUG() #define check_pgt_cache() do { } while (0) -#ifdef CONFIG_CPU_SH4 -#define PG_mapped PG_arch_1 -#endif - #endif /* __ASM_SH_PGALLOC_H */ diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 40d41a78041e..9728b58f7c13 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -1,42 +1,42 @@ -#ifndef __ASM_SH_PGTABLE_H -#define __ASM_SH_PGTABLE_H - -#include - /* + * This file contains the functions and defines necessary to modify and + * use the SuperH page table tree. + * * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002, 2003, 2004 Paul Mundt + * Copyright (C) 2002 - 2005 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of this + * archive for more details. */ +#ifndef __ASM_SH_PGTABLE_H +#define __ASM_SH_PGTABLE_H -#include +#include +#include + +#define PTRS_PER_PGD 1024 -/* - * This file contains the functions and defines necessary to modify and use - * the SuperH page table tree. - */ #ifndef __ASSEMBLY__ -#include #include #include -#include extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; extern void paging_init(void); -/* - * Basically we have the same two-level (which is the logical three level - * Linux page table layout folded) page tables as the i386. - */ - /* * ZERO_PAGE is a global shared page that is always zero: used * for zero-mapped memory areas etc.. */ -extern unsigned long empty_zero_page[1024]; +extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) #endif /* !__ASSEMBLY__ */ +/* traditional two-level paging structure */ +#define PGDIR_SHIFT 22 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PTE 1024 #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) @@ -47,7 +47,6 @@ extern unsigned long empty_zero_page[1024]; #define PTE_PHYS_MASK 0x1ffff000 -#ifndef __ASSEMBLY__ /* * First 1MB map is used by fixed purpose. * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) @@ -65,7 +64,7 @@ extern unsigned long empty_zero_page[1024]; #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ #define _PAGE_PROTNONE 0x200 /* software: if not present */ -#define _PAGE_ACCESSED 0x400 /* software: page referenced */ +#define _PAGE_ACCESSED 0x400 /* software: page referenced */ #define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */ #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ @@ -83,7 +82,6 @@ extern unsigned long empty_zero_page[1024]; #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ - /* Mask which drop software flags * We also drop WT bit since it is used for _PAGE_FILE * bit in this implementation. @@ -115,6 +113,8 @@ extern unsigned long empty_zero_page[1024]; #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED) +#ifndef __ASSEMBLY__ + #ifdef CONFIG_MMU #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD) @@ -137,12 +137,13 @@ extern unsigned long empty_zero_page[1024]; #define PAGE_KERNEL_PCC __pgprot(0) #endif +#endif /* __ASSEMBLY__ */ + /* * As i386 and MIPS, SuperH can't do page protection for execute, and * considers that the same as a read. Also, write permissions imply - * read permissions. This is the closest we can get.. + * read permissions. This is the closest we can get.. */ - #define __P000 PAGE_NONE #define __P001 PAGE_READONLY #define __P010 PAGE_COPY @@ -161,6 +162,26 @@ extern unsigned long empty_zero_page[1024]; #define __S110 PAGE_SHARED #define __S111 PAGE_SHARED +#ifndef __ASSEMBLY__ + +/* + * Certain architectures need to do special things when PTEs + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +#define set_pte(pteptr, pteval) (*(pteptr) = pteval) +#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) + +/* + * (pmds are folded into pgds so this doesn't get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) + +#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) +#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) +#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) + #define pte_none(x) (!pte_val(x)) #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE)) #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) @@ -171,7 +192,7 @@ extern unsigned long empty_zero_page[1024]; #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) -#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) +#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) /* * The following only work if pte_present() is true. @@ -248,6 +269,11 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) #define pte_unmap(pte) do { } while (0) #define pte_unmap_nested(pte) do { } while (0) +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) +#define pgd_ERROR(e) \ + printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) + struct vm_area_struct; extern void update_mmu_cache(struct vm_area_struct * vma, unsigned long address, pte_t pte); @@ -272,8 +298,6 @@ extern void update_mmu_cache(struct vm_area_struct * vma, typedef pte_t *pte_addr_t; -#endif /* !__ASSEMBLY__ */ - #define kern_addr_valid(addr) (1) #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ @@ -301,5 +325,7 @@ extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t #include +#endif /* !__ASSEMBLY__ */ + #endif /* __ASM_SH_PAGE_H */ -- cgit v1.2.1 From d7cdc9e8ac82c43fdcd4fde6b5b53d2dcba7f707 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:16:42 +0900 Subject: sh: ioremap() overhaul. ioremap() overhaul. Add support for transparent PMB mapping, get rid of p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the machvec, as everyone can use the generic ioremap() API instead. For PCI memory apertures and other special cases, use the pci_iomap() API, as boards are already required to get the mapping right there. Signed-off-by: Paul Mundt --- include/asm-sh/landisk/iodata_landisk.h | 3 +++ include/asm-sh/mmu.h | 11 ++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h index 7189d3a36384..9db3cdfe6776 100644 --- a/include/asm-sh/landisk/iodata_landisk.h +++ b/include/asm-sh/landisk/iodata_landisk.h @@ -74,5 +74,8 @@ extern int landisk_ledparam; /* from setup.c */ extern int landisk_buzzerparam; /* from setup.c */ extern int landisk_arch; /* from setup.c */ +#define __IO_PREFIX landisk +#include + #endif /* __ASM_SH_IODATA_LANDISK_H */ diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index 91c884634276..ec09589fa6ca 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -50,6 +50,8 @@ typedef unsigned long mm_context_t; #define PMB_NO_ENTRY (-1) +struct pmb_entry; + struct pmb_entry { unsigned long vpn; unsigned long ppn; @@ -60,16 +62,23 @@ struct pmb_entry { * PMB_NO_ENTRY to search for a free one */ int entry; + + struct pmb_entry *next; + /* Adjacent entry link for contiguous multi-entry mappings */ + struct pmb_entry *link; }; /* arch/sh/mm/pmb.c */ int __set_pmb_entry(unsigned long vpn, unsigned long ppn, unsigned long flags, int *entry); -void set_pmb_entry(struct pmb_entry *pmbe); +int set_pmb_entry(struct pmb_entry *pmbe); void clear_pmb_entry(struct pmb_entry *pmbe); struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, unsigned long flags); void pmb_free(struct pmb_entry *pmbe); +long pmb_remap(unsigned long virt, unsigned long phys, + unsigned long size, unsigned long flags); +void pmb_unmap(unsigned long addr); #endif /* __MMU_H */ -- cgit v1.2.1 From c470662854ff94d44bf8c192cefac3efa33db676 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:29:18 +0900 Subject: sh: Fixup SHMLBA definition for SH7705. We need this set to something sensible anywhere were we have an aliasing dcache.. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh2/shmparam.h | 16 ------------- include/asm-sh/cpu-sh3/cacheflush.h | 48 ++++++++++++++++--------------------- include/asm-sh/cpu-sh3/shmparam.h | 16 ------------- include/asm-sh/cpu-sh4/shmparam.h | 19 --------------- include/asm-sh/shmparam.h | 20 +++++++++++++--- 5 files changed, 38 insertions(+), 81 deletions(-) delete mode 100644 include/asm-sh/cpu-sh2/shmparam.h delete mode 100644 include/asm-sh/cpu-sh3/shmparam.h delete mode 100644 include/asm-sh/cpu-sh4/shmparam.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh2/shmparam.h b/include/asm-sh/cpu-sh2/shmparam.h deleted file mode 100644 index 817c1821ee4b..000000000000 --- a/include/asm-sh/cpu-sh2/shmparam.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/shmparam.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_SHMPARAM_H -#define __ASM_CPU_SH2_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* __ASM_CPU_SH2_SHMPARAM_H */ - diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index db0cb071ea8e..97f5a64c2ab8 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -35,47 +35,41 @@ /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ #define CACHE_ALIAS 0x00001000 -extern void flush_cache_all(void); -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -extern void flush_dcache_page(struct page *pg); -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -/* SH3 has unified cache so no special action needed here */ -#define flush_cache_sigtramp(vaddr) do { } while (0) -#define flush_page_to_ram(page) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -#define p3_cache_init() do { } while (0) - #define PG_mapped PG_arch_1 -/* We provide our own get_unmapped_area to avoid cache alias issue */ -#define HAVE_ARCH_UNMAPPED_AREA - +void flush_cache_all(void); +void flush_cache_mm(struct mm_struct *mm); +void flush_cache_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); +void flush_dcache_page(struct page *pg); +void flush_icache_range(unsigned long start, unsigned long end); +void flush_icache_page(struct vm_area_struct *vma, struct page *page); #else - #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_icache_range(start, end) do { } while (0) #define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) +#endif + +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) + +/* SH3 has unified cache so no special action needed here */ #define flush_cache_sigtramp(vaddr) do { } while (0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define p3_cache_init() do { } while (0) -#endif +/* + * We provide our own get_unmapped_area to avoid cache aliasing issues + * on SH7705 with a 32KB cache, and to page align addresses in the + * non-aliasing case. + */ +#define HAVE_ARCH_UNMAPPED_AREA #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh3/shmparam.h b/include/asm-sh/cpu-sh3/shmparam.h deleted file mode 100644 index da5b5eec81ee..000000000000 --- a/include/asm-sh/cpu-sh3/shmparam.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/shmparam.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_SHMPARAM_H -#define __ASM_CPU_SH3_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* __ASM_CPU_SH3_SHMPARAM_H */ - diff --git a/include/asm-sh/cpu-sh4/shmparam.h b/include/asm-sh/cpu-sh4/shmparam.h deleted file mode 100644 index a5a0aa9425fe..000000000000 --- a/include/asm-sh/cpu-sh4/shmparam.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/shmparam.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_SHMPARAM_H -#define __ASM_CPU_SH4_SHMPARAM_H - -/* - * SH-4 has D-cache alias issue - */ -#define SHMLBA (PAGE_SIZE*4) /* attach addr a multiple of this */ - -#endif /* __ASM_CPU_SH4_SHMPARAM_H */ - diff --git a/include/asm-sh/shmparam.h b/include/asm-sh/shmparam.h index 0a95604b9b66..ba1758d90106 100644 --- a/include/asm-sh/shmparam.h +++ b/include/asm-sh/shmparam.h @@ -1,8 +1,22 @@ +/* + * include/asm-sh/shmparam.h + * + * Copyright (C) 1999 Niibe Yutaka + * Copyright (C) 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ #ifndef __ASM_SH_SHMPARAM_H #define __ASM_SH_SHMPARAM_H -#ifdef __KERNEL__ -#include +/* + * SH-4 and SH-3 7705 have an aliasing dcache. Bump this up to a sensible value + * for everyone, and work out the specifics from the probed cache descriptor. + */ +#define SHMLBA 0x4000 /* attach addr a multiple of this */ + +#define __ARCH_FORCE_SHMLBA -#endif /* __KERNEL__ */ #endif /* __ASM_SH_SHMPARAM_H */ -- cgit v1.2.1 From 373e68b5472d421cbd2703e7a77caf053f78c005 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:41:24 +0900 Subject: sh: Board updates for I/O routine rework. This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt --- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 3 ++ include/asm-sh/mc146818rtc.h | 2 +- include/asm-sh/se.h | 80 +++++++++++++++++++++++++++ include/asm-sh/se/io.h | 35 ------------ include/asm-sh/se/se.h | 77 -------------------------- include/asm-sh/se7300.h | 64 ++++++++++++++++++++++ include/asm-sh/se7300/io.h | 29 ---------- include/asm-sh/se7300/se7300.h | 61 --------------------- include/asm-sh/se73180.h | 65 ++++++++++++++++++++++ include/asm-sh/se73180/io.h | 32 ----------- include/asm-sh/se73180/se73180.h | 62 --------------------- include/asm-sh/se7751.h | 71 ++++++++++++++++++++++++ include/asm-sh/se7751/io.h | 42 --------------- include/asm-sh/se7751/se7751.h | 68 ----------------------- include/asm-sh/sh03/io.h | 10 +--- include/asm-sh/snapgear.h | 79 +++++++++++++++++++++++++++ include/asm-sh/snapgear/io.h | 92 -------------------------------- include/asm-sh/systemh/7751systemh.h | 68 ----------------------- include/asm-sh/systemh/io.h | 43 --------------- include/asm-sh/systemh7751.h | 71 ++++++++++++++++++++++++ 20 files changed, 435 insertions(+), 619 deletions(-) create mode 100644 include/asm-sh/se.h delete mode 100644 include/asm-sh/se/io.h delete mode 100644 include/asm-sh/se/se.h create mode 100644 include/asm-sh/se7300.h delete mode 100644 include/asm-sh/se7300/io.h delete mode 100644 include/asm-sh/se7300/se7300.h create mode 100644 include/asm-sh/se73180.h delete mode 100644 include/asm-sh/se73180/io.h delete mode 100644 include/asm-sh/se73180/se73180.h create mode 100644 include/asm-sh/se7751.h delete mode 100644 include/asm-sh/se7751/io.h delete mode 100644 include/asm-sh/se7751/se7751.h create mode 100644 include/asm-sh/snapgear.h delete mode 100644 include/asm-sh/snapgear/io.h delete mode 100644 include/asm-sh/systemh/7751systemh.h delete mode 100644 include/asm-sh/systemh/io.h create mode 100644 include/asm-sh/systemh7751.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 857cc2ebbc69..69faf0171473 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -44,6 +44,9 @@ #define IRQ_RINGING 4 /* Ringing IRQ */ #define IRQ_CODEC 5 /* CODEC IRQ */ +#define __IO_PREFIX hs7751rvoip +#include + /* arch/sh/boards/renesas/hs7751rvoip/irq.c */ void init_hs7751rvoip_IRQ(void); diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h index 1707cfb2915d..adc6e67c6b75 100644 --- a/include/asm-sh/mc146818rtc.h +++ b/include/asm-sh/mc146818rtc.h @@ -24,7 +24,7 @@ #define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) #elif defined(CONFIG_SH_SECUREEDGE5410) -#include +#include #define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR #define CMOS_READ(addr) secureedge5410_cmos_read(addr) diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h new file mode 100644 index 000000000000..a1832154a3aa --- /dev/null +++ b/include/asm-sh/se.h @@ -0,0 +1,80 @@ +#ifndef __ASM_SH_HITACHI_SE_H +#define __ASM_SH_HITACHI_SE_H + +/* + * linux/include/asm-sh/hitachi_se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_83902 0xb0000000 /* DP83902A */ +#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ +#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ + +#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ +#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ +#define PA_LED 0xb0c00000 /* LED */ +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define PA_BCR 0xb0e00000 +#else +#define PA_BCR 0xb1400000 /* FPGA */ +#endif + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define IRQ_STNIC 12 +#else +#define IRQ_STNIC 10 +#endif + +#define __IO_PREFIX se +#include + +#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se/io.h b/include/asm-sh/se/io.h deleted file mode 100644 index 9eeb86cd6cef..000000000000 --- a/include/asm-sh/se/io.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-sh/io_se.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_SE_H -#define _ASM_SH_IO_SE_H - -extern unsigned char se_inb(unsigned long port); -extern unsigned short se_inw(unsigned long port); -extern unsigned int se_inl(unsigned long port); - -extern void se_outb(unsigned char value, unsigned long port); -extern void se_outw(unsigned short value, unsigned long port); -extern void se_outl(unsigned int value, unsigned long port); - -extern unsigned char se_inb_p(unsigned long port); -extern void se_outb_p(unsigned char value, unsigned long port); - -extern void se_insb(unsigned long port, void *addr, unsigned long count); -extern void se_insw(unsigned long port, void *addr, unsigned long count); -extern void se_insl(unsigned long port, void *addr, unsigned long count); -extern void se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_SE_H */ diff --git a/include/asm-sh/se/se.h b/include/asm-sh/se/se.h deleted file mode 100644 index 791c5da0388a..000000000000 --- a/include/asm-sh/se/se.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE_H -#define __ASM_SH_HITACHI_SE_H - -/* - * linux/include/asm-sh/hitachi_se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_83902 0xb0000000 /* DP83902A */ -#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ -#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ - -#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ -#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ -#define PA_LED 0xb0c00000 /* LED */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define PA_BCR 0xb0e00000 -#else -#define PA_BCR 0xb1400000 /* FPGA */ -#endif - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#else -#define IRQ_STNIC 10 -#endif - -#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h new file mode 100644 index 000000000000..4e24edccb30d --- /dev/null +++ b/include/asm-sh/se7300.h @@ -0,0 +1,64 @@ +#ifndef __ASM_SH_HITACHI_SE7300_H +#define __ASM_SH_HITACHI_SE7300_H + +/* + * linux/include/asm-sh/se/se7300.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 7300 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0800000 /* LED */ +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh7300se +#include + +#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h deleted file mode 100644 index c6af85529714..000000000000 --- a/include/asm-sh/se7300/io.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * include/asm-sh/se7300/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * IO functions for SH-Mobile(SH7300) SolutionEngine - */ - -#ifndef _ASM_SH_IO_7300SE_H -#define _ASM_SH_IO_7300SE_H - -extern unsigned char sh7300se_inb(unsigned long port); -extern unsigned short sh7300se_inw(unsigned long port); -extern unsigned int sh7300se_inl(unsigned long port); - -extern void sh7300se_outb(unsigned char value, unsigned long port); -extern void sh7300se_outw(unsigned short value, unsigned long port); -extern void sh7300se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7300se_inb_p(unsigned long port); -extern void sh7300se_outb_p(unsigned char value, unsigned long port); - -extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_7300SE_H */ diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300/se7300.h deleted file mode 100644 index 3ec1ded86c97..000000000000 --- a/include/asm-sh/se7300/se7300.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE7300_H -#define __ASM_SH_HITACHI_SE7300_H - -/* - * linux/include/asm-sh/se/se7300.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 7300 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0800000 /* LED */ -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h new file mode 100644 index 000000000000..3a4acb3e38a1 --- /dev/null +++ b/include/asm-sh/se73180.h @@ -0,0 +1,65 @@ +#ifndef __ASM_SH_HITACHI_SE73180_H +#define __ASM_SH_HITACHI_SE73180_H + +/* + * include/asm-sh/se/se73180.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 73180 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0C00000 /* LED */ +#define LED_SHIFT 0 +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh73180se +#include + +#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se73180/io.h b/include/asm-sh/se73180/io.h deleted file mode 100644 index c9cb1b9412c6..000000000000 --- a/include/asm-sh/se73180/io.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/se73180/io.h - * - * Copyright (C) 2003 Takashi Kusuda - * Based on include/asm-sh/se7300/io.h - * - * IO functions for SH-Mobile3(SH73180) SolutionEngine - * - */ - -#ifndef _ASM_SH_IO_73180SE_H -#define _ASM_SH_IO_73180SE_H - -extern unsigned char sh73180se_inb(unsigned long port); -extern unsigned short sh73180se_inw(unsigned long port); -extern unsigned int sh73180se_inl(unsigned long port); - -extern void sh73180se_outb(unsigned char value, unsigned long port); -extern void sh73180se_outw(unsigned short value, unsigned long port); -extern void sh73180se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh73180se_inb_p(unsigned long port); -extern void sh73180se_outb_p(unsigned char value, unsigned long port); - -extern void sh73180se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh73180se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh73180se_outsl(unsigned long port, const void *addr, unsigned long count); - -#endif /* _ASM_SH_IO_73180SE_H */ diff --git a/include/asm-sh/se73180/se73180.h b/include/asm-sh/se73180/se73180.h deleted file mode 100644 index f5b93e39e768..000000000000 --- a/include/asm-sh/se73180/se73180.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE73180_H -#define __ASM_SH_HITACHI_SE73180_H - -/* - * include/asm-sh/se/se73180.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 73180 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0C00000 /* LED */ -#define LED_SHIFT 0 -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ -#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ -#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#endif /* __ASM_SH_HITACHI_SE73180_H */ diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h new file mode 100644 index 000000000000..88cd379d9084 --- /dev/null +++ b/include/asm-sh/se7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_HITACHI_7751SE_H +#define __ASM_SH_HITACHI_7751SE_H + +/* + * linux/include/asm-sh/hitachi_7751se.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SolutionEngine support + + * Modified for 7751 Solution Engine by + * Ian da Silva and Jeremy Siegel, 2001. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751se +#include + +#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/se7751/io.h b/include/asm-sh/se7751/io.h deleted file mode 100644 index 78d8f5744bc5..000000000000 --- a/include/asm-sh/se7751/io.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/io_7751se.h - * - * Modified version of io_se.h for the 7751se-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi SolutionEngine - */ - -#ifndef _ASM_SH_IO_7751SE_H -#define _ASM_SH_IO_7751SE_H - -extern unsigned char sh7751se_inb(unsigned long port); -extern unsigned short sh7751se_inw(unsigned long port); -extern unsigned int sh7751se_inl(unsigned long port); - -extern void sh7751se_outb(unsigned char value, unsigned long port); -extern void sh7751se_outw(unsigned short value, unsigned long port); -extern void sh7751se_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751se_inb_p(unsigned long port); -extern void sh7751se_outb_p(unsigned char value, unsigned long port); - -extern void sh7751se_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751se_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751se_readb(unsigned long addr); -extern unsigned short sh7751se_readw(unsigned long addr); -extern unsigned int sh7751se_readl(unsigned long addr); -extern void sh7751se_writeb(unsigned char b, unsigned long addr); -extern void sh7751se_writew(unsigned short b, unsigned long addr); -extern void sh7751se_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751se_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_7751SE_H */ diff --git a/include/asm-sh/se7751/se7751.h b/include/asm-sh/se7751/se7751.h deleted file mode 100644 index 738e22bebdfb..000000000000 --- a/include/asm-sh/se7751/se7751.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_HITACHI_7751SE_H -#define __ASM_SH_HITACHI_7751SE_H - -/* - * linux/include/asm-sh/hitachi_7751se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - - * Modified for 7751 Solution Engine by - * Ian da Silva and Jeremy Siegel, 2001. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h index 25792e9831ea..df3b187ef883 100644 --- a/include/asm-sh/sh03/io.h +++ b/include/asm-sh/sh03/io.h @@ -33,14 +33,6 @@ #define IRL3_IPR_POS 0 #define IRL3_PRIORITY 4 - -extern unsigned long sh03_isa_port2addr(unsigned long offset); - -extern void setup_sh03(void); -extern void init_sh03_IRQ(void); -extern void heartbeat_sh03(void); - -extern void sh03_rtc_gettimeofday(struct timeval *tv); -extern int sh03_rtc_settimeofday(const struct timeval *tv); +void heartbeat_sh03(void); #endif /* _ASM_SH_IO_SH03_H */ diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h new file mode 100644 index 000000000000..6b5e4ddc073a --- /dev/null +++ b/include/asm-sh/snapgear.h @@ -0,0 +1,79 @@ +/* + * include/asm-sh/snapgear/io.h + * + * Modified version of io_se.h for the snapgear-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for a SnapGear + */ + +#ifndef _ASM_SH_IO_SNAPGEAR_H +#define _ASM_SH_IO_SNAPGEAR_H + +#if defined(CONFIG_CPU_SH4) +/* + * The external interrupt lines, these take up ints 0 - 15 inclusive + * depending on the priority for the interrupt. In fact the priority + * is the interrupt :-) + */ + +#define IRL0_IRQ 2 +#define IRL0_IPR_ADDR INTC_IPRD +#define IRL0_IPR_POS 3 +#define IRL0_PRIORITY 13 + +#define IRL1_IRQ 5 +#define IRL1_IPR_ADDR INTC_IPRD +#define IRL1_IPR_POS 2 +#define IRL1_PRIORITY 10 + +#define IRL2_IRQ 8 +#define IRL2_IPR_ADDR INTC_IPRD +#define IRL2_IPR_POS 1 +#define IRL2_PRIORITY 7 + +#define IRL3_IRQ 11 +#define IRL3_IPR_ADDR INTC_IPRD +#define IRL3_IPR_POS 0 +#define IRL3_PRIORITY 4 +#endif + +#define __IO_PREFIX snapgear +#include + +#ifdef CONFIG_SH_SECUREEDGE5410 +/* + * We need to remember what was written to the ioport as some bits + * are shared with other functions and you cannot read back what was + * written :-| + * + * Bit Read Write + * ----------------------------------------------- + * D0 DCD on ttySC1 power + * D1 Reset Switch heatbeat + * D2 ttySC0 CTS (7100) LAN + * D3 - WAN + * D4 ttySC0 DCD (7100) CONSOLE + * D5 - ONLINE + * D6 - VPN + * D7 - DTR on ttySC1 + * D8 - ttySC0 RTS (7100) + * D9 - ttySC0 DTR (7100) + * D10 - RTC SCLK + * D11 RTC DATA RTC DATA + * D12 - RTS RESET + */ + +#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) +extern unsigned short secureedge5410_ioport; + +#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ + (secureedge5410_ioport = \ + ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) +#define SECUREEDGE_READ_IOPORT() \ + ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) +#endif + +#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/snapgear/io.h b/include/asm-sh/snapgear/io.h deleted file mode 100644 index bfa97ac06280..000000000000 --- a/include/asm-sh/snapgear/io.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-sh/snapgear/io.h - * - * Modified version of io_se.h for the snapgear-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for a SnapGear - */ - -#ifndef _ASM_SH_IO_SNAPGEAR_H -#define _ASM_SH_IO_SNAPGEAR_H - -#if defined(CONFIG_CPU_SH4) -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ - -#define IRL0_IRQ 2 -#define IRL0_IPR_ADDR INTC_IPRD -#define IRL0_IPR_POS 3 -#define IRL0_PRIORITY 13 - -#define IRL1_IRQ 5 -#define IRL1_IPR_ADDR INTC_IPRD -#define IRL1_IPR_POS 2 -#define IRL1_PRIORITY 10 - -#define IRL2_IRQ 8 -#define IRL2_IPR_ADDR INTC_IPRD -#define IRL2_IPR_POS 1 -#define IRL2_PRIORITY 7 - -#define IRL3_IRQ 11 -#define IRL3_IPR_ADDR INTC_IPRD -#define IRL3_IPR_POS 0 -#define IRL3_PRIORITY 4 -#endif - -extern unsigned char snapgear_inb(unsigned long port); -extern unsigned short snapgear_inw(unsigned long port); -extern unsigned int snapgear_inl(unsigned long port); - -extern void snapgear_outb(unsigned char value, unsigned long port); -extern void snapgear_outw(unsigned short value, unsigned long port); -extern void snapgear_outl(unsigned int value, unsigned long port); - -extern unsigned char snapgear_inb_p(unsigned long port); -extern void snapgear_outb_p(unsigned char value, unsigned long port); - -extern void snapgear_insl(unsigned long port, void *addr, unsigned long count); -extern void snapgear_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long snapgear_isa_port2addr(unsigned long offset); - -#ifdef CONFIG_SH_SECUREEDGE5410 -/* - * We need to remember what was written to the ioport as some bits - * are shared with other functions and you cannot read back what was - * written :-| - * - * Bit Read Write - * ----------------------------------------------- - * D0 DCD on ttySC1 power - * D1 Reset Switch heatbeat - * D2 ttySC0 CTS (7100) LAN - * D3 - WAN - * D4 ttySC0 DCD (7100) CONSOLE - * D5 - ONLINE - * D6 - VPN - * D7 - DTR on ttySC1 - * D8 - ttySC0 RTS (7100) - * D9 - ttySC0 DTR (7100) - * D10 - RTC SCLK - * D11 RTC DATA RTC DATA - * D12 - RTS RESET - */ - - #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) - extern unsigned short secureedge5410_ioport; - - #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ - (secureedge5410_ioport = \ - ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) - #define SECUREEDGE_READ_IOPORT() \ - ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) -#endif - -#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/systemh/7751systemh.h b/include/asm-sh/systemh/7751systemh.h deleted file mode 100644 index 4170531bdbd9..000000000000 --- a/include/asm-sh/systemh/7751systemh.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H -#define __ASM_SH_SYSTEMH_7751SYSTEMH_H - -/* - * linux/include/asm-sh/systemh/7751systemh.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SystemH support - - * Modified for 7751 SystemH by - * Jonathan Short, 2002. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff --git a/include/asm-sh/systemh/io.h b/include/asm-sh/systemh/io.h deleted file mode 100644 index 327849b49db8..000000000000 --- a/include/asm-sh/systemh/io.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/systemh/io.h - * - * Stupid I/O definitions for SystemH, cloned from SE7751. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_SYSTEMH_IO_H -#define __ASM_SH_SYSTEMH_IO_H - -extern unsigned char sh7751systemh_inb(unsigned long port); -extern unsigned short sh7751systemh_inw(unsigned long port); -extern unsigned int sh7751systemh_inl(unsigned long port); - -extern void sh7751systemh_outb(unsigned char value, unsigned long port); -extern void sh7751systemh_outw(unsigned short value, unsigned long port); -extern void sh7751systemh_outl(unsigned int value, unsigned long port); - -extern unsigned char sh7751systemh_inb_p(unsigned long port); -extern void sh7751systemh_outb_p(unsigned char value, unsigned long port); - -extern void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count); -extern void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count); -extern void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char sh7751systemh_readb(unsigned long addr); -extern unsigned short sh7751systemh_readw(unsigned long addr); -extern unsigned int sh7751systemh_readl(unsigned long addr); -extern void sh7751systemh_writeb(unsigned char b, unsigned long addr); -extern void sh7751systemh_writew(unsigned short b, unsigned long addr); -extern void sh7751systemh_writel(unsigned int b, unsigned long addr); - -extern unsigned long sh7751systemh_isa_port2addr(unsigned long offset); - -#endif /* __ASM_SH_SYSTEMH_IO_H */ - diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h new file mode 100644 index 000000000000..b143bb2a2ca7 --- /dev/null +++ b/include/asm-sh/systemh7751.h @@ -0,0 +1,71 @@ +#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H +#define __ASM_SH_SYSTEMH_7751SYSTEMH_H + +/* + * linux/include/asm-sh/systemh/7751systemh.h + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Hitachi SystemH support + + * Modified for 7751 SystemH by + * Jonathan Short, 2002. + */ + +/* Box specific addresses. */ + +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_FROM 0x01000000 /* EPROM */ +#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 + +#define PA_EXT4 0x12000000 +#define PA_EXT4_SIZE 0x02000000 +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ + +#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ +#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ +#define PA_LED 0xba000000 /* LED */ +#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ + +#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ +#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_MODE (PA_MRSHPC + 4) +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) + +#define BCR_ILCRA (PA_BCR + 0) +#define BCR_ILCRB (PA_BCR + 2) +#define BCR_ILCRC (PA_BCR + 4) +#define BCR_ILCRD (PA_BCR + 6) +#define BCR_ILCRE (PA_BCR + 8) +#define BCR_ILCRF (PA_BCR + 10) +#define BCR_ILCRG (PA_BCR + 12) + +#define IRQ_79C973 13 + +#define __IO_PREFIX sh7751systemh +#include + +#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ -- cgit v1.2.1 From d7c30c682a278abe1a52db83f69efec1a9d8f8c2 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:49:57 +0900 Subject: sh: Store Queue API rework. Rewrite the store queue API for a per-cpu interface in the driver model. The old miscdevice is dropped, due to TASK_SIZE limitations, and no one was using it anyways. Carve up and allocate store queue space with a bitmap, back sq mapping objects with a slab cache, and let userspace worry about its own prefetching. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/sq.h | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h index 366b09166d3b..586d6491816a 100644 --- a/include/asm-sh/cpu-sh4/sq.h +++ b/include/asm-sh/cpu-sh4/sq.h @@ -17,7 +17,7 @@ * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be * mapped to any physical address space. Since data is written (and aligned) * to 32-byte boundaries, we need to be sure that all allocations are aligned. - */ + */ #define SQ_SIZE 32 #define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) #define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) @@ -26,23 +26,10 @@ #define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) #define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) -struct sq_mapping { - const char *name; - - unsigned long sq_addr; - unsigned long addr; - unsigned int size; - - struct list_head list; -}; - /* arch/sh/kernel/cpu/sh4/sq.c */ -extern struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name); -extern void sq_unmap(struct sq_mapping *map); - -extern void sq_clear(unsigned long addr, unsigned int len); -extern void sq_flush(void *addr); -extern void sq_flush_range(unsigned long start, unsigned int len); +unsigned long sq_remap(unsigned long phys, unsigned int size, + const char *name, unsigned long flags); +void sq_unmap(unsigned long vaddr); +void sq_flush_range(unsigned long start, unsigned int len); #endif /* __ASM_CPU_SH4_SQ_H */ - -- cgit v1.2.1 From 5283ecb5ccbdb90d49fce6488d3944bba63a591c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 15:59:17 +0900 Subject: sh: Add support for R7780RP and R7780MP boards. This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/addrspace.h | 3 + include/asm-sh/cpu-sh4/dma-sh7780.h | 39 +++++++ include/asm-sh/cpu-sh4/dma.h | 11 +- include/asm-sh/hs7751rvoip/hs7751rvoip.h | 2 - include/asm-sh/irq-sh7780.h | 5 - include/asm-sh/irq.h | 2 +- include/asm-sh/landisk/iodata_landisk.h | 2 - include/asm-sh/r7780rp/ide.h | 8 ++ include/asm-sh/r7780rp/r7780rp.h | 177 +++++++++++++++++++++++++++++++ include/asm-sh/rts7751r2d/rts7751r2d.h | 2 - 10 files changed, 236 insertions(+), 15 deletions(-) create mode 100644 include/asm-sh/cpu-sh4/dma-sh7780.h create mode 100644 include/asm-sh/r7780rp/ide.h create mode 100644 include/asm-sh/r7780rp/r7780rp.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h index 727634d886ce..bb2e1b03060c 100644 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ b/include/asm-sh/cpu-sh4/addrspace.h @@ -22,5 +22,8 @@ #define P4SEG_TLB_DATA 0xf7000000 #define P4SEG_REG_BASE 0xff000000 +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ + #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h new file mode 100644 index 000000000000..6c90d28331b2 --- /dev/null +++ b/include/asm-sh/cpu-sh4/dma-sh7780.h @@ -0,0 +1,39 @@ +#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H +#define __ASM_SH_CPU_SH4_DMA_SH7780_H + +#define REQ_HE 0x000000C0 +#define REQ_H 0x00000080 +#define REQ_LE 0x00000040 +#define TM_BURST 0x0000020 +#define TS_8 0x00000000 +#define TS_16 0x00000008 +#define TS_32 0x00000010 +#define TS_16BLK 0x00000018 +#define TS_32BLK 0x00100000 + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_128BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int __attribute__ ((used)) ts_shift[] = { + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_128BIT] = 4, + [XMIT_SZ_256BIT] = 5, +}; + +#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index 0dfe61f14802..3e4b3e6d80c0 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -1,11 +1,17 @@ #ifndef __ASM_CPU_SH4_DMA_H #define __ASM_CPU_SH4_DMA_H +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) + #ifdef CONFIG_CPU_SH4A #define SH_DMAC_BASE 0xfc808020 + +#define CHCR_TS_MASK 0x18 +#define CHCR_TS_SHIFT 3 + +#include #else #define SH_DMAC_BASE 0xffa00000 -#endif /* Definitions for the SuperH DMAC */ #define TM_BURST 0x0000080 @@ -19,8 +25,6 @@ #define DMAOR_COD 0x00000008 -#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) - /* * The SuperH DMAC supports a number of transmit sizes, we list them here, * with their respective values as they appear in the CHCR registers. @@ -45,5 +49,6 @@ static unsigned int ts_shift[] __attribute__ ((used)) = { [XMIT_SZ_32BIT] = 2, [XMIT_SZ_256BIT] = 5, }; +#endif #endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h index 69faf0171473..c4cff9d33927 100644 --- a/include/asm-sh/hs7751rvoip/hs7751rvoip.h +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -19,8 +19,6 @@ #define PA_OUTPORTR 0xa400000e /* Output Port Reguster */ #define PA_VERREG 0xa4000014 /* FPGA Version Register */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ diff --git a/include/asm-sh/irq-sh7780.h b/include/asm-sh/irq-sh7780.h index 7f90315cd830..895c5780e454 100644 --- a/include/asm-sh/irq-sh7780.h +++ b/include/asm-sh/irq-sh7780.h @@ -145,11 +145,6 @@ #define TMU_CH5_IPR_POS 1 #define TMU_CH5_PRIORITY 2 -#define RTC_IRQ 22 -#define RTC_IPR_ADDR INTC_INT2PRI1 -#define RTC_IPR_POS 0 -#define RTC_PRIORITY TIMER_PRIORITY - /* SCIF0 */ #define SCIF0_ERI_IRQ 40 #define SCIF0_RXI_IRQ 41 diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 611e67cd0627..7e8455b1cb44 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -577,7 +577,7 @@ extern int ipr_irq_demux(int irq); #define NR_INTC2_IRQS 64 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define INTC2_BASE 0xffd40000 -#define INTC2_FIRST_IRQ 22 +#define INTC2_FIRST_IRQ 21 #define INTC2_INTMSK_OFFSET (0x38) #define INTC2_INTMSKCLR_OFFSET (0x3c) #define NR_INTC2_IRQS 60 diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h index 9db3cdfe6776..c74d3c73f377 100644 --- a/include/asm-sh/landisk/iodata_landisk.h +++ b/include/asm-sh/landisk/iodata_landisk.h @@ -22,8 +22,6 @@ /* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */ #define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_LCD_CLRDSP 0x00 /* LCD Clear Display Offset */ #define PA_LCD_RTNHOME 0x00 /* LCD Return Home Offset */ #define PA_LCD_ENTMODE 0x00 /* LCD Entry Mode Offset */ diff --git a/include/asm-sh/r7780rp/ide.h b/include/asm-sh/r7780rp/ide.h new file mode 100644 index 000000000000..a1ed78e0f617 --- /dev/null +++ b/include/asm-sh/r7780rp/ide.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_R7780RP_IDE_H +#define __ASM_SH_R7780RP_IDE_H + +/* Nothing to see here.. */ +#include + +#endif /* __ASM_SH_R7780RP_IDE_H */ + diff --git a/include/asm-sh/r7780rp/r7780rp.h b/include/asm-sh/r7780rp/r7780rp.h new file mode 100644 index 000000000000..f95d9dba31a2 --- /dev/null +++ b/include/asm-sh/r7780rp/r7780rp.h @@ -0,0 +1,177 @@ +#ifndef __ASM_SH_RENESAS_R7780RP_H +#define __ASM_SH_RENESAS_R7780RP_H + +/* + * linux/include/asm-sh/r7780rp.h + * + * Copyright (C) 2000 Atom Create Engineering Co., Ltd. + * + * Renesas Solutions Highlander R7780RP support + */ + +/* Box specific addresses. */ +#if defined(CONFIG_SH_R7780MP) +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ +#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ +#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ +#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */ +#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */ +#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */ +#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */ +#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */ +#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */ +#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */ +#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */ +#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */ +#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ +#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ +#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ +#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ +#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ +#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ +#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ +#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */ +#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ +#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ +#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ +#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */ +#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */ +#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */ +#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */ +#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */ +#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */ +#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */ +#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */ +#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */ +#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */ +#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */ +#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */ +#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */ +#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */ +#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */ +#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */ +#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */ +#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */ +#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */ +#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */ +#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */ +#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ +#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ +#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ +#define PA_ICCR (PA_BCR+0x0600) /* Serial control */ +#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */ +#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */ +#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */ +#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */ +#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ +#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ +#define PA_PMR (PA_BCR+0x0900) /* */ + +#define PA_AX88796L 0xa4100400 /* AX88796L Area */ +#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ +#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ + +#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */ +#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */ +#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */ +#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */ +#define IRQ_CFCARD 1 /* CF Card IRQ */ +// #define IRQ_CFINST 0 /* CF Card Insert IRQ */ +#define IRQ_TP 2 /* Touch Panel IRQ */ +#define IRQ_SCI1 3 /* SCI1 IRQ */ +#define IRQ_SCI0 4 /* SCI0 IRQ */ +#define IRQ_2SERIAL 5 /* Serial IRQ */ +#define IRQ_RTC 6 /* RTC A / B IRQ */ +#define IRQ_EXTENTION6 7 /* EXT6n IRQ */ +#define IRQ_EXTENTION5 8 /* EXT5n IRQ */ +#define IRQ_EXTENTION4 9 /* EXT4n IRQ */ +#define IRQ_EXTENTION2 10 /* EXT2n IRQ */ +#define IRQ_EXTENTION1 11 /* EXT1n IRQ */ +#define IRQ_ONETH 13 /* On board Ethernet IRQ */ +#define IRQ_PSW 14 /* Push Switch IRQ */ + +#else /* R7780RP */ + +#define PA_BCR 0xa5000000 /* FPGA */ +#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ +#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ +#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */ +#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */ +#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */ +#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */ +#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */ +#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */ +#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */ +#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */ +#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */ +#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */ +#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ +#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ +#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ +#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ +#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ +#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ +#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ +#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ +#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ +#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */ +#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */ +#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */ +#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ +#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ +#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ +#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */ +#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */ +#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */ +#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */ +#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */ +#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */ +#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ +#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ +#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ +#define PA_ICCR (PA_BCR+0x0500) /* Serial control */ +#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */ +#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */ +#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */ +#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */ +#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ + +#define PA_AX88796L 0xa5800400 /* AX88796L Area */ +#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ +#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ + +#define IRQ_PCISLOT1 0 /* PCI Slot #1 IRQ */ +#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */ +#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */ +#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */ +#define IRQ_CFCARD 4 /* CF Card IRQ */ +#define IRQ_CFINST 5 /* CF Card Insert IRQ */ +#define IRQ_M66596 6 /* M66596 IRQ */ +#define IRQ_SDCARD 7 /* SD Card IRQ */ +#define IRQ_TUCHPANEL 8 /* Touch Panel IRQ */ +#define IRQ_SCI 9 /* SCI IRQ */ +#define IRQ_2SERIAL 10 /* Serial IRQ */ +#define IRQ_EXTENTION 11 /* EXTn IRQ */ +#define IRQ_ONETH 12 /* On board Ethernet IRQ */ +#define IRQ_PSW 13 /* Push Switch IRQ */ +#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */ + +#endif /* CONFIG_SH_R7780MP */ + +#define __IO_PREFIX r7780rp +#include + +#endif /* __ASM_SH_RENESAS_R7780RP */ diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h index 4e09ba597e9a..b112ae221fd1 100644 --- a/include/asm-sh/rts7751r2d/rts7751r2d.h +++ b/include/asm-sh/rts7751r2d/rts7751r2d.h @@ -41,8 +41,6 @@ #define PA_AX88796L 0xaa000400 /* AX88796L Area */ #define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ #define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ -- cgit v1.2.1 From f1517494407b1f1ca0063a756cc30d75e96d433c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:01:12 +0900 Subject: sh: Cleanup and document register bank usage. Initial register bank cleanup. Make SR.RB configurable, and add some preliminary documentation on register bank usage within the kernel. Signed-off-by: Paul Mundt --- include/asm-sh/system.h | 17 ++++++++++++++++- include/asm-sh/thread_info.h | 17 +++++++++++++++-- 2 files changed, 31 insertions(+), 3 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 1630a5411e5f..198d17e3069a 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -136,7 +136,8 @@ extern void __xchg_called_with_bad_pointer(void); #define set_mb(var, value) do { xchg(&var, value); } while (0) /* Interrupt Control */ -static __inline__ void local_irq_enable(void) +#ifdef CONFIG_CPU_HAS_SR_RB +static inline void local_irq_enable(void) { unsigned long __dummy0, __dummy1; @@ -149,6 +150,20 @@ static __inline__ void local_irq_enable(void) : "1" (~0x000000f0) : "memory"); } +#else +static inline void local_irq_enable(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and %1, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x000000f0) + : "memory"); +} +#endif static __inline__ void local_irq_disable(void) { diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 7345350d98c0..f64dd803a014 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -48,16 +48,29 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) #define init_stack (init_thread_union.stack) +#define THREAD_SIZE (2*PAGE_SIZE) + /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { struct thread_info *ti; +#ifdef CONFIG_CPU_HAS_SR_RB __asm__("stc r7_bank, %0" : "=r" (ti)); +#else + unsigned long __dummy; + + __asm__ __volatile__ ( + "mov r15, %0\n\t" + "and %1, %0\n\t" + : "=&r" (ti), "=r" (__dummy) + : "1" (~(THREAD_SIZE - 1)) + : "memory"); +#endif + return ti; } /* thread information allocation */ -#define THREAD_SIZE (2*PAGE_SIZE) #define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) #define free_thread_info(ti) free_pages((unsigned long) (ti), 1) @@ -65,7 +78,7 @@ static inline struct thread_info *current_thread_info(void) /* how to get the thread information struct from ASM */ #define GET_THREAD_INFO(reg) \ - stc r7_bank, reg + stc r7_bank, reg #endif -- cgit v1.2.1 From 00b3aa3fc9bd827caaa859de90d9eba831b77d40 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:05:56 +0900 Subject: sh: xchg()/__xchg() always_inline fixes for gcc4. Make __xchg() a macro, so that gcc 4.0 doesn't blow up thanks to always_inline.. Signed-off-by: Paul Mundt --- include/asm-sh/system.h | 57 +++++++++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 25 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 198d17e3069a..bd7dc0554b11 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -79,10 +79,8 @@ static inline void sched_cacheflush(void) } #endif -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - static __inline__ unsigned long tas(volatile int *m) -{ /* #define tas(ptr) (xchg((ptr),1)) */ +{ unsigned long retval; __asm__ __volatile__ ("tas.b @%1\n\t" @@ -91,8 +89,6 @@ static __inline__ unsigned long tas(volatile int *m) return retval; } -extern void __xchg_called_with_bad_pointer(void); - /* * A brief note on ctrl_barrier(), the control register write barrier. * @@ -220,17 +216,17 @@ static __inline__ void local_irq_restore(unsigned long x) } } #else -#define local_irq_restore(x) do { \ +#define local_irq_restore(x) do { \ if ((x & 0x000000f0) != 0x000000f0) \ - local_irq_enable(); \ + local_irq_enable(); \ } while (0) #endif -#define really_restore_flags(x) do { \ +#define really_restore_flags(x) do { \ if ((x & 0x000000f0) != 0x000000f0) \ - local_irq_enable(); \ + local_irq_enable(); \ else \ - local_irq_disable(); \ + local_irq_disable(); \ } while (0) /* @@ -272,7 +268,7 @@ do { \ /* For spinlocks etc */ #define local_irq_save(x) x = local_irq_save() -static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) +static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) { unsigned long flags, retval; @@ -283,7 +279,7 @@ static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) return retval; } -static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned long val) +static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) { unsigned long flags, retval; @@ -294,19 +290,30 @@ static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned lon return retval; } -static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size) -{ - switch (size) { - case 4: - return xchg_u32(ptr, x); - break; - case 1: - return xchg_u8(ptr, x); - break; - } - __xchg_called_with_bad_pointer(); - return x; -} +extern void __xchg_called_with_bad_pointer(void); + +#define __xchg(ptr, x, size) \ +({ \ + unsigned long __xchg__res; \ + volatile void *__xchg_ptr = (ptr); \ + switch (size) { \ + case 4: \ + __xchg__res = xchg_u32(__xchg_ptr, x); \ + break; \ + case 1: \ + __xchg__res = xchg_u8(__xchg_ptr, x); \ + break; \ + default: \ + __xchg_called_with_bad_pointer(); \ + __xchg__res = x; \ + break; \ + } \ + \ + __xchg__res; \ +}) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, unsigned long new) -- cgit v1.2.1 From ef48e8e3498605351f91f195cc9af0ef981b0dde Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:17:17 +0900 Subject: sh: Free up some and document PTEL flags. Drop _PAGE_SHARED/_PAGE_U0_SHARED and document Linux PTE encodings in the PTEL value. Preserve the swap cache entry encoding semantics for now, though it will need rework to free up _PAGE_WT from _PAGE_FILE. Signed-off-by: Paul Mundt --- include/asm-sh/pgtable.h | 76 ++++++++++++++++++++++++++++-------------------- 1 file changed, 45 insertions(+), 31 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 9728b58f7c13..41c559d8ba87 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -54,20 +54,41 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define VMALLOC_START (P3SEG+0x00100000) #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) -#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ -#define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */ -#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ -#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ -#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ -#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ -#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */ -#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ -#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ -#define _PAGE_PROTNONE 0x200 /* software: if not present */ -#define _PAGE_ACCESSED 0x400 /* software: page referenced */ -#define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */ - -#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ +/* + * Linux PTEL encoding. + * + * Hardware and software bit definitions for the PTEL value: + * + * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). + * + * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the + * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, + * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). + * + * In order to keep this relatively clean, do not use these for defining + * SH-3 specific flags until all of the other unused bits have been + * exhausted. + * + * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. + * + * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. + * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. + * + * - Bits 31, 30, and 29 remain unused by everyone and can be used for future + * software flags, although care must be taken to update _PAGE_CLEAR_FLAGS. + */ +#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ +#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ +#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ +#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ +#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ +#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ +#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */ +#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ +#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ +#define _PAGE_PROTNONE 0x200 /* software: if not present */ +#define _PAGE_ACCESSED 0x400 /* software: page referenced */ +#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ /* software: moves to PTEA.TC (Timing Control) */ #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ @@ -82,22 +103,17 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ -/* Mask which drop software flags - * We also drop WT bit since it is used for _PAGE_FILE - * bit in this implementation. - */ -#define _PAGE_CLEAR_FLAGS (_PAGE_WT | _PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_U0_SHARED) - -#if defined(CONFIG_CPU_SH3) -/* - * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1. - * Work around: Just drop SH-bit. - */ -#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS | _PAGE_HW_SHARED)) +/* Mask which drops unused bits from the PTEL value */ +#ifdef CONFIG_CPU_SH3 +#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ + _PAGE_FILE | _PAGE_SZ1 | \ + _PAGE_HW_SHARED) #else -#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) +#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) #endif +#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) + /* Hardware flags: SZ0=1 (4k-byte) */ #define _PAGE_FLAGS_HARD _PAGE_SZ0 @@ -107,17 +123,15 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; #define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) #endif -#define _PAGE_SHARED _PAGE_U0_SHARED - #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY) #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED) +#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) #ifndef __ASSEMBLY__ #ifdef CONFIG_MMU #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD) +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) -- cgit v1.2.1 From 3aa770e7972723f479122cf66b529017d2175289 Mon Sep 17 00:00:00 2001 From: Andriy Skulysh Date: Wed, 27 Sep 2006 16:20:22 +0900 Subject: sh: APM/PM support. This adds some simple PM stubs and the basic APM interfaces, primarily for use by hp6xx, where the existing userland expects it. Signed-off-by: Andriy Skulysh Signed-off-by: Paul Mundt --- include/asm-sh/apm.h | 46 +++++++++++++++++++++++++++++++++++++ include/asm-sh/cpu-sh3/freq.h | 4 ++++ include/asm-sh/hd64461.h | 7 +++++- include/asm-sh/hp6xx/hp6xx.h | 53 +++++++++++++++++++++++++++++++++++++++++-- include/asm-sh/pm.h | 17 ++++++++++++++ include/asm-sh/system.h | 25 ++++++++++++++++++++ include/asm-sh/timer.h | 2 ++ 7 files changed, 151 insertions(+), 3 deletions(-) create mode 100644 include/asm-sh/apm.h create mode 100644 include/asm-sh/pm.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/apm.h b/include/asm-sh/apm.h new file mode 100644 index 000000000000..8b091e93651f --- /dev/null +++ b/include/asm-sh/apm.h @@ -0,0 +1,46 @@ +/* + * Copyright 2006 (c) Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ + +#ifndef __ASM_SH_APM_H +#define __ASM_SH_APM_H + +#define APM_AC_OFFLINE 0 +#define APM_AC_ONLINE 1 +#define APM_AC_BACKUP 2 +#define APM_AC_UNKNOWN 0xff + +#define APM_BATTERY_STATUS_HIGH 0 +#define APM_BATTERY_STATUS_LOW 1 +#define APM_BATTERY_STATUS_CRITICAL 2 +#define APM_BATTERY_STATUS_CHARGING 3 +#define APM_BATTERY_STATUS_NOT_PRESENT 4 +#define APM_BATTERY_STATUS_UNKNOWN 0xff + +#define APM_BATTERY_LIFE_UNKNOWN 0xFFFF +#define APM_BATTERY_LIFE_MINUTES 0x8000 +#define APM_BATTERY_LIFE_VALUE_MASK 0x7FFF + +#define APM_BATTERY_FLAG_HIGH (1 << 0) +#define APM_BATTERY_FLAG_LOW (1 << 1) +#define APM_BATTERY_FLAG_CRITICAL (1 << 2) +#define APM_BATTERY_FLAG_CHARGING (1 << 3) +#define APM_BATTERY_FLAG_NOT_PRESENT (1 << 7) +#define APM_BATTERY_FLAG_UNKNOWN 0xff + +#define APM_UNITS_MINS 0 +#define APM_UNITS_SECS 1 +#define APM_UNITS_UNKNOWN -1 + + +extern int (*apm_get_info)(char *buf, char **start, off_t fpos, int length); +extern int apm_suspended; + +void apm_queue_event(apm_event_t event); + +#endif diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h index b61b6e331df0..273f3229785c 100644 --- a/include/asm-sh/cpu-sh3/freq.h +++ b/include/asm-sh/cpu-sh3/freq.h @@ -18,5 +18,9 @@ #define MIN_DIVISOR_NR 0 #define MAX_DIVISOR_NR 4 +#define FRQCR_CKOEN 0x0100 +#define FRQCR_PLLEN 0x0080 +#define FRQCR_PSTBY 0x0040 + #endif /* __ASM_CPU_SH3_FREQ_H */ diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h index 0f2e2132cc35..27e5c34e2659 100644 --- a/include/asm-sh/hd64461.h +++ b/include/asm-sh/hd64461.h @@ -40,7 +40,12 @@ #define HD64461_LCDCBAR 0x11000 #define HD64461_LCDCLOR 0x11002 #define HD64461_LCDCCR 0x11004 -#define HD64461_LCDCCR_MOFF 0x80 +#define HD64461_LCDCCR_STBACK 0x0400 +#define HD64461_LCDCCR_STREQ 0x0100 +#define HD64461_LCDCCR_MOFF 0x0080 +#define HD64461_LCDCCR_REFSEL 0x0040 +#define HD64461_LCDCCR_EPON 0x0020 +#define HD64461_LCDCCR_SPON 0x0010 #define HD64461_LDR1 0x11010 #define HD64461_LDR1_DON 0x01 diff --git a/include/asm-sh/hp6xx/hp6xx.h b/include/asm-sh/hp6xx/hp6xx.h index a26247fd3d87..f35134c159dd 100644 --- a/include/asm-sh/hp6xx/hp6xx.h +++ b/include/asm-sh/hp6xx/hp6xx.h @@ -2,16 +2,33 @@ #define __ASM_SH_HP6XX_H /* - * Copyright (C) 2003 Andriy Skulysh + * Copyright (C) 2003, 2004, 2005 Andriy Skulysh + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * */ -#define HP680_TS_IRQ IRQ3_IRQ +#define HP680_BTN_IRQ IRQ0_IRQ +#define HP680_TS_IRQ IRQ3_IRQ +#define HP680_HD64461_IRQ IRQ4_IRQ #define DAC_LCD_BRIGHTNESS 0 #define DAC_SPEAKER_VOLUME 1 +#define PGDR_OPENED 0x01 +#define PGDR_MAIN_BATTERY_OUT 0x04 +#define PGDR_PLAY_BUTTON 0x08 +#define PGDR_REWIND_BUTTON 0x10 +#define PGDR_RECORD_BUTTON 0x20 + #define PHDR_TS_PEN_DOWN 0x08 +#define PJDR_LED_BLINK 0x02 + +#define PKDR_LED_GREEN 0x10 + #define SCPDR_TS_SCAN_ENABLE 0x20 #define SCPDR_TS_SCAN_Y 0x02 #define SCPDR_TS_SCAN_X 0x01 @@ -21,11 +38,43 @@ #define ADC_CHANNEL_TS_Y 1 #define ADC_CHANNEL_TS_X 2 +#define ADC_CHANNEL_BATTERY 3 +#define ADC_CHANNEL_BACKUP 4 +#define ADC_CHANNEL_CHARGE 5 #define HD64461_GPADR_SPEAKER 0x01 #define HD64461_GPADR_PCMCIA0 (0x02|0x08) + #define HD64461_GPBDR_LCDOFF 0x01 +#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78 #define HD64461_GPBDR_LED_RED 0x80 +#include +#include + +#define PJDR 0xa4000130 +#define PKDR 0xa4000132 + +static inline void hp6xx_led_red(int on) +{ + u16 v16; + v16 = ctrl_inw(CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); + if (on) + ctrl_outw(v16 & (~HD64461_GPBDR_LED_RED), CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); + else + ctrl_outw(v16 | HD64461_GPBDR_LED_RED, CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000); +} + +static inline void hp6xx_led_green(int on) +{ + u8 v8; + + v8 = ctrl_inb(PKDR); + if (on) + ctrl_outb(v8 & (~PKDR_LED_GREEN), PKDR); + else + ctrl_outb(v8 | PKDR_LED_GREEN, PKDR); +} + #endif /* __ASM_SH_HP6XX_H */ diff --git a/include/asm-sh/pm.h b/include/asm-sh/pm.h new file mode 100644 index 000000000000..56fdbd6b1c94 --- /dev/null +++ b/include/asm-sh/pm.h @@ -0,0 +1,17 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright 2006 (c) Andriy Skulysh + * + */ +#ifndef __ASM_SH_PM_H +#define __ASM_SH_PM_H + +extern u8 wakeup_start; +extern u8 wakeup_end; + +void pm_enter(void); + +#endif diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index bd7dc0554b11..477422afeb0d 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -172,6 +172,31 @@ static __inline__ void local_irq_disable(void) : "memory"); } +static __inline__ void set_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ("stc sr, %0\n\t" + "or %2, %0\n\t" + "and %3, %0\n\t" + "ldc %0, sr" + : "=&r" (__dummy0), "=r" (__dummy1) + : "r" (0x10000000), "r" (0xffffff0f) + : "memory"); +} + +static __inline__ void clear_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ("stc sr, %0\n\t" + "and %2, %0\n\t" + "ldc %0, sr" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x10000000) + : "memory"); +} + #define local_save_flags(x) \ __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" ) diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h index dd6579c0b04c..c7ab28095ba0 100644 --- a/include/asm-sh/timer.h +++ b/include/asm-sh/timer.h @@ -6,6 +6,8 @@ struct sys_timer_ops { int (*init)(void); + int (*start)(void); + int (*stop)(void); unsigned long (*get_offset)(void); unsigned long (*get_frequency)(void); }; -- cgit v1.2.1 From 56e8d7b5786dc2f7d1f701500f8914fd2c52b111 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:24:55 +0900 Subject: sh: kgdb stub cleanups. Some kgdb cleanup. Move hexchars/highhex/lowhex to the header, so it can be reused by sh-sci. Also drop silly ctrl_inl/outl() overloading being done by the kgdb stub. Signed-off-by: Paul Mundt --- include/asm-sh/kgdb.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h index 1653ffb75fbe..7b26f53fe343 100644 --- a/include/asm-sh/kgdb.h +++ b/include/asm-sh/kgdb.h @@ -128,4 +128,19 @@ extern int setjmp(jmp_buf __jmpb); #define KGDB_ASSERT(condition, message) #endif +/* Taken from sh-stub.c of GDB 4.18 */ +static const char hexchars[] = "0123456789abcdef"; + +/* Get high hex bits */ +static inline char highhex(const int x) +{ + return hexchars[(x >> 4) & 0xf]; +} + +/* Get low hex bits */ +static inline char lowhex(const int x) +{ + return hexchars[x & 0xf]; +} + #endif -- cgit v1.2.1 From 959f85f8a3223c116bbe95dd8a9b207790b5d4d3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 16:43:28 +0900 Subject: sh: Consolidated SH7751/SH7780 PCI support. This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt --- include/asm-sh/io.h | 5 +++++ include/asm-sh/pci.h | 35 ++++++++++++++++++++++++++++++++--- 2 files changed, 37 insertions(+), 3 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 894e64b2d5f0..27dba653cbe7 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -209,6 +209,11 @@ static inline void ctrl_outl(unsigned int b, unsigned long addr) *(volatile unsigned long*)addr = b; } +static inline void ctrl_delay(void) +{ + ctrl_inw(P2SEG); +} + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 18a109de0f2e..6ccc948fe216 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -32,6 +32,34 @@ extern struct pci_channel board_pci_channels[]; #define PCIBIOS_MIN_IO board_pci_channels->io_resource->start #define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start +/* + * I/O routine helpers + */ +#ifdef CONFIG_CPU_SUBTYPE_SH7780 +#define PCI_IO_AREA 0xFE400000 +#define PCI_IO_SIZE 0x00400000 +#else +#define PCI_IO_AREA 0xFE240000 +#define PCI_IO_SIZE 0X00040000 +#endif + +#define PCI_MEM_SIZE 0x01000000 + +#define SH4_PCIIOBR_MASK 0xFFFC0000 +#define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK)) + +#if defined(CONFIG_PCI) +#define is_pci_ioaddr(port) \ + (((port) >= PCIBIOS_MIN_IO) && \ + ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE))) +#define is_pci_memaddr(port) \ + (((port) >= PCIBIOS_MIN_MEM) && \ + ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE))) +#else +#define is_pci_ioaddr(port) (0) +#define is_pci_memaddr(port) (0) +#endif + struct pci_dev; extern void pcibios_set_master(struct pci_dev *dev); @@ -98,11 +126,12 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, #endif /* Board-specific fixup routines. */ -extern void pcibios_fixup(void); -extern void pcibios_fixup_irqs(void); +void pcibios_fixup(void); +int pcibios_init_platform(void); +int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); #ifdef CONFIG_PCI_AUTO -extern int pciauto_assign_resources(int busno, struct pci_channel *hose); +int pciauto_assign_resources(int busno, struct pci_channel *hose); #endif static inline void pcibios_add_platform_entries(struct pci_dev *dev) -- cgit v1.2.1 From 0f08f338083cc1d68788ccbccc44bd0502fc57ae Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:03:56 +0900 Subject: sh: More cosmetic cleanups and trivial fixes. Nothing exciting here, just trivial fixes.. Signed-off-by: Paul Mundt --- include/asm-sh/dma.h | 1 + include/asm-sh/irq.h | 5 +++++ include/asm-sh/kexec.h | 2 ++ include/asm-sh/system.h | 36 +++++------------------------------- 4 files changed, 13 insertions(+), 31 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index e62a6d0ed932..d9daa028689f 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -89,6 +89,7 @@ struct dma_channel { wait_queue_head_t wait_queue; struct sys_device dev; + char *name; }; struct dma_info { diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 7e8455b1cb44..648102e9236f 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -334,6 +334,11 @@ extern void enable_irq(unsigned int); extern void make_maskreg_irq(unsigned int irq); extern unsigned short *irq_mask_register; +/* + * PINT IRQs + */ +void init_IRQ_pint(void); + /* * Function for "on chip support modules". */ diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h index 9dfe59f6fcb5..a5f85e9e428d 100644 --- a/include/asm-sh/kexec.h +++ b/include/asm-sh/kexec.h @@ -23,6 +23,8 @@ /* The native architecture */ #define KEXEC_ARCH KEXEC_ARCH_SH +#define MAX_NOTE_BYTES 1024 + #ifndef __ASSEMBLY__ extern void machine_shutdown(void); diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 477422afeb0d..6c1f8fde5ac4 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -79,7 +79,7 @@ static inline void sched_cacheflush(void) } #endif -static __inline__ unsigned long tas(volatile int *m) +static inline unsigned long tas(volatile int *m) { unsigned long retval; @@ -161,7 +161,7 @@ static inline void local_irq_enable(void) } #endif -static __inline__ void local_irq_disable(void) +static inline void local_irq_disable(void) { unsigned long __dummy; __asm__ __volatile__("stc sr, %0\n\t" @@ -172,7 +172,7 @@ static __inline__ void local_irq_disable(void) : "memory"); } -static __inline__ void set_bl_bit(void) +static inline void set_bl_bit(void) { unsigned long __dummy0, __dummy1; @@ -185,7 +185,7 @@ static __inline__ void set_bl_bit(void) : "memory"); } -static __inline__ void clear_bl_bit(void) +static inline void clear_bl_bit(void) { unsigned long __dummy0, __dummy1; @@ -207,7 +207,7 @@ static __inline__ void clear_bl_bit(void) (flags != 0); \ }) -static __inline__ unsigned long local_irq_save(void) +static inline unsigned long local_irq_save(void) { unsigned long flags, __dummy; @@ -223,36 +223,10 @@ static __inline__ unsigned long local_irq_save(void) return flags; } -#ifdef DEBUG_CLI_STI -static __inline__ void local_irq_restore(unsigned long x) -{ - if ((x & 0x000000f0) != 0x000000f0) - local_irq_enable(); - else { - unsigned long flags; - local_save_flags(flags); - - if (flags == 0) { - extern void dump_stack(void); - printk(KERN_ERR "BUG!\n"); - dump_stack(); - local_irq_disable(); - } - } -} -#else #define local_irq_restore(x) do { \ if ((x & 0x000000f0) != 0x000000f0) \ local_irq_enable(); \ } while (0) -#endif - -#define really_restore_flags(x) do { \ - if ((x & 0x000000f0) != 0x000000f0) \ - local_irq_enable(); \ - else \ - local_irq_disable(); \ -} while (0) /* * Jump to P2 area. -- cgit v1.2.1 From 2991be725260d6fec11691a6138b9d71de949956 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:07:07 +0900 Subject: sh: Fixup __strnlen_user() behaviour. Drop TIF_USERSPACE and add addr_limit to the thread_info struct. Subsequently, use that for address checking in strnlen_user() to ward off bogus -EFAULTs. Make __strnlen_user() return 0 on exception, rather than -EFAULT. Signed-off-by: Paul Mundt --- include/asm-sh/processor.h | 4 +++ include/asm-sh/thread_info.h | 4 +-- include/asm-sh/uaccess.h | 65 +++++++++----------------------------------- 3 files changed, 19 insertions(+), 54 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index e99aff706cf7..a22732007dd4 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -149,6 +149,10 @@ struct thread_struct { union sh_fpu_union fpu; }; +typedef struct { + unsigned long seg; +} mm_segment_t; + /* Count of active tasks with UBC settings */ extern int ubc_usercnt; diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index f64dd803a014..b986a1914472 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -21,6 +21,7 @@ struct thread_info { unsigned long flags; /* low level flags */ __u32 cpu; int preempt_count; /* 0 => preemptable, <0 => BUG */ + mm_segment_t addr_limit; /* thread address space */ struct restart_block restart_block; __u8 supervisor_stack[0]; }; @@ -40,6 +41,7 @@ struct thread_info { .flags = 0, \ .cpu = 0, \ .preempt_count = 1, \ + .addr_limit = KERNEL_DS, \ .restart_block = { \ .fn = do_no_restart_syscall, \ }, \ @@ -95,7 +97,6 @@ static inline struct thread_info *current_thread_info(void) #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 -#define TIF_USERSPACE 31 /* true if FS sets userspace */ #define _TIF_SYSCALL_TRACE (1< #include -/* - * NOTE: Macro/functions in this file depends on threads_info.h implementation. - * Assumes: - * TI_FLAGS == 8 - * TIF_USERSPACE == 31 - * USER_ADDR_LIMIT == 0x80000000 - */ - #define VERIFY_READ 0 #define VERIFY_WRITE 1 -typedef struct { - unsigned int is_user_space; -} mm_segment_t; - /* * The fs value determines whether argument validity checking should be * performed or not. If get_fs() == USER_DS, checking is performed, with @@ -40,12 +28,14 @@ typedef struct { */ #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space) -#define USER_ADDR_LIMIT 0x80000000 +#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) +#define USER_DS MAKE_MM_SEG(PAGE_OFFSET) + +#define segment_eq(a,b) ((a).seg == (b).seg) -#define KERNEL_DS MAKE_MM_SEG(0) -#define USER_DS MAKE_MM_SEG(1) +#define __addr_ok(addr) \ + ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) #define get_ds() (KERNEL_DS) @@ -76,31 +66,8 @@ static inline int __access_ok(unsigned long addr, unsigned long size) return ((addr >= memory_start) && ((addr + size) < memory_end)); } #else /* CONFIG_MMU */ -static inline mm_segment_t get_fs(void) -{ - return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE)); -} - -static inline void set_fs(mm_segment_t s) -{ - unsigned long ti, flag; - __asm__ __volatile__( - "stc r7_bank, %0\n\t" - "mov.l @(8,%0), %1\n\t" - "shal %1\n\t" - "cmp/pl %2\n\t" - "rotcr %1\n\t" - "mov.l %1, @(8,%0)" - : "=&r" (ti), "=&r" (flag) - : "r" (s.is_user_space) - : "t"); -/**** - if (s.is_user_space) - set_thread_flag(TIF_USERSPACE); - else - clear_thread_flag(TIF_USERSPACE); -****/ -} +#define get_fs() (current_thread_info()->addr_limit) +#define set_fs(x) (current_thread_info()->addr_limit = (x)) /* * __access_ok: Check if address with size is OK or not. @@ -108,7 +75,7 @@ static inline void set_fs(mm_segment_t s) * We do three checks: * (1) is it user space? * (2) addr + size --> carry? - * (3) addr + size >= 0x80000000 (USER_ADDR_LIMIT) + * (3) addr + size >= 0x80000000 (PAGE_OFFSET) * * (1) (2) (3) | RESULT * 0 0 0 | ok @@ -541,7 +508,7 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n) "3:\n\t" "mov.l 4f, %1\n\t" "jmp @%1\n\t" - " mov %5, %0\n" + " mov #0, %0\n" ".balign 4\n" "4: .long 2b\n" ".previous\n" @@ -550,26 +517,20 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n) " .long 1b,3b\n" ".previous" : "=z" (res), "=&r" (__dummy) - : "0" (0), "r" (__s), "r" (__n), "i" (-EFAULT) + : "0" (0), "r" (__s), "r" (__n) : "t"); return res; } static __inline__ long strnlen_user(const char __user *s, long n) { - if (!access_ok(VERIFY_READ, s, n)) + if (!__addr_ok(s)) return 0; else return __strnlen_user(s, n); } -static __inline__ long strlen_user(const char __user *s) -{ - if (!access_ok(VERIFY_READ, s, 0)) - return 0; - else - return __strnlen_user(s, ~0UL >> 1); -} +#define strlen_user(str) strnlen_user(str, ~0UL >> 1) /* * The exception table consists of pairs of addresses: the first is the -- cgit v1.2.1 From af514ca7d27b31e3c278e1331f0ebdb3ad385a90 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:11:32 +0900 Subject: sh: Rename rtc_get/set_time() to avoid RTC_CLASS conflict. We have a clash with RTC_CLASS over these names, so we change them.. Signed-off-by: Paul Mundt --- include/asm-sh/rtc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h index cea9cdf9b925..4c7be859c9c0 100644 --- a/include/asm-sh/rtc.h +++ b/include/asm-sh/rtc.h @@ -8,8 +8,8 @@ extern void sh_rtc_gettimeofday(struct timespec *ts); extern int sh_rtc_settimeofday(const time_t secs); extern void (*board_time_init)(void); -extern void (*rtc_get_time)(struct timespec *); -extern int (*rtc_set_time)(const time_t); +extern void (*rtc_sh_get_time)(struct timespec *); +extern int (*rtc_sh_set_time)(const time_t); /* RCR1 Bits */ #define RCR1_CF 0x80 /* Carry Flag */ -- cgit v1.2.1 From 4b565680d16300acab0ff167e24f0ea289a6bd5d Mon Sep 17 00:00:00 2001 From: Takashi YOSHII Date: Wed, 27 Sep 2006 17:15:32 +0900 Subject: sh: math-emu support This implements initial math-emu support, aimed primarily at SH-3. Signed-off-by: Takashi YOSHII Signed-off-by: Paul Mundt --- include/asm-sh/sfp-machine.h | 86 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 include/asm-sh/sfp-machine.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/sfp-machine.h b/include/asm-sh/sfp-machine.h new file mode 100644 index 000000000000..8a6399a8cfe0 --- /dev/null +++ b/include/asm-sh/sfp-machine.h @@ -0,0 +1,86 @@ +/* Machine-dependent software floating-point definitions. + SuperH kernel version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz), + David S. Miller (davem@redhat.com) and + Peter Maydell (pmaydell@chiark.greenend.org.uk). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + +#include + +#define _FP_W_TYPE_SIZE 32 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* + * If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + else \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +//#define FP_ROUNDMODE FPSCR_RM +#define FP_DENORM_ZERO 1/*FPSCR_DN*/ + +/* Exception flags. */ +#define FP_EX_INVALID (1<<4) +#define FP_EX_DIVZERO (1<<3) +#define FP_EX_OVERFLOW (1<<2) +#define FP_EX_UNDERFLOW (1<<1) +#define FP_EX_INEXACT (1<<0) + +#endif + -- cgit v1.2.1 From adf1890b0cd63f754b2171b73e4d845c0950d407 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:17:27 +0900 Subject: sh: Move voyagergx_reg.h to a more sensible place. Other boards require this as well, so move it out of the rts7751r2d directory. Signed-off-by: Paul Mundt --- include/asm-sh/rts7751r2d/voyagergx_reg.h | 313 ------------------------------ include/asm-sh/voyagergx.h | 313 ++++++++++++++++++++++++++++++ 2 files changed, 313 insertions(+), 313 deletions(-) delete mode 100644 include/asm-sh/rts7751r2d/voyagergx_reg.h create mode 100644 include/asm-sh/voyagergx.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/rts7751r2d/voyagergx_reg.h b/include/asm-sh/rts7751r2d/voyagergx_reg.h deleted file mode 100644 index f031b5d6cf54..000000000000 --- a/include/asm-sh/rts7751r2d/voyagergx_reg.h +++ /dev/null @@ -1,313 +0,0 @@ -/* -------------------------------------------------------------------- */ -/* voyagergx_reg.h */ -/* -------------------------------------------------------------------- */ -/* This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - Copyright 2003 (c) Lineo uSolutions,Inc. -*/ -/* -------------------------------------------------------------------- */ - -#ifndef _VOYAGER_GX_REG_H -#define _VOYAGER_GX_REG_H - -#define VOYAGER_BASE 0xb3e00000 -#define VOYAGER_USBH_BASE (0x40000 + VOYAGER_BASE) -#define VOYAGER_UART_BASE (0x30000 + VOYAGER_BASE) -#define VOYAGER_AC97_BASE (0xa0000 + VOYAGER_BASE) - -#define VOYAGER_IRQ_NUM 32 -#define VOYAGER_IRQ_BASE 50 -#define VOYAGER_USBH_IRQ VOYAGER_IRQ_BASE + 6 -#define VOYAGER_8051_IRQ VOYAGER_IRQ_BASE + 10 -#define VOYAGER_UART0_IRQ VOYAGER_IRQ_BASE + 12 -#define VOYAGER_UART1_IRQ VOYAGER_IRQ_BASE + 13 -#define VOYAGER_AC97_IRQ VOYAGER_IRQ_BASE + 17 - -/* ----- MISC controle register ------------------------------ */ -#define MISC_CTRL (0x000004 + VOYAGER_BASE) -#define MISC_CTRL_USBCLK_48 (3 << 28) -#define MISC_CTRL_USBCLK_96 (2 << 28) -#define MISC_CTRL_USBCLK_CRYSTAL (1 << 28) - -/* ----- GPIO[31:0] register --------------------------------- */ -#define GPIO_MUX_LOW (0x000008 + VOYAGER_BASE) -#define GPIO_MUX_LOW_AC97 0x1F000000 -#define GPIO_MUX_LOW_8051 0x0000ffff -#define GPIO_MUX_LOW_PWM (1 << 29) - -/* ----- GPIO[63:32] register --------------------------------- */ -#define GPIO_MUX_HIGH (0x00000C + VOYAGER_BASE) - -/* ----- DRAM controle register ------------------------------- */ -#define DRAM_CTRL (0x000010 + VOYAGER_BASE) -#define DRAM_CTRL_EMBEDDED (1 << 31) -#define DRAM_CTRL_CPU_BURST_1 (0 << 28) -#define DRAM_CTRL_CPU_BURST_2 (1 << 28) -#define DRAM_CTRL_CPU_BURST_4 (2 << 28) -#define DRAM_CTRL_CPU_BURST_8 (3 << 28) -#define DRAM_CTRL_CPU_CAS_LATENCY (1 << 27) -#define DRAM_CTRL_CPU_SIZE_2 (0 << 24) -#define DRAM_CTRL_CPU_SIZE_4 (1 << 24) -#define DRAM_CTRL_CPU_SIZE_64 (4 << 24) -#define DRAM_CTRL_CPU_SIZE_32 (5 << 24) -#define DRAM_CTRL_CPU_SIZE_16 (6 << 24) -#define DRAM_CTRL_CPU_SIZE_8 (7 << 24) -#define DRAM_CTRL_CPU_COLUMN_SIZE_1024 (0 << 22) -#define DRAM_CTRL_CPU_COLUMN_SIZE_512 (2 << 22) -#define DRAM_CTRL_CPU_COLUMN_SIZE_256 (3 << 22) -#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE (1 << 21) -#define DRAM_CTRL_CPU_RESET (1 << 20) -#define DRAM_CTRL_CPU_BANKS (1 << 19) -#define DRAM_CTRL_CPU_WRITE_PRECHARGE (1 << 18) -#define DRAM_CTRL_BLOCK_WRITE (1 << 17) -#define DRAM_CTRL_REFRESH_COMMAND (1 << 16) -#define DRAM_CTRL_SIZE_4 (0 << 13) -#define DRAM_CTRL_SIZE_8 (1 << 13) -#define DRAM_CTRL_SIZE_16 (2 << 13) -#define DRAM_CTRL_SIZE_32 (3 << 13) -#define DRAM_CTRL_SIZE_64 (4 << 13) -#define DRAM_CTRL_SIZE_2 (5 << 13) -#define DRAM_CTRL_COLUMN_SIZE_256 (0 << 11) -#define DRAM_CTRL_COLUMN_SIZE_512 (2 << 11) -#define DRAM_CTRL_COLUMN_SIZE_1024 (3 << 11) -#define DRAM_CTRL_BLOCK_WRITE_TIME (1 << 10) -#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE (1 << 9) -#define DRAM_CTRL_ACTIVE_PRECHARGE (1 << 8) -#define DRAM_CTRL_RESET (1 << 7) -#define DRAM_CTRL_REMAIN_ACTIVE (1 << 6) -#define DRAM_CTRL_BANKS (1 << 1) -#define DRAM_CTRL_WRITE_PRECHARGE (1 << 0) - -/* ----- Arvitration control register -------------------------- */ -#define ARBITRATION_CTRL (0x000014 + VOYAGER_BASE) -#define ARBITRATION_CTRL_CPUMEM (1 << 29) -#define ARBITRATION_CTRL_INTMEM (1 << 28) -#define ARBITRATION_CTRL_USB_OFF (0 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_1 (1 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_2 (2 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_3 (3 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_4 (4 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_5 (5 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_6 (6 << 24) -#define ARBITRATION_CTRL_USB_PRIORITY_7 (7 << 24) -#define ARBITRATION_CTRL_PANEL_OFF (0 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_1 (1 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_2 (2 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_3 (3 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_4 (4 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_5 (5 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_6 (6 << 20) -#define ARBITRATION_CTRL_PANEL_PRIORITY_7 (7 << 20) -#define ARBITRATION_CTRL_ZVPORT_OFF (0 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1 (1 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2 (2 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3 (3 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4 (4 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5 (5 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6 (6 << 16) -#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7 (7 << 16) -#define ARBITRATION_CTRL_CMD_INTPR_OFF (0 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1 (1 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2 (2 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3 (3 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4 (4 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5 (5 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6 (6 << 12) -#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7 (7 << 12) -#define ARBITRATION_CTRL_DMA_OFF (0 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_1 (1 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_2 (2 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_3 (3 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_4 (4 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_5 (5 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_6 (6 << 8) -#define ARBITRATION_CTRL_DMA_PRIORITY_7 (7 << 8) -#define ARBITRATION_CTRL_VIDEO_OFF (0 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_1 (1 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_2 (2 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_3 (3 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_4 (4 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_5 (5 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_6 (6 << 4) -#define ARBITRATION_CTRL_VIDEO_PRIORITY_7 (7 << 4) -#define ARBITRATION_CTRL_CRT_OFF (0 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_1 (1 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_2 (2 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_3 (3 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_4 (4 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_5 (5 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_6 (6 << 0) -#define ARBITRATION_CTRL_CRT_PRIORITY_7 (7 << 0) - -/* ----- Command list status register -------------------------- */ -#define CMD_INTPR_STATUS (0x000024 + VOYAGER_BASE) - -/* ----- Interrupt status register ----------------------------- */ -#define INT_STATUS (0x00002c + VOYAGER_BASE) -#define INT_STATUS_UH (1 << 6) -#define INT_STATUS_MC (1 << 10) -#define INT_STATUS_U0 (1 << 12) -#define INT_STATUS_U1 (1 << 13) -#define INT_STATUS_AC (1 << 17) - -/* ----- Interrupt mask register ------------------------------ */ -#define VOYAGER_INT_MASK (0x000030 + VOYAGER_BASE) -#define VOYAGER_INT_MASK_AC (1 << 17) - -/* ----- Current Gate register ---------------------------------*/ -#define CURRENT_GATE (0x000038 + VOYAGER_BASE) - -/* ----- Power mode 0 gate register --------------------------- */ -#define POWER_MODE0_GATE (0x000040 + VOYAGER_BASE) -#define POWER_MODE0_GATE_G (1 << 6) -#define POWER_MODE0_GATE_U0 (1 << 7) -#define POWER_MODE0_GATE_U1 (1 << 8) -#define POWER_MODE0_GATE_UH (1 << 11) -#define POWER_MODE0_GATE_AC (1 << 18) - -/* ----- Power mode 1 gate register --------------------------- */ -#define POWER_MODE1_GATE (0x000048 + VOYAGER_BASE) -#define POWER_MODE1_GATE_G (1 << 6) -#define POWER_MODE1_GATE_U0 (1 << 7) -#define POWER_MODE1_GATE_U1 (1 << 8) -#define POWER_MODE1_GATE_UH (1 << 11) -#define POWER_MODE1_GATE_AC (1 << 18) - -/* ----- Power mode 0 clock register -------------------------- */ -#define POWER_MODE0_CLOCK (0x000044 + VOYAGER_BASE) - -/* ----- Power mode 1 clock register -------------------------- */ -#define POWER_MODE1_CLOCK (0x00004C + VOYAGER_BASE) - -/* ----- Power mode controll register ------------------------- */ -#define POWER_MODE_CTRL (0x000054 + VOYAGER_BASE) - -/* ----- Miscellaneous Timing register ------------------------ */ -#define SYSTEM_DRAM_CTRL (0x000068 + VOYAGER_BASE) - -/* ----- PWM register ------------------------------------------*/ -#define PWM_0 (0x010020 + VOYAGER_BASE) -#define PWM_0_HC(x) (((x)&0x0fff)<<20) -#define PWM_0_LC(x) (((x)&0x0fff)<<8 ) -#define PWM_0_CLK_DEV(x) (((x)&0x000f)<<4 ) -#define PWM_0_EN (1<<0) - -/* ----- I2C register ----------------------------------------- */ -#define I2C_BYTECOUNT (0x010040 + VOYAGER_BASE) -#define I2C_CONTROL (0x010041 + VOYAGER_BASE) -#define I2C_STATUS (0x010042 + VOYAGER_BASE) -#define I2C_RESET (0x010042 + VOYAGER_BASE) -#define I2C_SADDRESS (0x010043 + VOYAGER_BASE) -#define I2C_DATA (0x010044 + VOYAGER_BASE) - -/* ----- Controle register bits ----------------------------------------- */ -#define I2C_CONTROL_E (1 << 0) -#define I2C_CONTROL_MODE (1 << 1) -#define I2C_CONTROL_STATUS (1 << 2) -#define I2C_CONTROL_INT (1 << 4) -#define I2C_CONTROL_INTACK (1 << 5) -#define I2C_CONTROL_REPEAT (1 << 6) - -/* ----- Status register bits ----------------------------------------- */ -#define I2C_STATUS_BUSY (1 << 0) -#define I2C_STATUS_ACK (1 << 1) -#define I2C_STATUS_ERROR (1 << 2) -#define I2C_STATUS_COMPLETE (1 << 3) - -/* ----- Reset register ---------------------------------------------- */ -#define I2C_RESET_ERROR (1 << 2) - -/* ----- transmission frequencies ------------------------------------- */ -#define I2C_SADDRESS_SELECT (1 << 0) - -/* ----- Display Controll register ----------------------------------------- */ -#define PANEL_DISPLAY_CTRL (0x080000 + VOYAGER_BASE) -#define PANEL_DISPLAY_CTRL_BIAS (1<<26) -#define PANEL_PAN_CTRL (0x080004 + VOYAGER_BASE) -#define PANEL_COLOR_KEY (0x080008 + VOYAGER_BASE) -#define PANEL_FB_ADDRESS (0x08000C + VOYAGER_BASE) -#define PANEL_FB_WIDTH (0x080010 + VOYAGER_BASE) -#define PANEL_WINDOW_WIDTH (0x080014 + VOYAGER_BASE) -#define PANEL_WINDOW_HEIGHT (0x080018 + VOYAGER_BASE) -#define PANEL_PLANE_TL (0x08001C + VOYAGER_BASE) -#define PANEL_PLANE_BR (0x080020 + VOYAGER_BASE) -#define PANEL_HORIZONTAL_TOTAL (0x080024 + VOYAGER_BASE) -#define PANEL_HORIZONTAL_SYNC (0x080028 + VOYAGER_BASE) -#define PANEL_VERTICAL_TOTAL (0x08002C + VOYAGER_BASE) -#define PANEL_VERTICAL_SYNC (0x080030 + VOYAGER_BASE) -#define PANEL_CURRENT_LINE (0x080034 + VOYAGER_BASE) -#define VIDEO_DISPLAY_CTRL (0x080040 + VOYAGER_BASE) -#define VIDEO_FB_0_ADDRESS (0x080044 + VOYAGER_BASE) -#define VIDEO_FB_WIDTH (0x080048 + VOYAGER_BASE) -#define VIDEO_FB_0_LAST_ADDRESS (0x08004C + VOYAGER_BASE) -#define VIDEO_PLANE_TL (0x080050 + VOYAGER_BASE) -#define VIDEO_PLANE_BR (0x080054 + VOYAGER_BASE) -#define VIDEO_SCALE (0x080058 + VOYAGER_BASE) -#define VIDEO_INITIAL_SCALE (0x08005C + VOYAGER_BASE) -#define VIDEO_YUV_CONSTANTS (0x080060 + VOYAGER_BASE) -#define VIDEO_FB_1_ADDRESS (0x080064 + VOYAGER_BASE) -#define VIDEO_FB_1_LAST_ADDRESS (0x080068 + VOYAGER_BASE) -#define VIDEO_ALPHA_DISPLAY_CTRL (0x080080 + VOYAGER_BASE) -#define VIDEO_ALPHA_FB_ADDRESS (0x080084 + VOYAGER_BASE) -#define VIDEO_ALPHA_FB_WIDTH (0x080088 + VOYAGER_BASE) -#define VIDEO_ALPHA_FB_LAST_ADDRESS (0x08008C + VOYAGER_BASE) -#define VIDEO_ALPHA_PLANE_TL (0x080090 + VOYAGER_BASE) -#define VIDEO_ALPHA_PLANE_BR (0x080094 + VOYAGER_BASE) -#define VIDEO_ALPHA_SCALE (0x080098 + VOYAGER_BASE) -#define VIDEO_ALPHA_INITIAL_SCALE (0x08009C + VOYAGER_BASE) -#define VIDEO_ALPHA_CHROMA_KEY (0x0800A0 + VOYAGER_BASE) -#define PANEL_HWC_ADDRESS (0x0800F0 + VOYAGER_BASE) -#define PANEL_HWC_LOCATION (0x0800F4 + VOYAGER_BASE) -#define PANEL_HWC_COLOR_12 (0x0800F8 + VOYAGER_BASE) -#define PANEL_HWC_COLOR_3 (0x0800FC + VOYAGER_BASE) -#define ALPHA_DISPLAY_CTRL (0x080100 + VOYAGER_BASE) -#define ALPHA_FB_ADDRESS (0x080104 + VOYAGER_BASE) -#define ALPHA_FB_WIDTH (0x080108 + VOYAGER_BASE) -#define ALPHA_PLANE_TL (0x08010C + VOYAGER_BASE) -#define ALPHA_PLANE_BR (0x080110 + VOYAGER_BASE) -#define ALPHA_CHROMA_KEY (0x080114 + VOYAGER_BASE) -#define CRT_DISPLAY_CTRL (0x080200 + VOYAGER_BASE) -#define CRT_FB_ADDRESS (0x080204 + VOYAGER_BASE) -#define CRT_FB_WIDTH (0x080208 + VOYAGER_BASE) -#define CRT_HORIZONTAL_TOTAL (0x08020C + VOYAGER_BASE) -#define CRT_HORIZONTAL_SYNC (0x080210 + VOYAGER_BASE) -#define CRT_VERTICAL_TOTAL (0x080214 + VOYAGER_BASE) -#define CRT_VERTICAL_SYNC (0x080218 + VOYAGER_BASE) -#define CRT_SIGNATURE_ANALYZER (0x08021C + VOYAGER_BASE) -#define CRT_CURRENT_LINE (0x080220 + VOYAGER_BASE) -#define CRT_MONITOR_DETECT (0x080224 + VOYAGER_BASE) -#define CRT_HWC_ADDRESS (0x080230 + VOYAGER_BASE) -#define CRT_HWC_LOCATION (0x080234 + VOYAGER_BASE) -#define CRT_HWC_COLOR_12 (0x080238 + VOYAGER_BASE) -#define CRT_HWC_COLOR_3 (0x08023C + VOYAGER_BASE) -#define CRT_PALETTE_RAM (0x080400 + VOYAGER_BASE) -#define PANEL_PALETTE_RAM (0x080800 + VOYAGER_BASE) -#define VIDEO_PALETTE_RAM (0x080C00 + VOYAGER_BASE) - -/* ----- 8051 Controle register ----------------------------------------- */ -#define VOYAGER_8051_BASE (0x000c0000 + VOYAGER_BASE) -#define VOYAGER_8051_RESET (0x000b0000 + VOYAGER_BASE) -#define VOYAGER_8051_SELECT (0x000b0004 + VOYAGER_BASE) -#define VOYAGER_8051_CPU_INT (0x000b000c + VOYAGER_BASE) - -/* ----- AC97 Controle register ----------------------------------------- */ -#define AC97_TX_SLOT0 (0x00000000 + VOYAGER_AC97_BASE) -#define AC97_CONTROL_STATUS (0x00000080 + VOYAGER_AC97_BASE) -#define AC97C_READ (1 << 19) -#define AC97C_WD_BIT (1 << 2) -#define AC97C_INDEX_MASK 0x7f -/* -------------------------------------------------------------------- */ - -#endif /* _VOYAGER_GX_REG_H */ diff --git a/include/asm-sh/voyagergx.h b/include/asm-sh/voyagergx.h new file mode 100644 index 000000000000..99b0807d1c9f --- /dev/null +++ b/include/asm-sh/voyagergx.h @@ -0,0 +1,313 @@ +/* -------------------------------------------------------------------- */ +/* voyagergx.h */ +/* -------------------------------------------------------------------- */ +/* This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + Copyright 2003 (c) Lineo uSolutions,Inc. +*/ +/* -------------------------------------------------------------------- */ + +#ifndef _VOYAGER_GX_REG_H +#define _VOYAGER_GX_REG_H + +#define VOYAGER_BASE 0xb3e00000 +#define VOYAGER_USBH_BASE (0x40000 + VOYAGER_BASE) +#define VOYAGER_UART_BASE (0x30000 + VOYAGER_BASE) +#define VOYAGER_AC97_BASE (0xa0000 + VOYAGER_BASE) + +#define VOYAGER_IRQ_NUM 32 +#define VOYAGER_IRQ_BASE 50 +#define VOYAGER_USBH_IRQ VOYAGER_IRQ_BASE + 6 +#define VOYAGER_8051_IRQ VOYAGER_IRQ_BASE + 10 +#define VOYAGER_UART0_IRQ VOYAGER_IRQ_BASE + 12 +#define VOYAGER_UART1_IRQ VOYAGER_IRQ_BASE + 13 +#define VOYAGER_AC97_IRQ VOYAGER_IRQ_BASE + 17 + +/* ----- MISC controle register ------------------------------ */ +#define MISC_CTRL (0x000004 + VOYAGER_BASE) +#define MISC_CTRL_USBCLK_48 (3 << 28) +#define MISC_CTRL_USBCLK_96 (2 << 28) +#define MISC_CTRL_USBCLK_CRYSTAL (1 << 28) + +/* ----- GPIO[31:0] register --------------------------------- */ +#define GPIO_MUX_LOW (0x000008 + VOYAGER_BASE) +#define GPIO_MUX_LOW_AC97 0x1F000000 +#define GPIO_MUX_LOW_8051 0x0000ffff +#define GPIO_MUX_LOW_PWM (1 << 29) + +/* ----- GPIO[63:32] register --------------------------------- */ +#define GPIO_MUX_HIGH (0x00000C + VOYAGER_BASE) + +/* ----- DRAM controle register ------------------------------- */ +#define DRAM_CTRL (0x000010 + VOYAGER_BASE) +#define DRAM_CTRL_EMBEDDED (1 << 31) +#define DRAM_CTRL_CPU_BURST_1 (0 << 28) +#define DRAM_CTRL_CPU_BURST_2 (1 << 28) +#define DRAM_CTRL_CPU_BURST_4 (2 << 28) +#define DRAM_CTRL_CPU_BURST_8 (3 << 28) +#define DRAM_CTRL_CPU_CAS_LATENCY (1 << 27) +#define DRAM_CTRL_CPU_SIZE_2 (0 << 24) +#define DRAM_CTRL_CPU_SIZE_4 (1 << 24) +#define DRAM_CTRL_CPU_SIZE_64 (4 << 24) +#define DRAM_CTRL_CPU_SIZE_32 (5 << 24) +#define DRAM_CTRL_CPU_SIZE_16 (6 << 24) +#define DRAM_CTRL_CPU_SIZE_8 (7 << 24) +#define DRAM_CTRL_CPU_COLUMN_SIZE_1024 (0 << 22) +#define DRAM_CTRL_CPU_COLUMN_SIZE_512 (2 << 22) +#define DRAM_CTRL_CPU_COLUMN_SIZE_256 (3 << 22) +#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE (1 << 21) +#define DRAM_CTRL_CPU_RESET (1 << 20) +#define DRAM_CTRL_CPU_BANKS (1 << 19) +#define DRAM_CTRL_CPU_WRITE_PRECHARGE (1 << 18) +#define DRAM_CTRL_BLOCK_WRITE (1 << 17) +#define DRAM_CTRL_REFRESH_COMMAND (1 << 16) +#define DRAM_CTRL_SIZE_4 (0 << 13) +#define DRAM_CTRL_SIZE_8 (1 << 13) +#define DRAM_CTRL_SIZE_16 (2 << 13) +#define DRAM_CTRL_SIZE_32 (3 << 13) +#define DRAM_CTRL_SIZE_64 (4 << 13) +#define DRAM_CTRL_SIZE_2 (5 << 13) +#define DRAM_CTRL_COLUMN_SIZE_256 (0 << 11) +#define DRAM_CTRL_COLUMN_SIZE_512 (2 << 11) +#define DRAM_CTRL_COLUMN_SIZE_1024 (3 << 11) +#define DRAM_CTRL_BLOCK_WRITE_TIME (1 << 10) +#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE (1 << 9) +#define DRAM_CTRL_ACTIVE_PRECHARGE (1 << 8) +#define DRAM_CTRL_RESET (1 << 7) +#define DRAM_CTRL_REMAIN_ACTIVE (1 << 6) +#define DRAM_CTRL_BANKS (1 << 1) +#define DRAM_CTRL_WRITE_PRECHARGE (1 << 0) + +/* ----- Arvitration control register -------------------------- */ +#define ARBITRATION_CTRL (0x000014 + VOYAGER_BASE) +#define ARBITRATION_CTRL_CPUMEM (1 << 29) +#define ARBITRATION_CTRL_INTMEM (1 << 28) +#define ARBITRATION_CTRL_USB_OFF (0 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_1 (1 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_2 (2 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_3 (3 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_4 (4 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_5 (5 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_6 (6 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_7 (7 << 24) +#define ARBITRATION_CTRL_PANEL_OFF (0 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_1 (1 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_2 (2 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_3 (3 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_4 (4 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_5 (5 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_6 (6 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_7 (7 << 20) +#define ARBITRATION_CTRL_ZVPORT_OFF (0 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1 (1 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2 (2 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3 (3 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4 (4 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5 (5 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6 (6 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7 (7 << 16) +#define ARBITRATION_CTRL_CMD_INTPR_OFF (0 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1 (1 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2 (2 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3 (3 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4 (4 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5 (5 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6 (6 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7 (7 << 12) +#define ARBITRATION_CTRL_DMA_OFF (0 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_1 (1 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_2 (2 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_3 (3 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_4 (4 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_5 (5 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_6 (6 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_7 (7 << 8) +#define ARBITRATION_CTRL_VIDEO_OFF (0 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_1 (1 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_2 (2 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_3 (3 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_4 (4 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_5 (5 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_6 (6 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_7 (7 << 4) +#define ARBITRATION_CTRL_CRT_OFF (0 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_1 (1 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_2 (2 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_3 (3 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_4 (4 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_5 (5 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_6 (6 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_7 (7 << 0) + +/* ----- Command list status register -------------------------- */ +#define CMD_INTPR_STATUS (0x000024 + VOYAGER_BASE) + +/* ----- Interrupt status register ----------------------------- */ +#define INT_STATUS (0x00002c + VOYAGER_BASE) +#define INT_STATUS_UH (1 << 6) +#define INT_STATUS_MC (1 << 10) +#define INT_STATUS_U0 (1 << 12) +#define INT_STATUS_U1 (1 << 13) +#define INT_STATUS_AC (1 << 17) + +/* ----- Interrupt mask register ------------------------------ */ +#define VOYAGER_INT_MASK (0x000030 + VOYAGER_BASE) +#define VOYAGER_INT_MASK_AC (1 << 17) + +/* ----- Current Gate register ---------------------------------*/ +#define CURRENT_GATE (0x000038 + VOYAGER_BASE) + +/* ----- Power mode 0 gate register --------------------------- */ +#define POWER_MODE0_GATE (0x000040 + VOYAGER_BASE) +#define POWER_MODE0_GATE_G (1 << 6) +#define POWER_MODE0_GATE_U0 (1 << 7) +#define POWER_MODE0_GATE_U1 (1 << 8) +#define POWER_MODE0_GATE_UH (1 << 11) +#define POWER_MODE0_GATE_AC (1 << 18) + +/* ----- Power mode 1 gate register --------------------------- */ +#define POWER_MODE1_GATE (0x000048 + VOYAGER_BASE) +#define POWER_MODE1_GATE_G (1 << 6) +#define POWER_MODE1_GATE_U0 (1 << 7) +#define POWER_MODE1_GATE_U1 (1 << 8) +#define POWER_MODE1_GATE_UH (1 << 11) +#define POWER_MODE1_GATE_AC (1 << 18) + +/* ----- Power mode 0 clock register -------------------------- */ +#define POWER_MODE0_CLOCK (0x000044 + VOYAGER_BASE) + +/* ----- Power mode 1 clock register -------------------------- */ +#define POWER_MODE1_CLOCK (0x00004C + VOYAGER_BASE) + +/* ----- Power mode controll register ------------------------- */ +#define POWER_MODE_CTRL (0x000054 + VOYAGER_BASE) + +/* ----- Miscellaneous Timing register ------------------------ */ +#define SYSTEM_DRAM_CTRL (0x000068 + VOYAGER_BASE) + +/* ----- PWM register ------------------------------------------*/ +#define PWM_0 (0x010020 + VOYAGER_BASE) +#define PWM_0_HC(x) (((x)&0x0fff)<<20) +#define PWM_0_LC(x) (((x)&0x0fff)<<8 ) +#define PWM_0_CLK_DEV(x) (((x)&0x000f)<<4 ) +#define PWM_0_EN (1<<0) + +/* ----- I2C register ----------------------------------------- */ +#define I2C_BYTECOUNT (0x010040 + VOYAGER_BASE) +#define I2C_CONTROL (0x010041 + VOYAGER_BASE) +#define I2C_STATUS (0x010042 + VOYAGER_BASE) +#define I2C_RESET (0x010042 + VOYAGER_BASE) +#define I2C_SADDRESS (0x010043 + VOYAGER_BASE) +#define I2C_DATA (0x010044 + VOYAGER_BASE) + +/* ----- Controle register bits ----------------------------------------- */ +#define I2C_CONTROL_E (1 << 0) +#define I2C_CONTROL_MODE (1 << 1) +#define I2C_CONTROL_STATUS (1 << 2) +#define I2C_CONTROL_INT (1 << 4) +#define I2C_CONTROL_INTACK (1 << 5) +#define I2C_CONTROL_REPEAT (1 << 6) + +/* ----- Status register bits ----------------------------------------- */ +#define I2C_STATUS_BUSY (1 << 0) +#define I2C_STATUS_ACK (1 << 1) +#define I2C_STATUS_ERROR (1 << 2) +#define I2C_STATUS_COMPLETE (1 << 3) + +/* ----- Reset register ---------------------------------------------- */ +#define I2C_RESET_ERROR (1 << 2) + +/* ----- transmission frequencies ------------------------------------- */ +#define I2C_SADDRESS_SELECT (1 << 0) + +/* ----- Display Controll register ----------------------------------------- */ +#define PANEL_DISPLAY_CTRL (0x080000 + VOYAGER_BASE) +#define PANEL_DISPLAY_CTRL_BIAS (1<<26) +#define PANEL_PAN_CTRL (0x080004 + VOYAGER_BASE) +#define PANEL_COLOR_KEY (0x080008 + VOYAGER_BASE) +#define PANEL_FB_ADDRESS (0x08000C + VOYAGER_BASE) +#define PANEL_FB_WIDTH (0x080010 + VOYAGER_BASE) +#define PANEL_WINDOW_WIDTH (0x080014 + VOYAGER_BASE) +#define PANEL_WINDOW_HEIGHT (0x080018 + VOYAGER_BASE) +#define PANEL_PLANE_TL (0x08001C + VOYAGER_BASE) +#define PANEL_PLANE_BR (0x080020 + VOYAGER_BASE) +#define PANEL_HORIZONTAL_TOTAL (0x080024 + VOYAGER_BASE) +#define PANEL_HORIZONTAL_SYNC (0x080028 + VOYAGER_BASE) +#define PANEL_VERTICAL_TOTAL (0x08002C + VOYAGER_BASE) +#define PANEL_VERTICAL_SYNC (0x080030 + VOYAGER_BASE) +#define PANEL_CURRENT_LINE (0x080034 + VOYAGER_BASE) +#define VIDEO_DISPLAY_CTRL (0x080040 + VOYAGER_BASE) +#define VIDEO_FB_0_ADDRESS (0x080044 + VOYAGER_BASE) +#define VIDEO_FB_WIDTH (0x080048 + VOYAGER_BASE) +#define VIDEO_FB_0_LAST_ADDRESS (0x08004C + VOYAGER_BASE) +#define VIDEO_PLANE_TL (0x080050 + VOYAGER_BASE) +#define VIDEO_PLANE_BR (0x080054 + VOYAGER_BASE) +#define VIDEO_SCALE (0x080058 + VOYAGER_BASE) +#define VIDEO_INITIAL_SCALE (0x08005C + VOYAGER_BASE) +#define VIDEO_YUV_CONSTANTS (0x080060 + VOYAGER_BASE) +#define VIDEO_FB_1_ADDRESS (0x080064 + VOYAGER_BASE) +#define VIDEO_FB_1_LAST_ADDRESS (0x080068 + VOYAGER_BASE) +#define VIDEO_ALPHA_DISPLAY_CTRL (0x080080 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_ADDRESS (0x080084 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_WIDTH (0x080088 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_LAST_ADDRESS (0x08008C + VOYAGER_BASE) +#define VIDEO_ALPHA_PLANE_TL (0x080090 + VOYAGER_BASE) +#define VIDEO_ALPHA_PLANE_BR (0x080094 + VOYAGER_BASE) +#define VIDEO_ALPHA_SCALE (0x080098 + VOYAGER_BASE) +#define VIDEO_ALPHA_INITIAL_SCALE (0x08009C + VOYAGER_BASE) +#define VIDEO_ALPHA_CHROMA_KEY (0x0800A0 + VOYAGER_BASE) +#define PANEL_HWC_ADDRESS (0x0800F0 + VOYAGER_BASE) +#define PANEL_HWC_LOCATION (0x0800F4 + VOYAGER_BASE) +#define PANEL_HWC_COLOR_12 (0x0800F8 + VOYAGER_BASE) +#define PANEL_HWC_COLOR_3 (0x0800FC + VOYAGER_BASE) +#define ALPHA_DISPLAY_CTRL (0x080100 + VOYAGER_BASE) +#define ALPHA_FB_ADDRESS (0x080104 + VOYAGER_BASE) +#define ALPHA_FB_WIDTH (0x080108 + VOYAGER_BASE) +#define ALPHA_PLANE_TL (0x08010C + VOYAGER_BASE) +#define ALPHA_PLANE_BR (0x080110 + VOYAGER_BASE) +#define ALPHA_CHROMA_KEY (0x080114 + VOYAGER_BASE) +#define CRT_DISPLAY_CTRL (0x080200 + VOYAGER_BASE) +#define CRT_FB_ADDRESS (0x080204 + VOYAGER_BASE) +#define CRT_FB_WIDTH (0x080208 + VOYAGER_BASE) +#define CRT_HORIZONTAL_TOTAL (0x08020C + VOYAGER_BASE) +#define CRT_HORIZONTAL_SYNC (0x080210 + VOYAGER_BASE) +#define CRT_VERTICAL_TOTAL (0x080214 + VOYAGER_BASE) +#define CRT_VERTICAL_SYNC (0x080218 + VOYAGER_BASE) +#define CRT_SIGNATURE_ANALYZER (0x08021C + VOYAGER_BASE) +#define CRT_CURRENT_LINE (0x080220 + VOYAGER_BASE) +#define CRT_MONITOR_DETECT (0x080224 + VOYAGER_BASE) +#define CRT_HWC_ADDRESS (0x080230 + VOYAGER_BASE) +#define CRT_HWC_LOCATION (0x080234 + VOYAGER_BASE) +#define CRT_HWC_COLOR_12 (0x080238 + VOYAGER_BASE) +#define CRT_HWC_COLOR_3 (0x08023C + VOYAGER_BASE) +#define CRT_PALETTE_RAM (0x080400 + VOYAGER_BASE) +#define PANEL_PALETTE_RAM (0x080800 + VOYAGER_BASE) +#define VIDEO_PALETTE_RAM (0x080C00 + VOYAGER_BASE) + +/* ----- 8051 Controle register ----------------------------------------- */ +#define VOYAGER_8051_BASE (0x000c0000 + VOYAGER_BASE) +#define VOYAGER_8051_RESET (0x000b0000 + VOYAGER_BASE) +#define VOYAGER_8051_SELECT (0x000b0004 + VOYAGER_BASE) +#define VOYAGER_8051_CPU_INT (0x000b000c + VOYAGER_BASE) + +/* ----- AC97 Controle register ----------------------------------------- */ +#define AC97_TX_SLOT0 (0x00000000 + VOYAGER_AC97_BASE) +#define AC97_CONTROL_STATUS (0x00000080 + VOYAGER_AC97_BASE) +#define AC97C_READ (1 << 19) +#define AC97C_WD_BIT (1 << 2) +#define AC97C_INDEX_MASK 0x7f +/* -------------------------------------------------------------------- */ + +#endif /* _VOYAGER_GX_REG_H */ -- cgit v1.2.1 From e7f93a355c7e32c26eab8910cf53b7506bb046c5 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:19:13 +0900 Subject: sh: Make PAGE_OFFSET configurable. nommu needs to be able to shift PAGE_OFFSET, so we switch it to a non-user-visible CONFIG_PAGE_OFFSET and use that in the few places where it matters. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 51d7281a546a..1b3cfd165a66 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -84,7 +84,7 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define __MEMORY_START CONFIG_MEMORY_START #define __MEMORY_SIZE CONFIG_MEMORY_SIZE -#define PAGE_OFFSET (0x80000000UL) +#define PAGE_OFFSET CONFIG_PAGE_OFFSET #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) -- cgit v1.2.1 From e96636ccfa373a00a0ee0558e1971baa7856d8b5 Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Wed, 27 Sep 2006 17:21:02 +0900 Subject: sh: Various nommu fixes. This fixes up some of the various outstanding nommu bugs on SH. Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt --- include/asm-sh/addrspace.h | 8 ++++++++ include/asm-sh/flat.h | 2 +- include/asm-sh/mmu.h | 13 +------------ include/asm-sh/page.h | 5 +++++ include/asm-sh/uaccess.h | 13 +++++++++++++ 5 files changed, 28 insertions(+), 13 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h index 720afc11c2ca..4207368267b1 100644 --- a/include/asm-sh/addrspace.h +++ b/include/asm-sh/addrspace.h @@ -14,11 +14,19 @@ #include /* Memory segments (32bit Privileged mode addresses) */ +#ifdef CONFIG_MMU #define P0SEG 0x00000000 #define P1SEG 0x80000000 #define P2SEG 0xa0000000 #define P3SEG 0xc0000000 #define P4SEG 0xe0000000 +#else +#define P0SEG 0x00000000 +#define P1SEG 0x00000000 +#define P2SEG 0x20000000 +#define P3SEG 0x40000000 +#define P4SEG 0x80000000 +#endif /* Returns the privileged segment base of a given address */ #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h index f29072e1c87e..0d5cc04ab005 100644 --- a/include/asm-sh/flat.h +++ b/include/asm-sh/flat.h @@ -13,7 +13,7 @@ #define __ASM_SH_FLAT_H #define flat_stack_align(sp) /* nothing needed */ -#define flat_argvp_envp_on_stack() 1 +#define flat_argvp_envp_on_stack() 0 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) #define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp) diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index ec09589fa6ca..6383dc84501e 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -3,19 +3,8 @@ #if !defined(CONFIG_MMU) -struct mm_rblock_struct { - int size; - int refcount; - void *kblock; -}; - -struct mm_tblock_struct { - struct mm_rblock_struct *rblock; - struct mm_tblock_struct *next; -}; - typedef struct { - struct mm_tblock_struct tblock; + struct vm_list_struct *vmlist; unsigned long end_brk; } mm_context_t; diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 1b3cfd165a66..e9135532d00c 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -38,8 +38,13 @@ extern void (*clear_page)(void *to); extern void (*copy_page)(void *to, void *from); +#ifdef CONFIG_MMU extern void clear_page_slow(void *to); extern void copy_page_slow(void *to, void *from); +#else +extern void clear_page_nommu(void *to); +extern void copy_page_nommu(void *to, void *from); +#endif #if defined(CONFIG_MMU) && (defined(CONFIG_CPU_SH4) || \ defined(CONFIG_SH7705_CACHE_32KB)) diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h index 6c0014dd2ef7..5c3b00c2f107 100644 --- a/include/asm-sh/uaccess.h +++ b/include/asm-sh/uaccess.h @@ -168,6 +168,7 @@ do { \ __gu_err; \ }) +#ifdef CONFIG_MMU #define __get_user_check(x,ptr,size) \ ({ \ long __gu_err, __gu_val; \ @@ -257,6 +258,18 @@ __asm__("stc r7_bank, %1\n\t" \ : "r" (addr) \ : "t"); \ }) +#else /* CONFIG_MMU */ +#define __get_user_check(x,ptr,size) \ +({ \ + long __gu_err, __gu_val; \ + if (__access_ok((unsigned long)(ptr), (size))) { \ + __get_user_size(__gu_val, (ptr), (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + } else \ + __gu_err = -EFAULT; \ + __gu_err; \ +}) +#endif #define __get_user_asm(x, addr, err, insn) \ ({ \ -- cgit v1.2.1 From a2d1a5fae6296c2a3ac1aaa982c95464c46c0585 Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Wed, 27 Sep 2006 17:25:07 +0900 Subject: sh: __addr_ok() and other misc nommu fixups. A few more outstanding nommu fixups.. Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt --- include/asm-sh/addrspace.h | 4 ++-- include/asm-sh/io.h | 5 +++++ include/asm-sh/uaccess.h | 9 ++++++--- 3 files changed, 13 insertions(+), 5 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h index 4207368267b1..b860218e402e 100644 --- a/include/asm-sh/addrspace.h +++ b/include/asm-sh/addrspace.h @@ -14,7 +14,7 @@ #include /* Memory segments (32bit Privileged mode addresses) */ -#ifdef CONFIG_MMU +#ifndef CONFIG_CPU_SH2A #define P0SEG 0x00000000 #define P1SEG 0x80000000 #define P2SEG 0xa0000000 @@ -24,7 +24,7 @@ #define P0SEG 0x00000000 #define P1SEG 0x00000000 #define P2SEG 0x20000000 -#define P3SEG 0x40000000 +#define P3SEG 0x00000000 #define P4SEG 0x80000000 #endif diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 27dba653cbe7..377160b86295 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -216,6 +216,7 @@ static inline void ctrl_delay(void) #define IO_SPACE_LIMIT 0xffffffff +#ifdef CONFIG_MMU /* * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/SuperH mapping @@ -229,6 +230,10 @@ static inline void *phys_to_virt(unsigned long address) { return (void *)P1SEGADDR(address); } +#else +#define phys_to_virt(address) ((void *)(address)) +#define virt_to_phys(address) ((unsigned long)(address)) +#endif #define virt_to_bus virt_to_phys #define bus_to_virt phys_to_virt diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h index 5c3b00c2f107..5c49ed6715f2 100644 --- a/include/asm-sh/uaccess.h +++ b/include/asm-sh/uaccess.h @@ -34,12 +34,12 @@ #define segment_eq(a,b) ((a).seg == (b).seg) -#define __addr_ok(addr) \ - ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) - #define get_ds() (KERNEL_DS) #if !defined(CONFIG_MMU) +/* NOMMU is always true */ +#define __addr_ok(addr) (1) + static inline mm_segment_t get_fs(void) { return USER_DS; @@ -66,6 +66,9 @@ static inline int __access_ok(unsigned long addr, unsigned long size) return ((addr >= memory_start) && ((addr + size) < memory_end)); } #else /* CONFIG_MMU */ +#define __addr_ok(addr) \ + ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) + #define get_fs() (current_thread_info()->addr_limit) #define set_fs(x) (current_thread_info()->addr_limit = (x)) -- cgit v1.2.1 From 9f23e7e94f7083d9705b595cbd6b30972be6fbbb Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:27:00 +0900 Subject: sh: pselect6 and ppoll, along with signal trampoline rework. This implements support for ppoll() and pselect6().. Signed-off-by: Paul Mundt --- include/asm-sh/thread_info.h | 2 ++ include/asm-sh/unistd.h | 66 +++++++++++++++++++++++--------------------- 2 files changed, 36 insertions(+), 32 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index b986a1914472..5eb874b065a6 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -94,6 +94,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_MEMDIE 18 @@ -102,6 +103,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_NOTIFY_RESUME (1< Date: Wed, 27 Sep 2006 17:32:30 +0900 Subject: serial: Add SERIAL_SH_SCI_NR_UARTS for sh-sci. sh-sci needs to be able to define its number of ports to support, we do this with a config option, like most other ports do. Signed-off-by: Paul Mundt --- include/asm-sh/sci.h | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 include/asm-sh/sci.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/sci.h b/include/asm-sh/sci.h new file mode 100644 index 000000000000..52e73660c129 --- /dev/null +++ b/include/asm-sh/sci.h @@ -0,0 +1,34 @@ +#ifndef __ASM_SH_SCI_H +#define __ASM_SH_SCI_H + +#include + +/* + * Generic header for SuperH SCI(F) + * + * Do not place SH-specific parts in here, sh64 and h8300 depend on this too. + */ + +/* Offsets into the sci_port->irqs array */ +enum { + SCIx_ERI_IRQ, + SCIx_RXI_IRQ, + SCIx_TXI_IRQ, + SCIx_BRI_IRQ, + SCIx_NR_IRQS, +}; + +/* + * Platform device specific platform_data struct + */ +struct plat_sci_port { + void __iomem *membase; /* io cookie */ + unsigned long mapbase; /* resource base */ + unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ + unsigned int type; /* SCI / SCIF / IRDA */ + upf_t flags; /* UPF_* flags */ +}; + +int early_sci_setup(struct uart_port *port); + +#endif /* __ASM_SH_SCI_H */ -- cgit v1.2.1 From e5723e0eeb2dc16629e86d66785024ead9169000 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:38:11 +0900 Subject: sh: Add support for SH7706/SH7710/SH7343 CPUs. This adds support for the aforementioned CPU subtypes, and cleans up some build issues encountered as a result. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh3/cache.h | 4 +- include/asm-sh/cpu-sh3/mmu_context.h | 8 +- include/asm-sh/cpu-sh3/timer.h | 1 + include/asm-sh/cpu-sh3/ubc.h | 15 +- include/asm-sh/irq-sh73180.h | 2 - include/asm-sh/irq-sh7343.h | 317 +++++++++++++++++++++++++++++++++++ include/asm-sh/irq.h | 119 ++++++++++++- include/asm-sh/processor.h | 8 +- 8 files changed, 459 insertions(+), 15 deletions(-) create mode 100644 include/asm-sh/irq-sh7343.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h index 406aa8d9b947..ffe08d2813f9 100644 --- a/include/asm-sh/cpu-sh3/cache.h +++ b/include/asm-sh/cpu-sh3/cache.h @@ -26,12 +26,10 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF -#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7710) #define CCR3 0xa40000b4 #define CCR_CACHE_16KB 0x00010000 #define CCR_CACHE_32KB 0x00020000 #endif - #endif /* __ASM_CPU_SH3_CACHE_H */ - diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h index a844ea0965b6..bccb7ddb438b 100644 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ b/include/asm-sh/cpu-sh3/mmu_context.h @@ -27,8 +27,12 @@ #define TRA 0xffffffd0 #define EXPEVT 0xffffffd4 -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ #else #define INTEVT 0xffffffd8 diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 2082ad956f21..b2394cf76f49 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h @@ -20,6 +20,7 @@ * SH7710 * SH7720 * SH7300 + * SH7710 * --------------------------------------------------------------------------- */ diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h index 0f809dec4e17..9d308cbe9b29 100644 --- a/include/asm-sh/cpu-sh3/ubc.h +++ b/include/asm-sh/cpu-sh3/ubc.h @@ -11,6 +11,19 @@ #ifndef __ASM_CPU_SH3_UBC_H #define __ASM_CPU_SH3_UBC_H +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#define UBC_BARA 0xa4ffffb0 +#define UBC_BAMRA 0xa4ffffb4 +#define UBC_BBRA 0xa4ffffb8 +#define UBC_BASRA 0xffffffe4 +#define UBC_BARB 0xa4ffffa0 +#define UBC_BAMRB 0xa4ffffa4 +#define UBC_BBRB 0xa4ffffa8 +#define UBC_BASRB 0xffffffe8 +#define UBC_BDRB 0xa4ffff90 +#define UBC_BDMRB 0xa4ffff94 +#define UBC_BRCR 0xa4ffff98 +#else #define UBC_BARA 0xffffffb0 #define UBC_BAMRA 0xffffffb4 #define UBC_BBRA 0xffffffb8 @@ -22,6 +35,6 @@ #define UBC_BDRB 0xffffff90 #define UBC_BDMRB 0xffffff94 #define UBC_BRCR 0xffffff98 +#endif #endif /* __ASM_CPU_SH3_UBC_H */ - diff --git a/include/asm-sh/irq-sh73180.h b/include/asm-sh/irq-sh73180.h index d705252be260..b28af9a69d72 100644 --- a/include/asm-sh/irq-sh73180.h +++ b/include/asm-sh/irq-sh73180.h @@ -311,6 +311,4 @@ #define IRQ6_PRIORITY 1 #define IRQ7_PRIORITY 1 -int shmse_irq_demux(int irq); - #endif /* __ASM_SH_IRQ_SH73180_H */ diff --git a/include/asm-sh/irq-sh7343.h b/include/asm-sh/irq-sh7343.h new file mode 100644 index 000000000000..5d15419b53b0 --- /dev/null +++ b/include/asm-sh/irq-sh7343.h @@ -0,0 +1,317 @@ +#ifndef __ASM_SH_IRQ_SH7343_H +#define __ASM_SH_IRQ_SH7343_H + +/* + * linux/include/asm-sh/irq-sh7343.h + * + * Copyright (C) 2006 Kenati Technologies Inc. + * Andre Mccurdy + * Ranjit Deshpande + */ + +#undef INTC_IPRA +#undef INTC_IPRB +#undef INTC_IPRC +#undef INTC_IPRD + +#undef DMTE0_IRQ +#undef DMTE1_IRQ +#undef DMTE2_IRQ +#undef DMTE3_IRQ +#undef DMTE4_IRQ +#undef DMTE5_IRQ +#undef DMTE6_IRQ +#undef DMTE7_IRQ +#undef DMAE_IRQ +#undef DMA_IPR_ADDR +#undef DMA_IPR_POS +#undef DMA_PRIORITY + +#undef INTC_IMCR0 +#undef INTC_IMCR1 +#undef INTC_IMCR2 +#undef INTC_IMCR3 +#undef INTC_IMCR4 +#undef INTC_IMCR5 +#undef INTC_IMCR6 +#undef INTC_IMCR7 +#undef INTC_IMCR8 +#undef INTC_IMCR9 +#undef INTC_IMCR10 + + +#define INTC_IPRA 0xA4080000UL +#define INTC_IPRB 0xA4080004UL +#define INTC_IPRC 0xA4080008UL +#define INTC_IPRD 0xA408000CUL +#define INTC_IPRE 0xA4080010UL +#define INTC_IPRF 0xA4080014UL +#define INTC_IPRG 0xA4080018UL +#define INTC_IPRH 0xA408001CUL +#define INTC_IPRI 0xA4080020UL +#define INTC_IPRJ 0xA4080024UL +#define INTC_IPRK 0xA4080028UL +#define INTC_IPRL 0xA408002CUL + +#define INTC_IMR0 0xA4080080UL +#define INTC_IMR1 0xA4080084UL +#define INTC_IMR2 0xA4080088UL +#define INTC_IMR3 0xA408008CUL +#define INTC_IMR4 0xA4080090UL +#define INTC_IMR5 0xA4080094UL +#define INTC_IMR6 0xA4080098UL +#define INTC_IMR7 0xA408009CUL +#define INTC_IMR8 0xA40800A0UL +#define INTC_IMR9 0xA40800A4UL +#define INTC_IMR10 0xA40800A8UL +#define INTC_IMR11 0xA40800ACUL + +#define INTC_IMCR0 0xA40800C0UL +#define INTC_IMCR1 0xA40800C4UL +#define INTC_IMCR2 0xA40800C8UL +#define INTC_IMCR3 0xA40800CCUL +#define INTC_IMCR4 0xA40800D0UL +#define INTC_IMCR5 0xA40800D4UL +#define INTC_IMCR6 0xA40800D8UL +#define INTC_IMCR7 0xA40800DCUL +#define INTC_IMCR8 0xA40800E0UL +#define INTC_IMCR9 0xA40800E4UL +#define INTC_IMCR10 0xA40800E8UL +#define INTC_IMCR11 0xA40800ECUL + +#define INTC_ICR0 0xA4140000UL +#define INTC_ICR1 0xA414001CUL + +#define INTMSK0 0xa4140044 +#define INTMSKCLR0 0xa4140064 +#define INTC_INTPRI0 0xa4140010 + +/* + NOTE: + + *_IRQ = (INTEVT2 - 0x200)/0x20 +*/ + +/* TMU0 */ +#define TMU0_IRQ 16 +#define TMU0_IPR_ADDR INTC_IPRA +#define TMU0_IPR_POS 3 +#define TMU0_PRIORITY 2 + +#define TIMER_IRQ 16 +#define TIMER_IPR_ADDR INTC_IPRA +#define TIMER_IPR_POS 3 +#define TIMER_PRIORITY 2 + +/* TMU1 */ +#define TMU1_IRQ 17 +#define TMU1_IPR_ADDR INTC_IPRA +#define TMU1_IPR_POS 2 +#define TMU1_PRIORITY 2 + +/* TMU2 */ +#define TMU2_IRQ 18 +#define TMU2_IPR_ADDR INTC_IPRA +#define TMU2_IPR_POS 1 +#define TMU2_PRIORITY 2 + +/* LCDC */ +#define LCDC_IRQ 28 +#define LCDC_IPR_ADDR INTC_IPRB +#define LCDC_IPR_POS 2 +#define LCDC_PRIORITY 2 + +/* VIO (Video I/O) */ +#define CEU_IRQ 52 +#define BEU_IRQ 53 +#define VEU_IRQ 54 +#define VOU_IRQ 55 +#define VIO_IPR_ADDR INTC_IPRE +#define VIO_IPR_POS 2 +#define VIO_PRIORITY 2 + +/* MFI (Multi Functional Interface) */ +#define MFI_IRQ 56 +#define MFI_IPR_ADDR INTC_IPRE +#define MFI_IPR_POS 1 +#define MFI_PRIORITY 2 + +/* VPU (Video Processing Unit) */ +#define VPU_IRQ 60 +#define VPU_IPR_ADDR INTC_IPRE +#define VPU_IPR_POS 0 +#define VPU_PRIORITY 2 + +/* 3DG */ +#define TDG_IRQ 63 +#define TDG_IPR_ADDR INTC_IPRJ +#define TDG_IPR_POS 2 +#define TDG_PRIORITY 2 + +/* DMAC(1) */ +#define DMTE0_IRQ 48 +#define DMTE1_IRQ 49 +#define DMTE2_IRQ 50 +#define DMTE3_IRQ 51 +#define DMA1_IPR_ADDR INTC_IPRE +#define DMA1_IPR_POS 3 +#define DMA1_PRIORITY 7 + +/* DMAC(2) */ +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 +#define DMA2_IPR_ADDR INTC_IPRF +#define DMA2_IPR_POS 2 +#define DMA2_PRIORITY 7 + +/* SCIF0 */ +#define SCIF_ERI_IRQ 80 +#define SCIF_RXI_IRQ 81 +#define SCIF_BRI_IRQ 82 +#define SCIF_TXI_IRQ 83 +#define SCIF_IPR_ADDR INTC_IPRG +#define SCIF_IPR_POS 3 +#define SCIF_PRIORITY 3 + +/* SIOF0 */ +#define SIOF0_IRQ 84 +#define SIOF0_IPR_ADDR INTC_IPRH +#define SIOF0_IPR_POS 3 +#define SIOF0_PRIORITY 3 + +/* FLCTL (Flash Memory Controller) */ +#define FLSTE_IRQ 92 +#define FLTEND_IRQ 93 +#define FLTRQ0_IRQ 94 +#define FLTRQ1_IRQ 95 +#define FLCTL_IPR_ADDR INTC_IPRH +#define FLCTL_IPR_POS 1 +#define FLCTL_PRIORITY 3 + +/* IIC(0) (IIC Bus Interface) */ +#define IIC0_ALI_IRQ 96 +#define IIC0_TACKI_IRQ 97 +#define IIC0_WAITI_IRQ 98 +#define IIC0_DTEI_IRQ 99 +#define IIC0_IPR_ADDR INTC_IPRH +#define IIC0_IPR_POS 0 +#define IIC0_PRIORITY 3 + +/* IIC(1) (IIC Bus Interface) */ +#define IIC1_ALI_IRQ 44 +#define IIC1_TACKI_IRQ 45 +#define IIC1_WAITI_IRQ 46 +#define IIC1_DTEI_IRQ 47 +#define IIC1_IPR_ADDR INTC_IPRI +#define IIC1_IPR_POS 0 +#define IIC1_PRIORITY 3 + +/* SIO0 */ +#define SIO0_IRQ 88 +#define SIO0_IPR_ADDR INTC_IPRI +#define SIO0_IPR_POS 3 +#define SIO0_PRIORITY 3 + +/* SDHI */ +#define SDHI_SDHII0_IRQ 100 +#define SDHI_SDHII1_IRQ 101 +#define SDHI_SDHII2_IRQ 102 +#define SDHI_SDHII3_IRQ 103 +#define SDHI_IPR_ADDR INTC_IPRK +#define SDHI_IPR_POS 0 +#define SDHI_PRIORITY 3 + +/* SIU (Sound Interface Unit) */ +#define SIU_IRQ 108 +#define SIU_IPR_ADDR INTC_IPRJ +#define SIU_IPR_POS 1 +#define SIU_PRIORITY 3 + +#define PORT_PACR 0xA4050100UL +#define PORT_PBCR 0xA4050102UL +#define PORT_PCCR 0xA4050104UL +#define PORT_PDCR 0xA4050106UL +#define PORT_PECR 0xA4050108UL +#define PORT_PFCR 0xA405010AUL +#define PORT_PGCR 0xA405010CUL +#define PORT_PHCR 0xA405010EUL +#define PORT_PJCR 0xA4050110UL +#define PORT_PKCR 0xA4050112UL +#define PORT_PLCR 0xA4050114UL +#define PORT_SCPCR 0xA4050116UL +#define PORT_PMCR 0xA4050118UL +#define PORT_PNCR 0xA405011AUL +#define PORT_PQCR 0xA405011CUL +#define PORT_PRCR 0xA405011EUL +#define PORT_PTCR 0xA405014CUL +#define PORT_PUCR 0xA405014EUL +#define PORT_PVCR 0xA4050150UL + +#define PORT_PSELA 0xA4050140UL +#define PORT_PSELB 0xA4050142UL +#define PORT_PSELC 0xA4050144UL +#define PORT_PSELE 0xA4050158UL + +#define PORT_HIZCRA 0xA4050146UL +#define PORT_HIZCRB 0xA4050148UL +#define PORT_DRVCR 0xA405014AUL + +#define PORT_PADR 0xA4050120UL +#define PORT_PBDR 0xA4050122UL +#define PORT_PCDR 0xA4050124UL +#define PORT_PDDR 0xA4050126UL +#define PORT_PEDR 0xA4050128UL +#define PORT_PFDR 0xA405012AUL +#define PORT_PGDR 0xA405012CUL +#define PORT_PHDR 0xA405012EUL +#define PORT_PJDR 0xA4050130UL +#define PORT_PKDR 0xA4050132UL +#define PORT_PLDR 0xA4050134UL +#define PORT_SCPDR 0xA4050136UL +#define PORT_PMDR 0xA4050138UL +#define PORT_PNDR 0xA405013AUL +#define PORT_PQDR 0xA405013CUL +#define PORT_PRDR 0xA405013EUL +#define PORT_PTDR 0xA405016CUL +#define PORT_PUDR 0xA405016EUL +#define PORT_PVDR 0xA4050170UL + +#define IRQ0_IRQ 32 +#define IRQ1_IRQ 33 +#define IRQ2_IRQ 34 +#define IRQ3_IRQ 35 +#define IRQ4_IRQ 36 +#define IRQ5_IRQ 37 +#define IRQ6_IRQ 38 +#define IRQ7_IRQ 39 + +#define INTPRI00 0xA4140010UL + +#define IRQ0_IPR_ADDR INTPRI00 +#define IRQ1_IPR_ADDR INTPRI00 +#define IRQ2_IPR_ADDR INTPRI00 +#define IRQ3_IPR_ADDR INTPRI00 +#define IRQ4_IPR_ADDR INTPRI00 +#define IRQ5_IPR_ADDR INTPRI00 +#define IRQ6_IPR_ADDR INTPRI00 +#define IRQ7_IPR_ADDR INTPRI00 + +#define IRQ0_IPR_POS 7 +#define IRQ1_IPR_POS 6 +#define IRQ2_IPR_POS 5 +#define IRQ3_IPR_POS 4 +#define IRQ4_IPR_POS 3 +#define IRQ5_IPR_POS 2 +#define IRQ6_IPR_POS 1 +#define IRQ7_IPR_POS 0 + +#define IRQ0_PRIORITY 1 +#define IRQ1_PRIORITY 1 +#define IRQ2_PRIORITY 1 +#define IRQ3_PRIORITY 1 +#define IRQ4_PRIORITY 1 +#define IRQ5_PRIORITY 1 +#define IRQ6_PRIORITY 1 +#define IRQ7_PRIORITY 1 + +#endif /* __ASM_SH_IRQ_SH7343_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 648102e9236f..00886f9adb4d 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -192,7 +192,7 @@ #if defined (CONFIG_CPU_SUBTYPE_SH7707) || defined (CONFIG_CPU_SUBTYPE_SH7708) || \ defined (CONFIG_CPU_SUBTYPE_SH7709) || defined (CONFIG_CPU_SUBTYPE_SH7750) || \ - defined (CONFIG_CPU_SUBTYPE_SH7751) + defined (CONFIG_CPU_SUBTYPE_SH7751) || defined (CONFIG_CPU_SUBTYPE_SH7706) #define SCI_ERI_IRQ 23 #define SCI_RXI_IRQ 24 #define SCI_TXI_IRQ 25 @@ -207,6 +207,7 @@ #define SCIF0_IPR_POS 3 #define SCIF0_PRIORITY 3 #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) #define SCIF_ERI_IRQ 56 @@ -261,9 +262,12 @@ #elif defined(CONFIG_CPU_SUBTYPE_SH7708) # define ONCHIP_NR_IRQS 32 #elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) # define ONCHIP_NR_IRQS 64 // Actually 61 # define PINT_NR_IRQS 16 +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +# define ONCHIP_NR_IRQS 104 #elif defined(CONFIG_CPU_SUBTYPE_SH7750) # define ONCHIP_NR_IRQS 48 // Actually 44 #elif defined(CONFIG_CPU_SUBTYPE_SH7751) @@ -275,7 +279,8 @@ #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define ONCHIP_NR_IRQS 144 #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ - defined(CONFIG_CPU_SUBTYPE_SH73180) + defined(CONFIG_CPU_SUBTYPE_SH73180) || \ + defined(CONFIG_CPU_SUBTYPE_SH7343) # define ONCHIP_NR_IRQS 109 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) # define ONCHIP_NR_IRQS 111 @@ -476,8 +481,10 @@ extern int ipr_irq_demux(int irq); #define INTC_ICR 0xfffffee0UL #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) + defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7710) #define INTC_IRR0 0xa4000004UL #define INTC_IRR1 0xa4000006UL #define INTC_IRR2 0xa4000008UL @@ -496,8 +503,105 @@ extern int ipr_irq_demux(int irq); #define INTC_IPRF 0xa4080000UL #define INTC_IPRG 0xa4080002UL #define INTC_IPRH 0xa4080004UL -#endif +#elif defined(CONFIG_CPU_SUBTYPE_SH7710) +/* Interrupt Controller Registers */ +#undef INTC_IPRA +#undef INTC_IPRB +#define INTC_IPRA 0xA414FEE2UL +#define INTC_IPRB 0xA414FEE4UL +#define INTC_IPRF 0xA4080000UL +#define INTC_IPRG 0xA4080002UL +#define INTC_IPRH 0xA4080004UL +#define INTC_IPRI 0xA4080006UL + +#undef INTC_ICR0 +#undef INTC_ICR1 +#define INTC_ICR0 0xA414FEE0UL +#define INTC_ICR1 0xA4140010UL + +#define INTC_IRR0 0xa4000004UL +#define INTC_IRR1 0xa4000006UL +#define INTC_IRR2 0xa4000008UL +#define INTC_IRR3 0xa400000AUL +#define INTC_IRR4 0xa400000CUL +#define INTC_IRR5 0xa4080020UL +#define INTC_IRR7 0xa4080024UL +#define INTC_IRR8 0xa4080026UL + +/* Interrupt numbers */ +#define TIMER2_IRQ 18 +#define TIMER2_IPR_ADDR INTC_IPRA +#define TIMER2_IPR_POS 1 +#define TIMER2_PRIORITY 2 +/* WDT */ +#define WDT_IRQ 27 +#define WDT_IPR_ADDR INTC_IPRB +#define WDT_IPR_POS 3 +#define WDT_PRIORITY 2 + +#define SCIF0_ERI_IRQ 52 +#define SCIF0_RXI_IRQ 53 +#define SCIF0_BRI_IRQ 54 +#define SCIF0_TXI_IRQ 55 +#define SCIF0_IPR_ADDR INTC_IPRE +#define SCIF0_IPR_POS 2 +#define SCIF0_PRIORITY 3 + +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 +#define DMA2_IPR_ADDR INTC_IPRF +#define DMA2_IPR_POS 2 +#define DMA2_PRIORITY 7 + +#define IPSEC_IRQ 79 +#define IPSEC_IPR_ADDR INTC_IPRF +#define IPSEC_IPR_POS 3 +#define IPSEC_PRIORITY 3 + +/* EDMAC */ +#define EDMAC0_IRQ 80 +#define EDMAC0_IPR_ADDR INTC_IPRG +#define EDMAC0_IPR_POS 3 +#define EDMAC0_PRIORITY 3 + +#define EDMAC1_IRQ 81 +#define EDMAC1_IPR_ADDR INTC_IPRG +#define EDMAC1_IPR_POS 2 +#define EDMAC1_PRIORITY 3 + +#define EDMAC2_IRQ 82 +#define EDMAC2_IPR_ADDR INTC_IPRG +#define EDMAC2_IPR_POS 1 +#define EDMAC2_PRIORITY 3 + +/* SIOF */ +#define SIOF0_ERI_IRQ 96 +#define SIOF0_TXI_IRQ 97 +#define SIOF0_RXI_IRQ 98 +#define SIOF0_CCI_IRQ 99 +#define SIOF0_IPR_ADDR INTC_IPRH +#define SIOF0_IPR_POS 0 +#define SIOF0_PRIORITY 7 + +#define SIOF1_ERI_IRQ 100 +#define SIOF1_TXI_IRQ 101 +#define SIOF1_RXI_IRQ 102 +#define SIOF1_CCI_IRQ 103 +#define SIOF1_IPR_ADDR INTC_IPRI +#define SIOF1_IPR_POS 1 +#define SIOF1_PRIORITY 7 +#endif /* CONFIG_CPU_SUBTYPE_SH7710 */ + +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +#define PORT_PACR 0xa4050100UL +#define PORT_PBCR 0xa4050102UL +#define PORT_PCCR 0xa4050104UL +#define PORT_PETCR 0xa4050106UL +#define PORT_PADR 0xa4050120UL +#define PORT_PBDR 0xa4050122UL +#define PORT_PCDR 0xa4050124UL +#else #define PORT_PACR 0xa4000100UL #define PORT_PBCR 0xa4000102UL #define PORT_PCCR 0xa4000104UL @@ -506,6 +610,7 @@ extern int ipr_irq_demux(int irq); #define PORT_PBDR 0xa4000122UL #define PORT_PCDR 0xa4000124UL #define PORT_PFDR 0xa400012aUL +#endif #define IRQ0_IRQ 32 #define IRQ1_IRQ 33 @@ -599,6 +704,8 @@ void intc2_add_clear_irq(int irq, int (*fn)(int)); #endif +extern int shmse_irq_demux(int irq); + static inline int generic_irq_demux(int irq) { return irq; @@ -614,4 +721,8 @@ static inline int generic_irq_demux(int irq) #include #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7343) +#include +#endif + #endif /* __ASM_SH_IRQ_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index a22732007dd4..3b3ef4f2bf31 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -38,13 +38,15 @@ enum cpu_type { CPU_SH7604, /* SH-3 types */ - CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, - CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300, + CPU_SH7705, CPU_SH7706, CPU_SH7707, + CPU_SH7708, CPU_SH7708S, CPU_SH7708R, + CPU_SH7709, CPU_SH7709A, CPU_SH7710, + CPU_SH7729, CPU_SH7300, /* SH-4 types */ CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, - CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781, + CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781, /* Unknown subtype */ CPU_SH_NONE -- cgit v1.2.1 From 51e22e7a05c1c6f2e38ac7459d3404e32e543b75 Mon Sep 17 00:00:00 2001 From: Takashi YOSHII Date: Wed, 27 Sep 2006 17:41:31 +0900 Subject: sh: SHMIN board support. This adds support for the SHMIN SH7706 board. Signed-off-by: Takashi YOSHII Signed-off-by: Paul Mundt --- include/asm-sh/shmin/shmin.h | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 include/asm-sh/shmin/shmin.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/shmin/shmin.h b/include/asm-sh/shmin/shmin.h new file mode 100644 index 000000000000..36ba138a81fb --- /dev/null +++ b/include/asm-sh/shmin/shmin.h @@ -0,0 +1,9 @@ +#ifndef __ASM_SH_SHMIN_H +#define __ASM_SH_SHMIN_H + +#define SHMIN_IO_BASE 0xb0000000UL + +#define SHMIN_NE_IRQ IRQ2_IRQ +#define SHMIN_NE_BASE 0x300 + +#endif -- cgit v1.2.1 From 91550f715b7f7707b5ab5b9b0cd455bda8505954 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:45:01 +0900 Subject: sh: Kill off the rest of the legacy rtc mess. With the new RTC class driver, we can get rid of most of the old left over cruft. Signed-off-by: Paul Mundt --- include/asm-sh/mc146818rtc.h | 169 ------------------------------------------- include/asm-sh/rtc.h | 21 ------ 2 files changed, 190 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h index adc6e67c6b75..0aee96a97330 100644 --- a/include/asm-sh/mc146818rtc.h +++ b/include/asm-sh/mc146818rtc.h @@ -4,173 +4,4 @@ #ifndef _ASM_MC146818RTC_H #define _ASM_MC146818RTC_H -#ifdef CONFIG_SH_MPC1211 -#undef _ASM_MC146818RTC_H -#undef RTC_IRQ -#include -#else - -#include - -#define RTC_ALWAYS_BCD 1 - -/* FIXME:RTC Interrupt feature is not implemented yet. */ -#undef RTC_IRQ -#define RTC_IRQ 0 - -#if defined(CONFIG_CPU_SH3) -#define RTC_PORT(n) (R64CNT+(n)*2) -#define CMOS_READ(addr) __CMOS_READ(addr,b) -#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,b) - -#elif defined(CONFIG_SH_SECUREEDGE5410) -#include - -#define RTC_PORT(n) SECUREEDGE_IOPORT_ADDR -#define CMOS_READ(addr) secureedge5410_cmos_read(addr) -#define CMOS_WRITE(val,addr) secureedge5410_cmos_write(val,addr) -extern unsigned char secureedge5410_cmos_read(int addr); -extern void secureedge5410_cmos_write(unsigned char val, int addr); - -#elif defined(CONFIG_CPU_SH4) -#define RTC_PORT(n) (R64CNT+(n)*4) -#define CMOS_READ(addr) __CMOS_READ(addr,w) -#define CMOS_WRITE(val,addr) __CMOS_WRITE(val,addr,w) -#endif - -#define __CMOS_READ(addr, s) ({ \ - unsigned char val=0, rcr1, rcr2, r64cnt, retry; \ - switch(addr) { \ - case RTC_SECONDS: \ - val = ctrl_inb(RSECCNT); \ - break; \ - case RTC_SECONDS_ALARM: \ - val = ctrl_inb(RSECAR); \ - break; \ - case RTC_MINUTES: \ - val = ctrl_inb(RMINCNT); \ - break; \ - case RTC_MINUTES_ALARM: \ - val = ctrl_inb(RMINAR); \ - break; \ - case RTC_HOURS: \ - val = ctrl_inb(RHRCNT); \ - break; \ - case RTC_HOURS_ALARM: \ - val = ctrl_inb(RHRAR); \ - break; \ - case RTC_DAY_OF_WEEK: \ - val = ctrl_inb(RWKCNT); \ - break; \ - case RTC_DAY_OF_MONTH: \ - val = ctrl_inb(RDAYCNT); \ - break; \ - case RTC_MONTH: \ - val = ctrl_inb(RMONCNT); \ - break; \ - case RTC_YEAR: \ - val = ctrl_in##s(RYRCNT); \ - break; \ - case RTC_REG_A: /* RTC_FREQ_SELECT */ \ - rcr2 = ctrl_inb(RCR2); \ - val = (rcr2 & RCR2_PESMASK) >> 4; \ - rcr1 = ctrl_inb(RCR1); \ - rcr1 = (rcr1 & (RCR1_CIE | RCR1_AIE)) | RCR1_AF;\ - retry = 0; \ - do { \ - ctrl_outb(rcr1, RCR1); /* clear CF */ \ - r64cnt = ctrl_inb(R64CNT); \ - } while((ctrl_inb(RCR1) & RCR1_CF) && retry++ < 1000);\ - r64cnt ^= RTC_BIT_INVERTED; \ - if(r64cnt == 0x7f || r64cnt == 0) \ - val |= RTC_UIP; \ - break; \ - case RTC_REG_B: /* RTC_CONTROL */ \ - rcr1 = ctrl_inb(RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - if(rcr1 & RCR1_CIE) val |= RTC_UIE; \ - if(rcr1 & RCR1_AIE) val |= RTC_AIE; \ - if(rcr2 & RCR2_PESMASK) val |= RTC_PIE; \ - if(!(rcr2 & RCR2_START))val |= RTC_SET; \ - val |= RTC_24H; \ - break; \ - case RTC_REG_C: /* RTC_INTR_FLAGS */ \ - rcr1 = ctrl_inb(RCR1); \ - rcr1 &= ~(RCR1_CF | RCR1_AF); \ - ctrl_outb(rcr1, RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - rcr2 &= ~RCR2_PEF; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_D: /* RTC_VALID */ \ - /* Always valid ... */ \ - val = RTC_VRT; \ - break; \ - default: \ - break; \ - } \ - val; \ -}) - -#define __CMOS_WRITE(val, addr, s) ({ \ - unsigned char rcr1,rcr2; \ - switch(addr) { \ - case RTC_SECONDS: \ - ctrl_outb(val, RSECCNT); \ - break; \ - case RTC_SECONDS_ALARM: \ - ctrl_outb(val, RSECAR); \ - break; \ - case RTC_MINUTES: \ - ctrl_outb(val, RMINCNT); \ - break; \ - case RTC_MINUTES_ALARM: \ - ctrl_outb(val, RMINAR); \ - break; \ - case RTC_HOURS: \ - ctrl_outb(val, RHRCNT); \ - break; \ - case RTC_HOURS_ALARM: \ - ctrl_outb(val, RHRAR); \ - break; \ - case RTC_DAY_OF_WEEK: \ - ctrl_outb(val, RWKCNT); \ - break; \ - case RTC_DAY_OF_MONTH: \ - ctrl_outb(val, RDAYCNT); \ - break; \ - case RTC_MONTH: \ - ctrl_outb(val, RMONCNT); \ - break; \ - case RTC_YEAR: \ - ctrl_out##s((ctrl_in##s(RYRCNT) & 0xff00) | (val & 0xff), RYRCNT);\ - break; \ - case RTC_REG_A: /* RTC_FREQ_SELECT */ \ - rcr2 = ctrl_inb(RCR2); \ - if((val & RTC_DIV_CTL) == RTC_DIV_RESET2) \ - rcr2 |= RCR2_RESET; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_B: /* RTC_CONTROL */ \ - rcr1 = (ctrl_inb(RCR1) & 0x99) | RCR1_AF; \ - if(val & RTC_AIE) rcr1 |= RCR1_AIE; \ - else rcr1 &= ~RCR1_AIE; \ - if(val & RTC_UIE) rcr1 |= RCR1_CIE; \ - else rcr1 &= ~RCR1_CIE; \ - ctrl_outb(rcr1, RCR1); \ - rcr2 = ctrl_inb(RCR2); \ - if(val & RTC_SET) rcr2 &= ~RCR2_START; \ - else rcr2 |= RCR2_START; \ - ctrl_outb(rcr2, RCR2); \ - break; \ - case RTC_REG_C: /* RTC_INTR_FLAGS */ \ - break; \ - case RTC_REG_D: /* RTC_VALID */ \ - break; \ - default: \ - break; \ - } \ -}) - -#endif /* CONFIG_SH_MPC1211 */ #endif /* _ASM_MC146818RTC_H */ diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h index 4c7be859c9c0..91aacc96151b 100644 --- a/include/asm-sh/rtc.h +++ b/include/asm-sh/rtc.h @@ -1,29 +1,8 @@ #ifndef _ASM_RTC_H #define _ASM_RTC_H -#ifdef __KERNEL__ -#include -#include - -extern void sh_rtc_gettimeofday(struct timespec *ts); -extern int sh_rtc_settimeofday(const time_t secs); extern void (*board_time_init)(void); extern void (*rtc_sh_get_time)(struct timespec *); extern int (*rtc_sh_set_time)(const time_t); -/* RCR1 Bits */ -#define RCR1_CF 0x80 /* Carry Flag */ -#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ -#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ -#define RCR1_AF 0x01 /* Alarm Flag */ - -/* RCR2 Bits */ -#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ -#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ -#define RCR2_RTCEN 0x08 /* ENable RTC */ -#define RCR2_ADJ 0x04 /* ADJustment (30-second) */ -#define RCR2_RESET 0x02 /* Reset bit */ -#define RCR2_START 0x01 /* Start bit */ - -#endif /* __KERNEL__ */ #endif /* _ASM_RTC_H */ -- cgit v1.2.1 From 781125ca58dfbd47635cfc0e408f1f9d7e10b227 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 17:52:19 +0900 Subject: sh: New atomic ops for SH-4A movli.l/movco.l SH-4A implements LL/SC instructions, so we implement a simple set of atomic operations using these. Signed-off-by: Paul Mundt --- include/asm-sh/atomic.h | 105 +++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 96 insertions(+), 9 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h index 049eb2dda6b6..8bdc1ba56f73 100644 --- a/include/asm-sh/atomic.h +++ b/include/asm-sh/atomic.h @@ -22,49 +22,110 @@ typedef struct { volatile int counter; } atomic_t; * forward to code at the end of this object's .text section, then * branch back to restart the operation. */ - -static __inline__ void atomic_add(int i, atomic_t * v) +static inline void atomic_add(int i, atomic_t *v) { +#ifdef CONFIG_CPU_SH4A + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_add \n" +" add %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" + : "=&z" (tmp), "=r" (&v->counter) + : "r" (i), "r" (&v->counter) + : "t"); +#else unsigned long flags; local_irq_save(flags); *(long *)v += i; local_irq_restore(flags); +#endif } -static __inline__ void atomic_sub(int i, atomic_t *v) +static inline void atomic_sub(int i, atomic_t *v) { +#ifdef CONFIG_CPU_SH4A + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_sub \n" +" sub %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" + : "=&z" (tmp), "=r" (&v->counter) + : "r" (i), "r" (&v->counter) + : "t"); +#else unsigned long flags; local_irq_save(flags); *(long *)v -= i; local_irq_restore(flags); +#endif } -static __inline__ int atomic_add_return(int i, atomic_t * v) +/* + * SH-4A note: + * + * We basically get atomic_xxx_return() for free compared with + * atomic_xxx(). movli.l/movco.l require r0 due to the instruction + * encoding, so the retval is automatically set without having to + * do any special work. + */ +static inline int atomic_add_return(int i, atomic_t *v) { - unsigned long temp, flags; + unsigned long temp; + +#ifdef CONFIG_CPU_SH4A + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_add_return \n" +" add %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" +" synco \n" + : "=&z" (temp), "=r" (&v->counter) + : "r" (i), "r" (&v->counter) + : "t"); +#else + unsigned long flags; local_irq_save(flags); temp = *(long *)v; temp += i; *(long *)v = temp; local_irq_restore(flags); +#endif return temp; } #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) -static __inline__ int atomic_sub_return(int i, atomic_t * v) +static inline int atomic_sub_return(int i, atomic_t *v) { - unsigned long temp, flags; + unsigned long temp; + +#ifdef CONFIG_CPU_SH4A + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_sub_return \n" +" sub %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" +" synco \n" + : "=&z" (temp), "=r" (&v->counter) + : "r" (i), "r" (&v->counter) + : "t"); +#else + unsigned long flags; local_irq_save(flags); temp = *(long *)v; temp -= i; *(long *)v = temp; local_irq_restore(flags); +#endif return temp; } @@ -119,22 +180,48 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) } #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) -static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) +static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) { +#ifdef CONFIG_CPU_SH4A + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_clear_mask \n" +" and %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" + : "=&z" (tmp), "=r" (&v->counter) + : "r" (~mask), "r" (&v->counter) + : "t"); +#else unsigned long flags; local_irq_save(flags); *(long *)v &= ~mask; local_irq_restore(flags); +#endif } -static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v) +static inline void atomic_set_mask(unsigned int mask, atomic_t *v) { +#ifdef CONFIG_CPU_SH4A + unsigned long tmp; + + __asm__ __volatile__ ( +"1: movli.l @%3, %0 ! atomic_set_mask \n" +" or %2, %0 \n" +" movco.l %0, @%3 \n" +" bf 1b \n" + : "=&z" (tmp), "=r" (&v->counter) + : "r" (mask), "r" (&v->counter) + : "t"); +#else unsigned long flags; local_irq_save(flags); *(long *)v |= mask; local_irq_restore(flags); +#endif } /* Atomic operations are already serializing on SH */ -- cgit v1.2.1 From 5a4053b23262afefa748e1e4c439931d4c27693b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:00:19 +0900 Subject: sh: Kill off dead boards. None of these have been maintained in years, and no one seems to be interested in doing so, so just get rid of them. Signed-off-by: Paul Mundt --- include/asm-sh/adx/io.h | 86 --------------------------- include/asm-sh/cat68701/io.h | 22 ------- include/asm-sh/cqreek/cqreek.h | 27 --------- include/asm-sh/dmida/io.h | 10 ---- include/asm-sh/harp/harp.h | 43 -------------- include/asm-sh/harp/io.h | 10 ---- include/asm-sh/overdrive/fpga.h | 15 ----- include/asm-sh/overdrive/gt64111.h | 109 ----------------------------------- include/asm-sh/overdrive/io.h | 39 ------------- include/asm-sh/overdrive/overdrive.h | 88 ---------------------------- include/asm-sh/sh2000/sh2000.h | 8 --- 11 files changed, 457 deletions(-) delete mode 100644 include/asm-sh/adx/io.h delete mode 100644 include/asm-sh/cat68701/io.h delete mode 100644 include/asm-sh/cqreek/cqreek.h delete mode 100644 include/asm-sh/dmida/io.h delete mode 100644 include/asm-sh/harp/harp.h delete mode 100644 include/asm-sh/harp/io.h delete mode 100644 include/asm-sh/overdrive/fpga.h delete mode 100644 include/asm-sh/overdrive/gt64111.h delete mode 100644 include/asm-sh/overdrive/io.h delete mode 100644 include/asm-sh/overdrive/overdrive.h delete mode 100644 include/asm-sh/sh2000/sh2000.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/adx/io.h b/include/asm-sh/adx/io.h deleted file mode 100644 index ab1225f1d557..000000000000 --- a/include/asm-sh/adx/io.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * include/asm-sh/io_adx.h - * - * Copyright (C) 2001 A&D Co., Ltd. - * - * This file may be copied or modified under the terms of the GNU - * General Public License. See linux/COPYING for more information. - * - * IO functions for an A&D ADX Board - */ - -#ifndef _ASM_SH_IO_ADX_H -#define _ASM_SH_IO_ADX_H - -#include - -extern unsigned char adx_inb(unsigned long port); -extern unsigned short adx_inw(unsigned long port); -extern unsigned int adx_inl(unsigned long port); - -extern void adx_outb(unsigned char value, unsigned long port); -extern void adx_outw(unsigned short value, unsigned long port); -extern void adx_outl(unsigned int value, unsigned long port); - -extern unsigned char adx_inb_p(unsigned long port); -extern void adx_outb_p(unsigned char value, unsigned long port); - -extern void adx_insb(unsigned long port, void *addr, unsigned long count); -extern void adx_insw(unsigned long port, void *addr, unsigned long count); -extern void adx_insl(unsigned long port, void *addr, unsigned long count); -extern void adx_outsb(unsigned long port, const void *addr, unsigned long count); -extern void adx_outsw(unsigned long port, const void *addr, unsigned long count); -extern void adx_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned char adx_readb(unsigned long addr); -extern unsigned short adx_readw(unsigned long addr); -extern unsigned int adx_readl(unsigned long addr); -extern void adx_writeb(unsigned char b, unsigned long addr); -extern void adx_writew(unsigned short b, unsigned long addr); -extern void adx_writel(unsigned int b, unsigned long addr); - -extern void * adx_ioremap(unsigned long offset, unsigned long size); -extern void adx_iounmap(void *addr); - -extern unsigned long adx_isa_port2addr(unsigned long offset); - -extern void setup_adx(void); -extern void init_adx_IRQ(void); - -#ifdef __WANT_IO_DEF - -#define __inb adx_inb -#define __inw adx_inw -#define __inl adx_inl -#define __outb adx_outb -#define __outw adx_outw -#define __outl adx_outl - -#define __inb_p adx_inb_p -#define __inw_p adx_inw -#define __inl_p adx_inl -#define __outb_p adx_outb_p -#define __outw_p adx_outw -#define __outl_p adx_outl - -#define __insb adx_insb -#define __insw adx_insw -#define __insl adx_insl -#define __outsb adx_outsb -#define __outsw adx_outsw -#define __outsl adx_outsl - -#define __readb adx_readb -#define __readw adx_readw -#define __readl adx_readl -#define __writeb adx_writeb -#define __writew adx_writew -#define __writel adx_writel - -#define __isa_port2addr adx_isa_port2addr -#define __ioremap adx_ioremap -#define __iounmap adx_iounmap - -#endif - -#endif /* _ASM_SH_IO_AANDD_H */ diff --git a/include/asm-sh/cat68701/io.h b/include/asm-sh/cat68701/io.h deleted file mode 100644 index 753b8466ad11..000000000000 --- a/include/asm-sh/cat68701/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-sh/io_cat68701.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * 2001 Yutarou Ebihar (ebihara@si-linux.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an AONE Corp. CAT-68701 SH7708 Borad - */ - -#ifndef _ASM_SH_IO_CAT68701_H -#define _ASM_SH_IO_CAT68701_H - -extern unsigned long cat68701_isa_port2addr(unsigned long offset); -extern int cat68701_irq_demux(int irq); - -extern void init_cat68701_IRQ(void); -extern void heartbeat_cat68701(void); - -#endif /* _ASM_SH_IO_CAT68701_H */ diff --git a/include/asm-sh/cqreek/cqreek.h b/include/asm-sh/cqreek/cqreek.h deleted file mode 100644 index 09aecc06693e..000000000000 --- a/include/asm-sh/cqreek/cqreek.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_SH_CQREEK_CQREEK_H -#define __ASM_SH_CQREEK_CQREEK_H - -#define BRIDGE_FEATURE 0x0002 - -#define BRIDGE_IDE_CTRL 0x0018 -#define BRIDGE_IDE_INTR_LVL 0x001A -#define BRIDGE_IDE_INTR_MASK 0x001C -#define BRIDGE_IDE_INTR_STAT 0x001E - -#define BRIDGE_ISA_CTRL 0x0028 -#define BRIDGE_ISA_INTR_LVL 0x002A -#define BRIDGE_ISA_INTR_MASK 0x002C -#define BRIDGE_ISA_INTR_STAT 0x002E - -/* arch/sh/boards/cqreek/setup.c */ -extern void setup_cqreek(void); - -/* arch/sh/boards/cqreek/irq.c */ -extern int cqreek_has_ide, cqreek_has_isa; -extern void init_cqreek_IRQ(void); - -/* arch/sh/boards/cqreek/io.c */ -extern unsigned long cqreek_port2addr(unsigned long port); - -#endif /* __ASM_SH_CQREEK_CQREEK_H */ - diff --git a/include/asm-sh/dmida/io.h b/include/asm-sh/dmida/io.h deleted file mode 100644 index 21bd416c01c3..000000000000 --- a/include/asm-sh/dmida/io.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_SH_DMIDA_IO_H -#define __ASM_SH_DMIDA_IO_H - -/* - * Nothing special here.. just use the generic cchip io routines. - */ -#include - -#endif /* __ASM_SH_DMIDA_IO_H */ - diff --git a/include/asm-sh/harp/harp.h b/include/asm-sh/harp/harp.h deleted file mode 100644 index b2fbcfae9940..000000000000 --- a/include/asm-sh/harp/harp.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2001 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Defintions applicable to the STMicroelectronics ST40STB1 HARP and - * compatible boards. - */ - -#if defined(CONFIG_SH_STB1_HARP) - -#define EPLD_BASE 0xa0800000 - -#define EPLD_LED (EPLD_BASE+0x000c0000) -#define EPLD_INTSTAT0 (EPLD_BASE+0x00200000) -#define EPLD_INTSTAT1 (EPLD_BASE+0x00240000) -#define EPLD_INTMASK0 (EPLD_BASE+0x00280000) -#define EPLD_INTMASK1 (EPLD_BASE+0x002c0000) -#define EPLD_PAGEADDR (EPLD_BASE+0x00300000) -#define EPLD_REVID1 (EPLD_BASE+0x00380000) -#define EPLD_REVID2 (EPLD_BASE+0x003c0000) - -#define EPLD_LED_ON 1 -#define EPLD_LED_OFF 0 - -#elif defined(CONFIG_SH_STB1_OVERDRIVE) - -#define EPLD_BASE 0xa7000000 - -#define EPLD_REVID (EPLD_BASE+0x00000000) -#define EPLD_LED (EPLD_BASE+0x00040000) -#define EPLD_INTMASK0 (EPLD_BASE+0x001c0000) -#define EPLD_INTMASK1 (EPLD_BASE+0x00200000) -#define EPLD_INTSTAT0 (EPLD_BASE+0x00240000) -#define EPLD_INTSTAT1 (EPLD_BASE+0x00280000) - -#define EPLD_LED_ON 0 -#define EPLD_LED_OFF 1 - -#else -#error Unknown board -#endif diff --git a/include/asm-sh/harp/io.h b/include/asm-sh/harp/io.h deleted file mode 100644 index 68f39e0b39de..000000000000 --- a/include/asm-sh/harp/io.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_SH_HARP_IO_H -#define __ASM_SH_HARP_IO_H - -/* - * Nothing special here.. just use the generic cchip io routines. - */ -#include - -#endif /* __ASM_SH_HARP_IO_H */ - diff --git a/include/asm-sh/overdrive/fpga.h b/include/asm-sh/overdrive/fpga.h deleted file mode 100644 index 1cd87992c124..000000000000 --- a/include/asm-sh/overdrive/fpga.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - */ - -#ifndef __FPGA_OD_H__ -#define __FPGA_OD_H__ - -/* This routine will program up the fpga which interfaces to the galileo */ -int init_overdrive_fpga(void); - -#endif diff --git a/include/asm-sh/overdrive/gt64111.h b/include/asm-sh/overdrive/gt64111.h deleted file mode 100644 index 01d58bc13a44..000000000000 --- a/include/asm-sh/overdrive/gt64111.h +++ /dev/null @@ -1,109 +0,0 @@ -#ifndef _GT64111_H_ -#define _GT64111_H_ - -#define MASTER_INTERFACE 0x0 -#define RAS10_LO_DEC_ADR 0x8 -#define RAS10_HI_DEC_ADR 0x10 -#define RAS32_LO_DEC_ADR 0x18 -#define RAS32_HI_DEC_ADR 0x20 -#define CS20_LO_DEC_ADR 0x28 -#define CS20_HI_DEC_ADR 0x30 -#define CS3_LO_DEC_ADR 0x38 -#define CS3_HI_DEC_ADR 0x40 -#define PCI_IO_LO_DEC_ADR 0x48 -#define PCI_IO_HI_DEC_ADR 0x50 -#define PCI_MEM0_LO_DEC_ADR 0x58 -#define PCI_MEM0_HI_DEC_ADR 0x60 -#define INTERNAL_SPACE_DEC 0x68 -#define BUS_ERR_ADR_LO_CPU 0x70 -#define READONLY0 0x78 -#define PCI_MEM1_LO_DEC_ADR 0x80 -#define PCI_MEM1_HI_DEC_ADR 0x88 -#define RAS0_LO_DEC_ADR 0x400 -#define RAS0_HI_DEC_ADR 0x404 -#define RAS1_LO_DEC_ADR 0x408 -#define RAS1_HI_DEC_ADR 0x40c -#define RAS2_LO_DEC_ADR 0x410 -#define RAS2_HI_DEC_ADR 0x414 -#define RAS3_LO_DEC_ADR 0x418 -#define RAS3_HI_DEC_ADR 0x41c -#define DEV_CS0_LO_DEC_ADR 0x420 -#define DEV_CS0_HI_DEC_ADR 0x424 -#define DEV_CS1_LO_DEC_ADR 0x428 -#define DEV_CS1_HI_DEC_ADR 0x42c -#define DEV_CS2_LO_DEC_ADR 0x430 -#define DEV_CS2_HI_DEC_ADR 0x434 -#define DEV_CS3_LO_DEC_ADR 0x438 -#define DEV_CS3_HI_DEC_ADR 0x43c -#define DEV_BOOTCS_LO_DEC_ADR 0x440 -#define DEV_BOOTCS_HI_DEC_ADR 0x444 -#define DEV_ADR_DEC_ERR 0x470 -#define DRAM_CFG 0x448 -#define DRAM_BANK0_PARMS 0x44c -#define DRAM_BANK1_PARMS 0x450 -#define DRAM_BANK2_PARMS 0x454 -#define DRAM_BANK3_PARMS 0x458 -#define DEV_BANK0_PARMS 0x45c -#define DEV_BANK1_PARMS 0x460 -#define DEV_BANK2_PARMS 0x464 -#define DEV_BANK3_PARMS 0x468 -#define DEV_BOOT_BANK_PARMS 0x46c -#define CH0_DMA_BYTECOUNT 0x800 -#define CH1_DMA_BYTECOUNT 0x804 -#define CH2_DMA_BYTECOUNT 0x808 -#define CH3_DMA_BYTECOUNT 0x80c -#define CH0_DMA_SRC_ADR 0x810 -#define CH1_DMA_SRC_ADR 0x814 -#define CH2_DMA_SRC_ADR 0x818 -#define CH3_DMA_SRC_ADR 0x81c -#define CH0_DMA_DST_ADR 0x820 -#define CH1_DMA_DST_ADR 0x824 -#define CH2_DMA_DST_ADR 0x828 -#define CH3_DMA_DST_ADR 0x82c -#define CH0_NEXT_REC_PTR 0x830 -#define CH1_NEXT_REC_PTR 0x834 -#define CH2_NEXT_REC_PTR 0x838 -#define CH3_NEXT_REC_PTR 0x83c -#define CH0_CTRL 0x840 -#define CH1_CTRL 0x844 -#define CH2_CTRL 0x848 -#define CH3_CTRL 0x84c -#define DMA_ARBITER 0x860 -#define TIMER0 0x850 -#define TIMER1 0x854 -#define TIMER2 0x858 -#define TIMER3 0x85c -#define TIMER_CTRL 0x864 -#define PCI_CMD 0xc00 -#define PCI_TIMEOUT 0xc04 -#define PCI_RAS10_BANK_SIZE 0xc08 -#define PCI_RAS32_BANK_SIZE 0xc0c -#define PCI_CS20_BANK_SIZE 0xc10 -#define PCI_CS3_BANK_SIZE 0xc14 -#define PCI_SERRMASK 0xc28 -#define PCI_INTACK 0xc34 -#define PCI_BAR_EN 0xc3c -#define PCI_CFG_ADR 0xcf8 -#define PCI_CFG_DATA 0xcfc -#define PCI_INTCAUSE 0xc18 -#define PCI_MAST_MASK 0xc1c -#define PCI_PCIMASK 0xc24 -#define BAR_ENABLE_ADR 0xc3c - -/* These are config registers, accessible via PCI space */ -#define PCI_CONFIG_RAS10_BASE_ADR 0x010 -#define PCI_CONFIG_RAS32_BASE_ADR 0x014 -#define PCI_CONFIG_CS20_BASE_ADR 0x018 -#define PCI_CONFIG_CS3_BASE_ADR 0x01c -#define PCI_CONFIG_INT_REG_MM_ADR 0x020 -#define PCI_CONFIG_INT_REG_IO_ADR 0x024 -#define PCI_CONFIG_BOARD_VENDOR 0x02c -#define PCI_CONFIG_ROM_ADR 0x030 -#define PCI_CONFIG_INT_PIN_LINE 0x03c - - - - - -#endif - diff --git a/include/asm-sh/overdrive/io.h b/include/asm-sh/overdrive/io.h deleted file mode 100644 index 0dba700e9643..000000000000 --- a/include/asm-sh/overdrive/io.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-sh/io_od.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an STMicroelectronics Overdrive - */ - -#ifndef _ASM_SH_IO_OD_H -#define _ASM_SH_IO_OD_H - -extern unsigned char od_inb(unsigned long port); -extern unsigned short od_inw(unsigned long port); -extern unsigned int od_inl(unsigned long port); - -extern void od_outb(unsigned char value, unsigned long port); -extern void od_outw(unsigned short value, unsigned long port); -extern void od_outl(unsigned int value, unsigned long port); - -extern unsigned char od_inb_p(unsigned long port); -extern unsigned short od_inw_p(unsigned long port); -extern unsigned int od_inl_p(unsigned long port); -extern void od_outb_p(unsigned char value, unsigned long port); -extern void od_outw_p(unsigned short value, unsigned long port); -extern void od_outl_p(unsigned int value, unsigned long port); - -extern void od_insb(unsigned long port, void *addr, unsigned long count); -extern void od_insw(unsigned long port, void *addr, unsigned long count); -extern void od_insl(unsigned long port, void *addr, unsigned long count); -extern void od_outsb(unsigned long port, const void *addr, unsigned long count); -extern void od_outsw(unsigned long port, const void *addr, unsigned long count); -extern void od_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long od_isa_port2addr(unsigned long offset); - -#endif /* _ASM_SH_IO_OD_H */ diff --git a/include/asm-sh/overdrive/overdrive.h b/include/asm-sh/overdrive/overdrive.h deleted file mode 100644 index fc746c244f83..000000000000 --- a/include/asm-sh/overdrive/overdrive.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (C) 2000 David J. Mckay (david.mckay@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - */ - - -#ifndef __OVERDRIVE_H__ -#define __OVERDRIVE_H__ - -#define OVERDRIVE_INT_CT 0xa3a00000 -#define OVERDRIVE_INT_DT 0xa3b00000 - -#define OVERDRIVE_CTRL 0xa3000000 - -/* Shoving all these bits into the same register is not a good idea. - * As soon as I get a spare moment, I'll change the FPGA and put each - * bit in a separate register - */ - -#define VALID_CTRL_BITS 0x1f - -#define ENABLE_RS232_MASK 0x1e -#define DISABLE_RS232_BIT 0x01 - -#define ENABLE_NMI_MASK 0x1d -#define DISABLE_NMI_BIT 0x02 - -#define RESET_PCI_MASK 0x1b -#define ENABLE_PCI_BIT 0x04 - -#define ENABLE_LED_MASK 0x17 -#define DISABLE_LED_BIT 0x08 - -#define RESET_FPGA_MASK 0x0f -#define ENABLE_FPGA_BIT 0x10 - - -#define FPGA_DCLK_ADDRESS 0xA3C00000 - -#define FPGA_DATA 0x01 /* W */ -#define FPGA_CONFDONE 0x02 /* R */ -#define FPGA_NOT_STATUS 0x04 /* R */ -#define FPGA_INITDONE 0x08 /* R */ - -#define FPGA_TIMEOUT 100000 - - -/* Interrupts for the overdrive. Note that these numbers have - * nothing to do with the actual IRQ numbers they appear on, - * this is all programmable. This is simply the position in the - * INT_CT register. - */ - -#define OVERDRIVE_PCI_INTA 0 -#define OVERDRIVE_PCI_INTB 1 -#define OVERDRIVE_PCI_INTC 2 -#define OVERDRIVE_PCI_INTD 3 -#define OVERDRIVE_GALILEO_INT 4 -#define OVERDRIVE_GALILEO_LOCAL_INT 5 -#define OVERDRIVE_AUDIO_INT 6 -#define OVERDRIVE_KEYBOARD_INT 7 - -/* Which Linux IRQ should we assign to each interrupt source? */ -#define OVERDRIVE_PCI_IRQ1 2 -#ifdef CONFIG_HACKED_NE2K -#define OVERDRIVE_PCI_IRQ2 7 -#else -#define OVERDRIVE_PCI_IRQ2 2 -#undef OVERDRIVE_PCI_INTB -#define OVERDRIVE_PCI_INTB OVERDRIVE_PCI_INTA - -#endif - -/* Put the ESS solo audio chip on IRQ 4 */ -#define OVERDRIVE_ESS_IRQ 4 - -/* Where the memory behind the PCI bus appears */ -#define PCI_DRAM_BASE 0xb7000000 -#define PCI_DRAM_SIZE (16*1024*1024) -#define PCI_DRAM_FINISH (PCI_DRAM_BASE+PCI_DRAM_SIZE-1) - -/* Where the IO region appears in the memory */ -#define PCI_GTIO_BASE 0xb8000000 - -#endif diff --git a/include/asm-sh/sh2000/sh2000.h b/include/asm-sh/sh2000/sh2000.h deleted file mode 100644 index 8d547324d59a..000000000000 --- a/include/asm-sh/sh2000/sh2000.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_SH2000_SH2000_H -#define __ASM_SH_SH2000_SH2000_H - -/* arch/sh/boards/sh2000/setup.c */ -extern int setup_sh2000(void); - -#endif /* __ASM_SH_SH2000_SH2000_H */ - -- cgit v1.2.1 From bc8fb5d0471473f775378d09db712dcb8eeece75 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:09:34 +0900 Subject: sh: Solution Engine SH7343 board support. This adds support for the SE7343 board. Signed-off-by: Paul Mundt --- include/asm-sh/irq.h | 2 ++ include/asm-sh/se7343.h | 82 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 include/asm-sh/se7343.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 00886f9adb4d..dd05e102fc0e 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -316,6 +316,8 @@ # define OFFCHIP_NR_IRQS 4 #elif defined(CONFIG_SH_R7780RP) # define OFFCHIP_NR_IRQS 16 +#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) +# define OFFCHIP_NR_IRQS 12 #elif defined(CONFIG_SH_UNKNOWN) # define OFFCHIP_NR_IRQS 16 /* Must also be last */ #else diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h new file mode 100644 index 000000000000..e7914a54aa96 --- /dev/null +++ b/include/asm-sh/se7343.h @@ -0,0 +1,82 @@ +#ifndef __ASM_SH_HITACHI_SE7343_H +#define __ASM_SH_HITACHI_SE7343_H + +/* + * include/asm-sh/se/se7343.h + * + * Copyright (C) 2003 Takashi Kusuda + * + * SH-Mobile SolutionEngine 7343 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0C00000 /* LED */ +#define LED_SHIFT 0 +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */ +#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */ +#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#define __IO_PREFIX sh7343se +#include + +/* External Multiplexed interrupts */ +#define PC_IRQ0 OFFCHIP_IRQ_BASE +#define PC_IRQ1 (PC_IRQ0 + 1) +#define PC_IRQ2 (PC_IRQ1 + 1) +#define PC_IRQ3 (PC_IRQ2 + 1) + +#define EXT_IRQ0 (PC_IRQ3 + 1) +#define EXT_IRQ1 (EXT_IRQ0 + 1) +#define EXT_IRQ2 (EXT_IRQ1 + 1) +#define EXT_IRQ3 (EXT_IRQ2 + 1) + +#define USB_IRQ0 (EXT_IRQ3 + 1) +#define USB_IRQ1 (USB_IRQ0 + 1) + +#define UART_IRQ0 (USB_IRQ1 + 1) +#define UART_IRQ1 (UART_IRQ0 + 1) + +#endif /* __ASM_SH_HITACHI_SE7343_H */ -- cgit v1.2.1 From 2c7834a6f15fe6c50ed4766f1bb6f9183b9e2740 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:17:31 +0900 Subject: sh: machvec rework. Some more machvec overhauling and setup code cleanup. Kill off get_system_type() and platform_setup(), we can do these both through the machvec. While we're add it, kill off more useless mach.c's and drop some legacy cruft from setup.c. Signed-off-by: Paul Mundt --- include/asm-sh/machvec.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 550501fa4fed..70389b72ffef 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -8,17 +8,18 @@ */ #ifndef _ASM_SH_MACHVEC_H -#define _ASM_SH_MACHVEC_H 1 +#define _ASM_SH_MACHVEC_H #include #include - #include #include struct device; struct sh_machine_vector { + void (*mv_setup)(char **cmdline_p); + const char *mv_name; int mv_nr_irqs; u8 (*mv_inb)(unsigned long); @@ -65,4 +66,6 @@ struct sh_machine_vector { extern struct sh_machine_vector sh_mv; +#define get_system_type() sh_mv.mv_name + #endif /* _ASM_SH_MACHVEC_H */ -- cgit v1.2.1 From d153ea88dccf003173315b5d21acabebb897fb4a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:20:16 +0900 Subject: sh: stack debugging support. This adds a DEBUG_STACK_USAGE and DEBUG_STACKOVERFLOW for SH. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 2 +- include/asm-sh/thread_info.h | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index e9135532d00c..888d6fe0030e 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -16,7 +16,7 @@ /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 -#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define PTE_MASK PAGE_MASK diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 5eb874b065a6..605259f88113 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -29,6 +29,8 @@ struct thread_info { #endif #define PREEMPT_ACTIVE 0x10000000 +#define THREAD_SIZE (PAGE_SIZE * 2) +#define STACK_WARN (THREAD_SIZE / 8) /* * macros/functions for gaining access to the thread information structure @@ -50,8 +52,6 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) #define init_stack (init_thread_union.stack) -#define THREAD_SIZE (2*PAGE_SIZE) - /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { @@ -73,8 +73,12 @@ static inline struct thread_info *current_thread_info(void) } /* thread information allocation */ -#define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) +#else +#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL) +#endif +#define free_thread_info(ti) kfree(ti) #else /* !__ASSEMBLY__ */ -- cgit v1.2.1 From a6a31139897a5e539efe7ad3b7bd351fa9673ce8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:22:14 +0900 Subject: sh: Add support for 4K stacks. This enables support for 4K stacks on SH. Currently this depends on DEBUG_KERNEL, but likely all boards will switch to this as the default in the future. Signed-off-by: Paul Mundt --- include/asm-sh/irq.h | 9 +++++++++ include/asm-sh/thread_info.h | 12 +++++++++++- 2 files changed, 20 insertions(+), 1 deletion(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index dd05e102fc0e..0e5f365aff70 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -719,6 +719,15 @@ static inline int generic_irq_demux(int irq) #define irq_canonicalize(irq) (irq) #define irq_demux(irq) __irq_demux(sh_mv.mv_irq_demux(irq)) +#ifdef CONFIG_4KSTACKS +extern void irq_ctx_init(int cpu); +extern void irq_ctx_exit(int cpu); +# define __ARCH_HAS_DO_SOFTIRQ +#else +# define irq_ctx_init(cpu) do { } while (0) +# define irq_ctx_exit(cpu) do { } while (0) +#endif + #if defined(CONFIG_CPU_SUBTYPE_SH73180) #include #endif diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 605259f88113..3ebc3f9039eb 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -9,8 +9,8 @@ * Copyright (C) 2002 David Howells (dhowells@redhat.com) * - Incorporating suggestions made by Linus Torvalds and Dave Miller */ - #ifdef __KERNEL__ +#include #ifndef __ASSEMBLY__ #include @@ -23,13 +23,20 @@ struct thread_info { int preempt_count; /* 0 => preemptable, <0 => BUG */ mm_segment_t addr_limit; /* thread address space */ struct restart_block restart_block; + unsigned long previous_sp; /* sp of previous stack in case + of nested IRQ stacks */ __u8 supervisor_stack[0]; }; #endif #define PREEMPT_ACTIVE 0x10000000 + +#ifdef CONFIG_4KSTACKS +#define THREAD_SIZE (PAGE_SIZE) +#else #define THREAD_SIZE (PAGE_SIZE * 2) +#endif #define STACK_WARN (THREAD_SIZE / 8) /* @@ -52,6 +59,9 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) #define init_stack (init_thread_union.stack) +/* how to get the current stack pointer from C */ +register unsigned long current_stack_pointer asm("r15") __attribute_used__; + /* how to get the thread information struct from C */ static inline struct thread_info *current_thread_info(void) { -- cgit v1.2.1 From 315bb96824149614efe4844ded077a13fc908880 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:22:53 +0900 Subject: sh: CPU flags in AT_HWCAP in ELF auxvt. Encode processor flags in AT_HWCAP in the ELF auxiliary vector. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-features.h | 15 +++++++++++++++ include/asm-sh/elf.h | 10 ++++++---- include/asm-sh/processor.h | 12 +----------- 3 files changed, 22 insertions(+), 15 deletions(-) create mode 100644 include/asm-sh/cpu-features.h (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h new file mode 100644 index 000000000000..e398947ec01d --- /dev/null +++ b/include/asm-sh/cpu-features.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SH_CPU_FEATURES_H +#define __ASM_SH_CPU_FEATURES_H + +/* + * Processor flags + */ +#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ +#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ +#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ +#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ +#define CPU_HAS_PTEA 0x0020 /* PTEA register */ +#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ + +#endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index 1b63dfeea4f2..cc8e5e767345 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -1,6 +1,11 @@ #ifndef __ASM_SH_ELF_H #define __ASM_SH_ELF_H +#include +#include +#include +#include + /* SH relocation types */ #define R_SH_NONE 0 #define R_SH_DIR32 1 @@ -46,9 +51,6 @@ * ELF register definitions.. */ -#include -#include - typedef unsigned long elf_greg_t; #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) @@ -91,7 +93,7 @@ typedef struct user_fpu_struct elf_fpregset_t; instruction set this CPU supports. This could be done in user space, but it's not easy, and we've already done it here. */ -#define ELF_HWCAP (0) +#define ELF_HWCAP (boot_cpu_data.flags) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 3b3ef4f2bf31..bdd472705546 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -14,6 +14,7 @@ #include #include #include +#include /* * Default implementation of macro that returns current @@ -127,17 +128,6 @@ union sh_fpu_union { struct sh_fpu_soft_struct soft; }; -/* - * Processor flags - */ - -#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ -#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ -#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ -#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ -#define CPU_HAS_PTEA 0x0020 /* PTEA register */ - struct thread_struct { unsigned long sp; unsigned long pc; -- cgit v1.2.1 From 2220d164933a8776d1336c814e3c2e5573256d34 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:24:28 +0900 Subject: sh: Report movli.l/movco.l capabilities. Add llsc to cpu_flags[] and comment cpu-features.h. Signed-off-by: Jamie Lenehan Signed-off-by: Paul Mundt --- include/asm-sh/cpu-features.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index e398947ec01d..e1260aae3ee3 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -3,6 +3,14 @@ /* * Processor flags + * + * Note: When adding a new flag, keep cpu_flags[] in + * arch/sh/kernel/setup.c in sync so symbolic name + * mapping of the processor flags has a chance of being + * reasonably accurate. + * + * These flags are also available through the ELF + * auxiliary vector as AT_HWCAP. */ #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -- cgit v1.2.1 From 05ae91585167410dadd1bc8f2e207a062e638a16 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:25:24 +0900 Subject: sh: Optimized readsl()/writesl() support. Implement optimized copies of readsl()/writesl(). Signed-off-by: Paul Mundt --- include/asm-sh/io.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 377160b86295..ed12d38e8c00 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -107,6 +107,9 @@ #define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) #define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) +void __raw_writesl(unsigned long addr, const void *data, int longlen); +void __raw_readsl(unsigned long addr, void *data, int longlen); + /* * The platform header files may define some of these macros to use * the inlined versions where appropriate. These macros may also be @@ -132,6 +135,9 @@ # define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) #endif +#define writesl __raw_writesl +#define readsl __raw_readsl + #define readb_relaxed(a) readb(a) #define readw_relaxed(a) readw(a) #define readl_relaxed(a) readl(a) -- cgit v1.2.1 From 9d549a7d8ef71f684a35cf1e438543957cf81d12 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:26:05 +0900 Subject: sh: Update kexec support for API changes. This was falling a bit behind.. Signed-off-by: Paul Mundt --- include/asm-sh/kexec.h | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h index a5f85e9e428d..9d235af20cdd 100644 --- a/include/asm-sh/kexec.h +++ b/include/asm-sh/kexec.h @@ -25,11 +25,8 @@ #define MAX_NOTE_BYTES 1024 -#ifndef __ASSEMBLY__ - -extern void machine_shutdown(void); -extern void *crash_notes; - -#endif /* __ASSEMBLY__ */ +/* Provide a dummy definition to avoid build failures. */ +static inline void crash_setup_regs(struct pt_regs *newregs, + struct pt_regs *oldregs) { } #endif /* _SH_KEXEC_H */ -- cgit v1.2.1 From 72c35543f8cf1316773ffbd9619575bb84ac44fb Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:27:43 +0900 Subject: sh: Support for L2 cache on newer SH-4A CPUs. This implements preliminary support for the L2 caches found on newer SH-4A CPUs. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-features.h | 1 + include/asm-sh/processor.h | 9 +++++---- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h index e1260aae3ee3..4bccd7c032f9 100644 --- a/include/asm-sh/cpu-features.h +++ b/include/asm-sh/cpu-features.h @@ -19,5 +19,6 @@ #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ +#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ #endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index bdd472705546..b7cba4e91a72 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -54,14 +54,15 @@ enum cpu_type { }; struct sh_cpuinfo { - enum cpu_type type; + unsigned int type; unsigned long loops_per_jiffy; - struct cache_info icache; - struct cache_info dcache; + struct cache_info icache; /* Primary I-cache */ + struct cache_info dcache; /* Primary D-cache */ + struct cache_info scache; /* Secondary cache */ unsigned long flags; -}; +} __attribute__ ((aligned(SMP_CACHE_BYTES))); extern struct sh_cpuinfo boot_cpu_data; -- cgit v1.2.1 From 8c12b5dc13bf8516303a8224ab4e9708b33d5b00 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:31:06 +0900 Subject: sh: Clean up PAGE_SIZE definition for assembly use. We want to be able to use PAGE_SIZE all over the place, this is the same approach adopted by other architectures.. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-sh') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 888d6fe0030e..acf6977b4042 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -16,7 +16,13 @@ /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 + +#ifdef __ASSEMBLY__ #define PAGE_SIZE (1 << PAGE_SHIFT) +#else +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#endif + #define PAGE_MASK (~(PAGE_SIZE-1)) #define PTE_MASK PAGE_MASK -- cgit v1.2.1 From 19f9a34f87c48bbd270d617d1c986d0c23866a1a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:33:49 +0900 Subject: sh: Initial vsyscall page support. This implements initial support for the vsyscall page on SH. At the moment we leave it configurable due to having nommu to support from the same code base. We hook it up for the signal trampoline return at present, with more to be added later, once uClibc catches up. Signed-off-by: Paul Mundt --- include/asm-sh/auxvec.h | 14 ++++++++++++++ include/asm-sh/elf.h | 20 ++++++++++++++++++++ include/asm-sh/mmu.h | 7 ++++++- include/asm-sh/mmu_context.h | 8 ++++---- include/asm-sh/page.h | 5 +++++ include/asm-sh/processor.h | 6 ++++++ 6 files changed, 55 insertions(+), 5 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h index fc21e4db5881..1b6916e63e90 100644 --- a/include/asm-sh/auxvec.h +++ b/include/asm-sh/auxvec.h @@ -1,4 +1,18 @@ #ifndef __ASM_SH_AUXVEC_H #define __ASM_SH_AUXVEC_H +/* + * Architecture-neutral AT_ values in 0-17, leave some room + * for more of them. + */ + +#ifdef CONFIG_VSYSCALL +/* + * Only define this in the vsyscall case, the entry point to + * the vsyscall page gets placed here. The kernel will attempt + * to build a gate VMA we don't care about otherwise.. + */ +#define AT_SYSINFO_EHDR 33 +#endif + #endif /* __ASM_SH_AUXVEC_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index cc8e5e767345..3a07ab40ac4d 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -121,4 +121,24 @@ extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) #endif +#ifdef CONFIG_VSYSCALL +/* vDSO has arch_setup_additional_pages */ +#define ARCH_HAS_SETUP_ADDITIONAL_PAGES +struct linux_binprm; +extern int arch_setup_additional_pages(struct linux_binprm *bprm, + int executable_stack); + +extern unsigned int vdso_enabled; +extern void __kernel_vsyscall; + +#define VDSO_BASE ((unsigned long)current->mm->context.vdso) +#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) + +#define ARCH_DLINFO \ +do { \ + if (vdso_enabled) \ + NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \ +} while (0) +#endif /* CONFIG_VSYSCALL */ + #endif /* __ASM_SH_ELF_H */ diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index 6383dc84501e..cf47df79bb94 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -11,7 +11,12 @@ typedef struct { #else /* Default "unsigned long" context */ -typedef unsigned long mm_context_t; +typedef unsigned long mm_context_id_t; + +typedef struct { + mm_context_id_t id; + void *vdso; +} mm_context_t; #endif /* CONFIG_MMU */ diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index 87678ba8d6b6..c7088efe579a 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -49,7 +49,7 @@ get_mmu_context(struct mm_struct *mm) unsigned long mc = mmu_context_cache; /* Check if we have old version of context. */ - if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) + if (((mm->context.id ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) /* It's up to date, do nothing */ return; @@ -68,7 +68,7 @@ get_mmu_context(struct mm_struct *mm) if (!mc) mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; } - mm->context = mc; + mm->context.id = mc; } /* @@ -78,7 +78,7 @@ get_mmu_context(struct mm_struct *mm) static __inline__ int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { - mm->context = NO_CONTEXT; + mm->context.id = NO_CONTEXT; return 0; } @@ -123,7 +123,7 @@ static __inline__ unsigned long get_asid(void) static __inline__ void activate_context(struct mm_struct *mm) { get_mmu_context(mm); - set_asid(mm->context & MMU_CONTEXT_ASID_MASK); + set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK); } /* MMU_TTB can be used for optimizing the fault handling. diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index acf6977b4042..3d8dae31a6f6 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -117,5 +117,10 @@ typedef struct { unsigned long pgprot; } pgprot_t; #include #include +/* vDSO support */ +#ifdef CONFIG_VSYSCALL +#define __HAVE_ARCH_GATE_AREA +#endif + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PAGE_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index b7cba4e91a72..474773853cd1 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -276,5 +276,11 @@ static inline void prefetch(void *x) #define prefetchw(x) prefetch(x) #endif +#ifdef CONFIG_VSYSCALL +extern int vsyscall_init(void); +#else +#define vsyscall_init() do { } while (0) +#endif + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_H */ -- cgit v1.2.1 From 87b0ef91b6f27c07bf7dcce8584437481f473092 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:34:41 +0900 Subject: sh: dma-mapping compile fixes. Silly bug, make it build again.. Signed-off-by: Paul Mundt --- include/asm-sh/dma-mapping.h | 42 +++++++++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 17 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index 124968f9866e..56cd4b977232 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -141,25 +141,35 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, } } -static void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) - __attribute__ ((alias("dma_sync_single"))); +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) +{ + dma_sync_single(dev, dma_handle, size, dir); +} + +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, + size_t size, + enum dma_data_direction dir) +{ + dma_sync_single(dev, dma_handle, size, dir); +} -static void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, size_t size, +static inline void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nelems, enum dma_data_direction dir) - __attribute__ ((alias("dma_sync_single"))); +{ + dma_sync_sg(dev, sg, nelems, dir); +} -static void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) - __attribute__ ((alias("dma_sync_sg"))); +static inline void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction dir) +{ + dma_sync_sg(dev, sg, nelems, dir); +} -static void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) - __attribute__ ((alias("dma_sync_sg"))); static inline int dma_get_cache_alignment(void) { @@ -174,6 +184,4 @@ static inline int dma_mapping_error(dma_addr_t dma_addr) { return dma_addr == 0; } - #endif /* __ASM_SH_DMA_MAPPING_H */ - -- cgit v1.2.1 From f3c2575818fab45f8609e4aef2e43ab02b3a142e Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 27 Sep 2006 18:36:17 +0900 Subject: sh: Calculate shm alignment at runtime. Set the SHM alignment at runtime, based off of probed cache desc. Optimize get_unmapped_area() to only colour align shared mappings. Signed-off-by: Paul Mundt --- include/asm-sh/cacheflush.h | 2 ++ include/asm-sh/cpu-sh3/cacheflush.h | 8 -------- include/asm-sh/cpu-sh4/cacheflush.h | 3 --- include/asm-sh/page.h | 2 ++ include/asm-sh/pgtable.h | 2 -- 5 files changed, 4 insertions(+), 13 deletions(-) (limited to 'include/asm-sh') diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h index 92930b4a40d4..07f62ec9ff0c 100644 --- a/include/asm-sh/cacheflush.h +++ b/include/asm-sh/cacheflush.h @@ -28,5 +28,7 @@ extern void __flush_invalidate_region(void *start, int size); memcpy(dst, src, len); \ } while (0) +#define HAVE_ARCH_UNMAPPED_AREA + #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h index 97f5a64c2ab8..03fde97a7fd0 100644 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ b/include/asm-sh/cpu-sh3/cacheflush.h @@ -64,12 +64,4 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define p3_cache_init() do { } while (0) -/* - * We provide our own get_unmapped_area to avoid cache aliasing issues - * on SH7705 with a 32KB cache, and to page align addresses in the - * non-aliasing case. - */ -#define HAVE_ARCH_UNMAPPED_AREA - #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ - diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index a95fc951aff6..515fd574267c 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -39,9 +39,6 @@ void p3_cache_init(void); #define PG_mapped PG_arch_1 -/* We provide our own get_unmapped_area to avoid cache alias issue */ -#define HAVE_ARCH_UNMAPPED_AREA - #ifdef CONFIG_MMU extern int remap_area_pages(unsigned long addr, unsigned long phys_addr, unsigned long size, unsigned long flags); diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 3d8dae31a6f6..ca8b26d90475 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -44,6 +44,8 @@ extern void (*clear_page)(void *to); extern void (*copy_page)(void *to, void *from); +extern unsigned long shm_align_mask; + #ifdef CONFIG_MMU extern void clear_page_slow(void *to); extern void copy_page_slow(void *to, void *from); diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 41c559d8ba87..2c8682ad1012 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -340,6 +340,4 @@ extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t #include #endif /* !__ASSEMBLY__ */ - #endif /* __ASM_SH_PAGE_H */ - -- cgit v1.2.1