From aa5452f54b9f21213364baed25a0f8241aa09050 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 25 Apr 2019 17:34:43 +0200 Subject: phy: tegra: xusb: Add Tegra124 PLL power supplies The Tegra124 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding Acked-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/tegra/xusb-tegra124.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/phy/tegra') diff --git a/drivers/phy/tegra/xusb-tegra124.c b/drivers/phy/tegra/xusb-tegra124.c index c45cbedc6634..254592c47b00 100644 --- a/drivers/phy/tegra/xusb-tegra124.c +++ b/drivers/phy/tegra/xusb-tegra124.c @@ -1721,6 +1721,13 @@ static const struct tegra_xusb_padctl_ops tegra124_xusb_padctl_ops = { .hsic_set_idle = tegra124_hsic_set_idle, }; +static const char * const tegra124_xusb_padctl_supply_names[] = { + "avdd-pll-utmip", + "avdd-pll-erefe", + "avdd-pex-pll", + "hvdd-pex-pll-e", +}; + const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = { .num_pads = ARRAY_SIZE(tegra124_pads), .pads = tegra124_pads, @@ -1743,6 +1750,8 @@ const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = { }, }, .ops = &tegra124_xusb_padctl_ops, + .supply_names = tegra124_xusb_padctl_supply_names, + .num_supplies = ARRAY_SIZE(tegra124_xusb_padctl_supply_names), }; EXPORT_SYMBOL_GPL(tegra124_xusb_padctl_soc); -- cgit v1.2.1