From cb8bb9cedb6015eafd56ef9e9c5b2c216e8e7960 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:07 +1000 Subject: drm/nouveau/tmr: cosmetic changes This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c') diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c index 754284feae91..f18b75b883ac 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c @@ -237,7 +237,7 @@ nvkm_pgr_vstatus_print(struct nv50_gr_priv *priv, int r, static int g84_gr_tlb_flush(struct nvkm_engine *engine) { - struct nvkm_timer *ptimer = nvkm_timer(engine); + struct nvkm_timer *tmr = nvkm_timer(engine); struct nv50_gr_priv *priv = (void *)engine; bool idle, timeout = false; unsigned long flags; @@ -247,7 +247,7 @@ g84_gr_tlb_flush(struct nvkm_engine *engine) spin_lock_irqsave(&priv->lock, flags); nv_mask(priv, 0x400500, 0x00000001, 0x00000000); - start = ptimer->read(ptimer); + start = tmr->read(tmr); do { idle = true; @@ -266,7 +266,7 @@ g84_gr_tlb_flush(struct nvkm_engine *engine) idle = false; } } while (!idle && - !(timeout = ptimer->read(ptimer) - start > 2000000000)); + !(timeout = tmr->read(tmr) - start > 2000000000)); if (timeout) { nv_error(priv, "PGRAPH TLB flush idle timeout fail\n"); -- cgit v1.2.1