From 419b1b7ae13ed0518032ff8d564c0efc0008d20d Mon Sep 17 00:00:00 2001 From: Ander Conselvan de Oliveira Date: Wed, 27 Apr 2016 15:44:19 +0300 Subject: drm/i915: Unduplicate CHV phy-releated pre pll enabling code The same logic is used for DP and HDMI so move it to intel_dpio_phy.c. v2: Rebase Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Jim Bride Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-5-git-send-email-ander.conselvan.de.oliveira@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/i915/i915_drv.h') diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 123f6bac750f..66403b51db39 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3595,6 +3595,7 @@ void chv_set_phy_signal_level(struct intel_encoder *encoder, bool uniq_trans_scale); void chv_data_lane_soft_reset(struct intel_encoder *encoder, bool reset); +void chv_phy_pre_pll_enable(struct intel_encoder *encoder); int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); -- cgit v1.2.1