From c39b06951f1dc2e384650288676c5b7dcc0ec92c Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 7 Apr 2014 12:00:17 +0100 Subject: DRM: armada: fix corruption while loading cursors Loading cursors to the LCD controller's SRAM can be corrupted when the configured pixel clock is relatively slow. This seems to be caused when we write back-to-back to the SRAM registers. There doesn't appear to be any status register we can read to check when an access has completed. Inserting a dummy read between the writes appears to fix the problem. Cc: # 3.13 Signed-off-by: Russell King Signed-off-by: Dave Airlie --- drivers/gpu/drm/armada/armada_crtc.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/armada/armada_crtc.c') diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index 5831e4109e75..81c34f949dfc 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -679,6 +679,7 @@ static void armada_load_cursor_argb(void __iomem *base, uint32_t *pix, base + LCD_SPU_SRAM_WRDAT); writel_relaxed(addr | SRAM_WRITE, base + LCD_SPU_SRAM_CTRL); + readl_relaxed(base + LCD_SPU_HWC_OVSA_HPXL_VLN); addr += 1; if ((addr & 0x00ff) == 0) addr += 0xf00; -- cgit v1.2.1