From a2757b6fab6dee3dbf43bdb7d7226d03747fbdb1 Mon Sep 17 00:00:00 2001 From: Zhenyu Wang Date: Fri, 9 Jul 2010 10:45:17 -0700 Subject: agp/intel: Add actual definitions of the Sandybridge PTE caching bits. --- drivers/char/agp/intel-gtt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/char/agp/intel-gtt.c') diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 2b1a0e96c71f..ccd4b1e694d1 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -176,7 +176,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem, if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB) { - cache_bits = I830_PTE_SYSTEM_CACHED; + cache_bits = GEN6_PTE_LLC_MLC; } for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { -- cgit v1.2.1