From 87c46b6c3d9c4d7f22bc553945728f5a82e9248a Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 4 May 2013 14:38:59 +0100 Subject: ARM: finally enable IRQ time accounting config We've had IRQ time accounting for the last six months, except for the Kconfig symbol. This somehow got missed out of the original patch. Add this now. Signed-off-by: Russell King --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 62079d434581..b2d235d015d3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -38,6 +38,7 @@ config ARM select HAVE_GENERIC_HARDIRQS select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) select HAVE_IDE if PCI || ISA || PCMCIA + select HAVE_IRQ_TIME_ACCOUNTING select HAVE_KERNEL_GZIP select HAVE_KERNEL_LZMA select HAVE_KERNEL_LZO -- cgit v1.2.1 From 756b253167be36ea74980220d606662713431503 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Thu, 2 May 2013 19:56:12 +0100 Subject: ARM: 7711/1: dove: fix Dove cpu type from V7 to PJ4 The CPU used in Marvell Dove SoCs is a PJ4 Sheeva core. Using CONFIG_CPU_PJ4 instead of CONFIG_CPU_V7 will enable iWMMXt extensions on Dove. Signed-off-by: Sebastian Hesselbarth Acked-by: Jason Cooper Acked-by: Andrew Lunn Signed-off-by: Russell King --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b2d235d015d3..7e3e2bfc5d7a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -492,7 +492,7 @@ config ARCH_IXP4XX config ARCH_DOVE bool "Marvell Dove" select ARCH_REQUIRE_GPIOLIB - select CPU_V7 + select CPU_PJ4 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI select PINCTRL -- cgit v1.2.1 From c01c5a506b59a8248b7666c779eb4ed689937874 Mon Sep 17 00:00:00 2001 From: Daniel Tang Date: Fri, 3 May 2013 08:13:55 +0100 Subject: ARM: 7712/1: Remove trailing whitespace in arch/arm/Makefile Clean up some trailing whitespace issues in arch/arm/Makefile. Signed-off-by: Daniel Tang Signed-off-by: Russell King --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 47374085befd..1ba358ba16b8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -309,7 +309,7 @@ define archhelp echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' echo '* xipImage - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)' echo ' uImage - U-Boot wrapped zImage' - echo ' bootpImage - Combined zImage and initial RAM disk' + echo ' bootpImage - Combined zImage and initial RAM disk' echo ' (supply initrd image via make variable INITRD=)' echo '* dtbs - Build device tree blobs for enabled boards' echo ' install - Install uncompressed kernel' -- cgit v1.2.1 From 9e01573b5cf8b3188c1f33493d2e73a30e8d25fc Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 9 May 2013 19:19:20 +0100 Subject: ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge Since commit c0114709ed85 ("irqchip: gic: Perform the gic_secondary_init() call via CPU notifier") it is no longer required nor possible to call gic_secondary_init() from platform code. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/common/mcpm_platsmp.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/common/mcpm_platsmp.c b/arch/arm/common/mcpm_platsmp.c index 52b88d81b7bb..3caed0db6986 100644 --- a/arch/arm/common/mcpm_platsmp.c +++ b/arch/arm/common/mcpm_platsmp.c @@ -15,8 +15,6 @@ #include #include -#include - #include #include #include @@ -49,7 +47,6 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i static void __cpuinit mcpm_secondary_init(unsigned int cpu) { mcpm_cpu_powered_up(); - gic_secondary_init(0); } #ifdef CONFIG_HOTPLUG_CPU -- cgit v1.2.1 From 6eabb3301b1facee669d9938f7c5a0295c21d71d Mon Sep 17 00:00:00 2001 From: Jaccon Bastiaansen Date: Mon, 13 May 2013 17:28:27 +0100 Subject: ARM: 7720/1: ARM v6/v7 cmpxchg64 shouldn't clear upper 32 bits of the old/new value The implementation of cmpxchg64() for the ARM v6 and v7 architecture casts parameter 2 and 3 (the old and new 64bit values) to an unsigned long before calling the atomic_cmpxchg64() function. This clears the top 32 bits of the old and new values, resulting in the wrong values being compare-exchanged. Luckily, this only appears to be used for 64-bit sched_clock, which we don't (yet) have on ARM. This bug was introduced by commit 3e0f5a15f500 ("ARM: 7404/1: cmpxchg64: use atomic64 and local64 routines for cmpxchg64"). Cc: Acked-by: Will Deacon Signed-off-by: Jaccon Bastiaansen Signed-off-by: Russell King --- arch/arm/include/asm/cmpxchg.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h index 7eb18c1d8d6c..4f009c10540d 100644 --- a/arch/arm/include/asm/cmpxchg.h +++ b/arch/arm/include/asm/cmpxchg.h @@ -233,15 +233,15 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr, ((__typeof__(*(ptr)))atomic64_cmpxchg(container_of((ptr), \ atomic64_t, \ counter), \ - (unsigned long)(o), \ - (unsigned long)(n))) + (unsigned long long)(o), \ + (unsigned long long)(n))) #define cmpxchg64_local(ptr, o, n) \ ((__typeof__(*(ptr)))local64_cmpxchg(container_of((ptr), \ local64_t, \ a), \ - (unsigned long)(o), \ - (unsigned long)(n))) + (unsigned long long)(o), \ + (unsigned long long)(n))) #endif /* __LINUX_ARM_ARCH__ >= 6 */ -- cgit v1.2.1