From ca58710f3ae585ed6203043cc6d4ffb805adeee4 Mon Sep 17 00:00:00 2001 From: Kristen Carlson Accardi Date: Wed, 21 Nov 2012 05:22:43 -0800 Subject: tools/power turbostat: display C8, C9, C10 residency Display residency in the new C-states, C8, C9, C10. C8, C9, C10 are present on some: "Fourth Generation Intel(R) Core(TM) Processors", which are based on Intel(R) microarchitecture code name Haswell. Signed-off-by: Kristen Carlson Accardi Signed-off-by: Len Brown --- arch/x86/include/uapi/asm/msr-index.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/x86/include/uapi/asm/msr-index.h') diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index 892ce40a7470..78e852545abb 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h @@ -118,6 +118,9 @@ #define MSR_CORE_C6_RESIDENCY 0x000003fd #define MSR_CORE_C7_RESIDENCY 0x000003fe #define MSR_PKG_C2_RESIDENCY 0x0000060d +#define MSR_PKG_C8_RESIDENCY 0x00000630 +#define MSR_PKG_C9_RESIDENCY 0x00000631 +#define MSR_PKG_C10_RESIDENCY 0x00000632 /* Run Time Average Power Limiting (RAPL) Interface */ -- cgit v1.2.1