From 08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sun, 11 Sep 2011 10:42:20 -0700 Subject: sparc64: Future proof Niagara cpu detection. Recognize T4 and T5 chips. Treating them both as "T2 plus other stuff" should be extremely safe and make sure distributions will work when those chips actually ship to customers. Signed-off-by: David S. Miller --- arch/sparc/kernel/cpumap.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/sparc/kernel/cpumap.c') diff --git a/arch/sparc/kernel/cpumap.c b/arch/sparc/kernel/cpumap.c index 4197e8d62d4c..9323eafccb93 100644 --- a/arch/sparc/kernel/cpumap.c +++ b/arch/sparc/kernel/cpumap.c @@ -325,6 +325,8 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index) case SUN4V_CHIP_NIAGARA1: case SUN4V_CHIP_NIAGARA2: case SUN4V_CHIP_NIAGARA3: + case SUN4V_CHIP_NIAGARA4: + case SUN4V_CHIP_NIAGARA5: rover_inc_table = niagara_iterate_method; break; default: -- cgit v1.2.1