From 00b9de9c249f51f09c19aa41cbbb3e3eb4eea807 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 24 Jun 2009 17:53:33 +0900 Subject: serial: sh-sci: Move SCSCR_INIT in to platform data. This moves all of the SCSCR_INIT definitions in to the platform data, for future consolidation. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2/setup-sh7619.c | 3 +++ arch/sh/kernel/cpu/sh2a/setup-mxg.c | 1 + arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 8 ++++++ arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 4 +++ arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 4 +++ arch/sh/kernel/cpu/sh3/setup-sh7705.c | 3 +++ arch/sh/kernel/cpu/sh3/setup-sh770x.c | 3 +++ arch/sh/kernel/cpu/sh3/setup-sh7710.c | 4 +++ arch/sh/kernel/cpu/sh3/setup-sh7720.c | 5 ++-- arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 1 + arch/sh/kernel/cpu/sh4/setup-sh7750.c | 48 +++++++++++++++++++++------------- arch/sh/kernel/cpu/sh4/setup-sh7760.c | 4 +++ arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 4 +++ arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 1 + arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 12 ++++----- arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 6 +++++ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 6 +++++ arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 3 +++ arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 10 +++++++ arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 2 ++ arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 6 +++++ arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 6 +++++ arch/sh/kernel/cpu/sh4a/setup-shx3.c | 4 +++ arch/sh/kernel/cpu/sh5/setup-sh5.c | 1 + 24 files changed, 123 insertions(+), 26 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c index 13798733f2db..ace016b17036 100644 --- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c @@ -63,16 +63,19 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xf8400000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 88, 88, 88, 88 }, }, { .mapbase = 0xf8410000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 92, 92, 92, 92 }, }, { .mapbase = 0xf8420000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 96, 96, 96, 96 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c index 869c2da4820b..7ec658ce14f8 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c +++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c @@ -211,6 +211,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xff804000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 220, 220, 220, 220 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c index d8febe128066..2a2ac222f9c7 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c @@ -181,41 +181,49 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 180, 180, 180, 180 } }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 184, 184, 184, 184 } }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 188, 188, 188, 188 } }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 192, 192, 192, 192 } }, { .mapbase = 0xfffea000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 196, 196, 196, 196 } }, { .mapbase = 0xfffea800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 200, 200, 200, 200 } }, { .mapbase = 0xfffeb000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 204, 204, 204, 204 } }, { .mapbase = 0xfffeb800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 208, 208, 208, 208 } }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c index 62e3039d2398..2c9f3ababfd7 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c @@ -177,21 +177,25 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 192, 192, 192, 192 }, }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 196, 196, 196, 196 }, }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 200, 200, 200, 200 }, }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 204, 204, 204, 204 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c index 3e6f3d7a58be..5a47987f3902 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c @@ -137,21 +137,25 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 240, 240, 240, 240 }, }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 244, 244, 244, 244 }, }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 248, 248, 248, 248 }, }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 252, 252, 252, 252 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index 88f742fed9ed..28de53b281f3 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -71,11 +71,14 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4410000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | + SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0, .type = PORT_SCIF, .irqs = { 56, 56, 56 }, }, { .mapbase = 0xa4400000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, .type = PORT_SCIF, .irqs = { 52, 52, 52 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index c56306798584..50ac42836dc7 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -110,6 +110,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xfffffe80, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, .type = PORT_SCI, .irqs = { 23, 23, 23, 0 }, }, @@ -119,6 +120,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4000150, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, .type = PORT_SCIF, .irqs = { 56, 56, 56, 56 }, }, @@ -128,6 +130,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4000140, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE, .type = PORT_IRDA, .irqs = { 52, 52, 52, 52 }, }, diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index efa76c8148f4..007627ecb7c8 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -100,11 +100,15 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4400000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | + SCSCR_CKE1 | SCSCR_CKE0, .type = PORT_SCIF, .irqs = { 52, 52, 52, 52 }, }, { .mapbase = 0xa4410000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | + SCSCR_CKE1 | SCSCR_CKE0, .type = PORT_SCIF, .irqs = { 56, 56, 56, 56 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index 5b2107798edb..1fc3d9089199 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -1,5 +1,5 @@ /* - * SH7720 Setup + * Setup code for SH7720, SH7721. * * Copyright (C) 2007 Markus Brunner, Mark Jonas * Copyright (C) 2009 Paul Mundt @@ -52,15 +52,16 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4430000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, }, { .mapbase = 0xa4438000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, }, { - .flags = 0, } }; diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c index 6d088d123591..9aa6fa3ca4e6 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c @@ -19,6 +19,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe80000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, { diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 851672d15cf4..2159c439dce9 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -14,6 +14,7 @@ #include #include #include +#include static struct resource rtc_resources[] = { [0] = { @@ -35,32 +36,36 @@ static struct platform_device rtc_device = { .resource = rtc_resources, }; -static struct plat_sci_port sci_platform_data[] = { - { -#ifndef CONFIG_SH_RTS7751R2D - .mapbase = 0xffe00000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCI, - .irqs = { 23, 23, 23, 0 }, - }, { -#endif - .mapbase = 0xffe80000, - .flags = UPF_BOOT_AUTOCONF, - .type = PORT_SCIF, - .irqs = { 40, 40, 40, 40 }, - }, { - .flags = 0, - } +static struct plat_sci_port sci_platform_data = { + .mapbase = 0xffe00000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCI, + .scscr = SCSCR_TE | SCSCR_RE, + .irqs = { 23, 23, 23, 0 }, }; static struct platform_device sci_device = { .name = "sh-sci", - .id = -1, .dev = { .platform_data = sci_platform_data, }, }; +static struct plat_sci_port scif_platform_data = { + .mapbase = 0xffe80000, + .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE, + .type = PORT_SCIF, + .irqs = { 40, 40, 40, 40 }, +}; + +static struct platform_device scif_device = { + .name = "sh-sci", + .dev = { + .platform_data = scif_platform_data, + }, +}; + static struct sh_timer_config tmu0_platform_data = { .name = "TMU0", .channel_offset = 0x04, @@ -222,7 +227,6 @@ static struct platform_device tmu4_device = { static struct platform_device *sh7750_devices[] __initdata = { &rtc_device, - &sci_device, &tmu0_device, &tmu1_device, &tmu2_device, @@ -236,6 +240,14 @@ static struct platform_device *sh7750_devices[] __initdata = { static int __init sh7750_devices_setup(void) { + if (mach_is_rts7751r2d()) { + scif_platform_data.scscr |= SCSCR_CKE1; + platform_register_device(&scif_device); + } else { + platform_register_device(&sci_device); + platform_register_device(&scif_device); + } + return platform_add_devices(sh7750_devices, ARRAY_SIZE(sh7750_devices)); } diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c index 5b822519bd90..74b5e994724d 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c @@ -130,21 +130,25 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xfe600000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 52, 53, 55, 54 }, }, { .mapbase = 0xfe610000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 72, 73, 75, 74 }, }, { .mapbase = 0xfe620000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 76, 77, 79, 78 }, }, { .mapbase = 0xfe480000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCI, .irqs = { 80, 81, 82, 0 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 6307e087c864..09fb5814d925 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c @@ -269,24 +269,28 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", }, { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", }, { .mapbase = 0xffe30000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 83, 83, 83, 83 }, .clk = "scif3", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index c18f7d09281b..307777cf04cc 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c @@ -280,6 +280,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index ea524a2da3e4..ffc69bc95932 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -305,25 +305,25 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", - }, - { + }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", - }, - { + }, { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", - }, - { + }, { .flags = 0, } }; diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index e1bb80b2a27b..6ce331a8f1bd 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -321,36 +321,42 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", },{ .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", },{ .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", },{ .mapbase = 0xa4e30000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 56, 56, 56, 56 }, .clk = "scif3", },{ .mapbase = 0xa4e40000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 88, 88, 88, 88 }, .clk = "scif4", },{ .mapbase = 0xa4e50000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 109, 109, 109, 109 }, .clk = "scif5", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index e5ac9eb11c63..4bf03c1ec8d6 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -28,36 +28,42 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", }, { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", }, { .mapbase = 0xa4e30000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 56, 56, 56, 56 }, .clk = "scif3", }, { .mapbase = 0xa4e40000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 88, 88, 88, 88 }, .clk = "scif4", }, { .mapbase = 0xa4e50000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIFA, .irqs = { 109, 109, 109, 109 }, .clk = "scif5", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index f1e0c0d36da7..76339c6da01e 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c @@ -40,16 +40,19 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, }, { .mapbase = 0xffe08000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 76, 76, 76, 76 }, }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 104, 104, 104, 104 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c index 1e86209db284..07a41ff20504 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c @@ -18,51 +18,61 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xff923000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 61, 61, 61, 61 }, }, { .mapbase = 0xff924000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 62, 62, 62, 62 }, }, { .mapbase = 0xff925000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 63, 63, 63, 63 }, }, { .mapbase = 0xff926000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 64, 64, 64, 64 }, }, { .mapbase = 0xff927000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 65, 65, 65, 65 }, }, { .mapbase = 0xff928000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 66, 66, 66, 66 }, }, { .mapbase = 0xff929000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 67, 67, 67, 67 }, }, { .mapbase = 0xff92a000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 68, 68, 68, 68 }, }, { .mapbase = 0xff92b000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 69, 69, 69, 69 }, }, { .mapbase = 0xff92c000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .type = PORT_SCIF, .irqs = { 70, 70, 70, 70 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index 715e05b431e5..2b355b67a33d 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c @@ -220,11 +220,13 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 76, 76, 76, 76 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index af561402570b..acd4b1d1b813 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -202,36 +202,42 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffea0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, .clk = "scif_fck", }, { .mapbase = 0xffeb0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 44, 44, 44, 44 }, .clk = "scif_fck", }, { .mapbase = 0xffec0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 60, 60, 60, 60 }, .clk = "scif_fck", }, { .mapbase = 0xffed0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 61, 61, 61, 61 }, .clk = "scif_fck", }, { .mapbase = 0xffee0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 62, 62, 62, 62 }, .clk = "scif_fck", }, { .mapbase = 0xffef0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 63, 63, 63, 63 }, .clk = "scif_fck", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index b70049470a0b..347ce88de570 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -27,6 +27,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffea0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, @@ -36,26 +37,31 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffeb0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 44, 44, 44, 44 }, }, { .mapbase = 0xffec0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 50, 50, 50, 50 }, }, { .mapbase = 0xffed0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 51, 51, 51, 51 }, }, { .mapbase = 0xffee0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 52, 52, 52, 52 }, }, { .mapbase = 0xffef0000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .irqs = { 53, 53, 53, 53 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index 53c65fd9ccef..eef94934f542 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c @@ -19,21 +19,25 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffc30000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, { .mapbase = 0xffc40000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 44, 45, 47, 46 }, }, { .mapbase = 0xffc50000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 48, 49, 51, 50 }, }, { .mapbase = 0xffc60000, .flags = UPF_BOOT_AUTOCONF, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 52, 53, 55, 54 }, }, { diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c index f5ff1ac57fc2..26fa10c560de 100644 --- a/arch/sh/kernel/cpu/sh5/setup-sh5.c +++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c @@ -20,6 +20,7 @@ static struct plat_sci_port sci_platform_data[] = { { .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, + .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .type = PORT_SCIF, .irqs = { 39, 40, 42, 0 }, }, { -- cgit v1.2.1 From 26c92f3728d738aaa7e4859d5581323cd68096dd Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 24 Jun 2009 18:23:52 +0900 Subject: serial: sh-sci: Move SCBRR calculation algo in to platform data. This permits each port to select its own SCBRR calculation algorithm, rather than having it all ifdef'ed in the header. There are presently only 5 different variations that all parts fall under. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2/setup-sh7619.c | 3 +++ arch/sh/kernel/cpu/sh2a/setup-mxg.c | 1 + arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 8 ++++++++ arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 4 ++++ arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 4 ++++ arch/sh/kernel/cpu/sh3/setup-sh7705.c | 2 ++ arch/sh/kernel/cpu/sh3/setup-sh770x.c | 3 +++ arch/sh/kernel/cpu/sh3/setup-sh7710.c | 2 ++ arch/sh/kernel/cpu/sh3/setup-sh7720.c | 2 ++ arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 1 + arch/sh/kernel/cpu/sh4/setup-sh7750.c | 2 ++ arch/sh/kernel/cpu/sh4/setup-sh7760.c | 4 ++++ arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 4 ++++ arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 1 + arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 3 +++ arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 6 ++++++ arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 6 ++++++ arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 3 +++ arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 10 ++++++++++ arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 2 ++ arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 6 ++++++ arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 6 ++++++ arch/sh/kernel/cpu/sh4a/setup-shx3.c | 4 ++++ arch/sh/kernel/cpu/sh5/setup-sh5.c | 1 + 24 files changed, 88 insertions(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c index ace016b17036..86acede777b9 100644 --- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c @@ -64,18 +64,21 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xf8400000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 88, 88, 88, 88 }, }, { .mapbase = 0xf8410000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 92, 92, 92, 92 }, }, { .mapbase = 0xf8420000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 96, 96, 96, 96 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c index 7ec658ce14f8..b2c3bcc01190 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c +++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c @@ -212,6 +212,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xff804000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 220, 220, 220, 220 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c index 2a2ac222f9c7..8d44917ce50b 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c @@ -182,48 +182,56 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 180, 180, 180, 180 } }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 184, 184, 184, 184 } }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 188, 188, 188, 188 } }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 192, 192, 192, 192 } }, { .mapbase = 0xfffea000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 196, 196, 196, 196 } }, { .mapbase = 0xfffea800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 200, 200, 200, 200 } }, { .mapbase = 0xfffeb000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 204, 204, 204, 204 } }, { .mapbase = 0xfffeb800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 208, 208, 208, 208 } }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c index 2c9f3ababfd7..a78d2a219f3b 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c @@ -178,24 +178,28 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 192, 192, 192, 192 }, }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 196, 196, 196, 196 }, }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 200, 200, 200, 200 }, }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 204, 204, 204, 204 }, }, { diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c index 5a47987f3902..68b93ed44cc2 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c @@ -138,24 +138,28 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xfffe8000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 240, 240, 240, 240 }, }, { .mapbase = 0xfffe8800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 244, 244, 244, 244 }, }, { .mapbase = 0xfffe9000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 248, 248, 248, 248 }, }, { .mapbase = 0xfffe9800, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 252, 252, 252, 252 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index 28de53b281f3..27d03d836056 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -73,12 +73,14 @@ static struct plat_sci_port sci_platform_data[] = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0, + .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, .irqs = { 56, 56, 56 }, }, { .mapbase = 0xa4400000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, + .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, .irqs = { 52, 52, 52 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index 50ac42836dc7..83c9a5a39685 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -111,6 +111,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xfffffe80, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCI, .irqs = { 23, 23, 23, 0 }, }, @@ -121,6 +122,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4000150, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 56, 56, 56, 56 }, }, @@ -131,6 +133,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4000140, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_IRDA, .irqs = { 52, 52, 52, 52 }, }, diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 007627ecb7c8..9a60ffd34a9f 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -102,6 +102,7 @@ static struct plat_sci_port sci_platform_data[] = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | SCSCR_CKE1 | SCSCR_CKE0, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 52, 52, 52, 52 }, }, { @@ -109,6 +110,7 @@ static struct plat_sci_port sci_platform_data[] = { .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | SCSCR_CKE1 | SCSCR_CKE0, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 56, 56, 56, 56 }, }, { diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index 1fc3d9089199..48d50a65db32 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -53,12 +53,14 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4430000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE, + .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, }, { .mapbase = 0xa4438000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE, + .scbrr_algo_id = SCBRR_ALGO_4, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, }, { diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c index 9aa6fa3ca4e6..ec2104b49ef7 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c @@ -20,6 +20,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe80000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, { diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 2159c439dce9..51a945e0d72c 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -41,6 +41,7 @@ static struct plat_sci_port sci_platform_data = { .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCI, .scscr = SCSCR_TE | SCSCR_RE, + .scbrr_algo_id = SCBRR_ALGO_2, .irqs = { 23, 23, 23, 0 }, }; @@ -55,6 +56,7 @@ static struct plat_sci_port scif_platform_data = { .mapbase = 0xffe80000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, }; diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c index 74b5e994724d..cee660fe1d90 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c @@ -131,24 +131,28 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xfe600000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 52, 53, 55, 54 }, }, { .mapbase = 0xfe610000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 72, 73, 75, 74 }, }, { .mapbase = 0xfe620000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 76, 77, 79, 78 }, }, { .mapbase = 0xfe480000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCI, .irqs = { 80, 81, 82, 0 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 09fb5814d925..fbae06b1c98d 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c @@ -270,6 +270,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", @@ -277,6 +278,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", @@ -284,6 +286,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", @@ -291,6 +294,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe30000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 83, 83, 83, 83 }, .clk = "scif3", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 307777cf04cc..d4ee429032b1 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c @@ -281,6 +281,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index ffc69bc95932..f7b0551bf104 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -306,6 +306,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", @@ -313,6 +314,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", @@ -320,6 +322,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 6ce331a8f1bd..bb4837b9dcf4 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -322,6 +322,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", @@ -329,6 +330,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", @@ -336,6 +338,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", @@ -343,6 +346,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e30000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 56, 56, 56, 56 }, .clk = "scif3", @@ -350,6 +354,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e40000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 88, 88, 88, 88 }, .clk = "scif4", @@ -357,6 +362,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e50000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 109, 109, 109, 109 }, .clk = "scif5", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 4bf03c1ec8d6..c934b78e5658 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -29,6 +29,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 80, 80, 80, 80 }, .clk = "scif0", @@ -36,6 +37,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 81, 81, 81, 81 }, .clk = "scif1", @@ -43,6 +45,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe20000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 82, 82, 82, 82 }, .clk = "scif2", @@ -50,6 +53,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e30000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 56, 56, 56, 56 }, .clk = "scif3", @@ -57,6 +61,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e40000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 88, 88, 88, 88 }, .clk = "scif4", @@ -64,6 +69,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xa4e50000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_3, .type = PORT_SCIFA, .irqs = { 109, 109, 109, 109 }, .clk = "scif5", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index 76339c6da01e..ab02771ee888 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c @@ -41,18 +41,21 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, }, { .mapbase = 0xffe08000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 76, 76, 76, 76 }, }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 104, 104, 104, 104 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c index 07a41ff20504..746f4fb9ccf0 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c @@ -19,60 +19,70 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xff923000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 61, 61, 61, 61 }, }, { .mapbase = 0xff924000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 62, 62, 62, 62 }, }, { .mapbase = 0xff925000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 63, 63, 63, 63 }, }, { .mapbase = 0xff926000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 64, 64, 64, 64 }, }, { .mapbase = 0xff927000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 65, 65, 65, 65 }, }, { .mapbase = 0xff928000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 66, 66, 66, 66 }, }, { .mapbase = 0xff929000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 67, 67, 67, 67 }, }, { .mapbase = 0xff92a000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 68, 68, 68, 68 }, }, { .mapbase = 0xff92b000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 69, 69, 69, 69 }, }, { .mapbase = 0xff92c000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 70, 70, 70, 70 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index 2b355b67a33d..bcd411eb9cb0 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c @@ -221,12 +221,14 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffe00000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, }, { .mapbase = 0xffe10000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 76, 76, 76, 76 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index acd4b1d1b813..3ae2e2071009 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -203,6 +203,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffea0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 40, 40, 40, 40 }, .clk = "scif_fck", @@ -210,6 +211,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffeb0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 44, 44, 44, 44 }, .clk = "scif_fck", @@ -217,6 +219,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffec0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 60, 60, 60, 60 }, .clk = "scif_fck", @@ -224,6 +227,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffed0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 61, 61, 61, 61 }, .clk = "scif_fck", @@ -231,6 +235,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffee0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 62, 62, 62, 62 }, .clk = "scif_fck", @@ -238,6 +243,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffef0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 63, 63, 63, 63 }, .clk = "scif_fck", diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 347ce88de570..8b7ea4bd965d 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -28,6 +28,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffea0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, @@ -38,30 +39,35 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffeb0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 44, 44, 44, 44 }, }, { .mapbase = 0xffec0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 50, 50, 50, 50 }, }, { .mapbase = 0xffed0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 51, 51, 51, 51 }, }, { .mapbase = 0xffee0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 52, 52, 52, 52 }, }, { .mapbase = 0xffef0000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scbrr_algo_id = SCBRR_ALGO_1, .type = PORT_SCIF, .irqs = { 53, 53, 53, 53 }, }, { diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index eef94934f542..4a26cc304139 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c @@ -20,24 +20,28 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = 0xffc30000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 40, 41, 43, 42 }, }, { .mapbase = 0xffc40000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 44, 45, 47, 46 }, }, { .mapbase = 0xffc50000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 48, 49, 51, 50 }, }, { .mapbase = 0xffc60000, .flags = UPF_BOOT_AUTOCONF, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 52, 53, 55, 54 }, }, { diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c index 26fa10c560de..72aa86ec7446 100644 --- a/arch/sh/kernel/cpu/sh5/setup-sh5.c +++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c @@ -21,6 +21,7 @@ static struct plat_sci_port sci_platform_data[] = { .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, + .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, .irqs = { 39, 40, 42, 0 }, }, { -- cgit v1.2.1 From 37b7a97884ba64bf7d403351ac2a9476ab4f1bba Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 1 Nov 2010 09:49:04 -0400 Subject: sh: machvec IO death. This takes a bit of a sledgehammer to the machvec I/O routines. The iomem case requires no special casing and so can just be dropped outright. This only leaves the ioport casing for PCI and SuperIO mangling. With the SuperIO case going through the standard ioport mapping, it's possible to replace everything with generic routines. With this done the standard I/O routines are tidied up and NO_IOPORT now gets default-enabled for the vast majority of boards. Signed-off-by: Paul Mundt --- arch/sh/kernel/Makefile | 6 +- arch/sh/kernel/io_generic.c | 180 -------------------------------------------- arch/sh/kernel/iomap.c | 165 ++++++++++++++++++++++++++++++++++++++++ arch/sh/kernel/ioport.c | 43 +++++++++++ arch/sh/kernel/machvec.c | 22 ------ 5 files changed, 213 insertions(+), 203 deletions(-) delete mode 100644 arch/sh/kernel/io_generic.c create mode 100644 arch/sh/kernel/iomap.c create mode 100644 arch/sh/kernel/ioport.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 8eed6a485446..ff80227b02d8 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -20,6 +20,11 @@ obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ syscalls_$(BITS).o time.o topology.o traps.o \ traps_$(BITS).o unwinder.o +ifndef CONFIG_GENERIC_IOMAP +obj-y += iomap.o +obj-$(CONFIG_HAS_IOPORT) += ioport.o +endif + obj-y += cpu/ obj-$(CONFIG_VSYSCALL) += vsyscall/ obj-$(CONFIG_SMP) += smp.o @@ -39,7 +44,6 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o obj-$(CONFIG_HIBERNATION) += swsusp.o obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o -obj-$(CONFIG_HAS_IOPORT) += io_generic.o obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c deleted file mode 100644 index 447d78f666f9..000000000000 --- a/arch/sh/kernel/io_generic.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * arch/sh/kernel/io_generic.c - * - * Copyright (C) 2000 Niibe Yutaka - * Copyright (C) 2005 - 2007 Paul Mundt - * - * Generic I/O routine. These can be used where a machine specific version - * is not required. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include - -#ifdef CONFIG_CPU_SH3 -/* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a - * workaround. */ -/* I'm not sure SH7709 has this kind of bug */ -#define dummy_read() __raw_readb(0xba000000) -#else -#define dummy_read() -#endif - -unsigned long generic_io_base = 0; - -u8 generic_inb(unsigned long port) -{ - return __raw_readb(__ioport_map(port, 1)); -} - -u16 generic_inw(unsigned long port) -{ - return __raw_readw(__ioport_map(port, 2)); -} - -u32 generic_inl(unsigned long port) -{ - return __raw_readl(__ioport_map(port, 4)); -} - -u8 generic_inb_p(unsigned long port) -{ - unsigned long v = generic_inb(port); - - ctrl_delay(); - return v; -} - -u16 generic_inw_p(unsigned long port) -{ - unsigned long v = generic_inw(port); - - ctrl_delay(); - return v; -} - -u32 generic_inl_p(unsigned long port) -{ - unsigned long v = generic_inl(port); - - ctrl_delay(); - return v; -} - -/* - * insb/w/l all read a series of bytes/words/longs from a fixed port - * address. However as the port address doesn't change we only need to - * convert the port address to real address once. - */ - -void generic_insb(unsigned long port, void *dst, unsigned long count) -{ - __raw_readsb(__ioport_map(port, 1), dst, count); - dummy_read(); -} - -void generic_insw(unsigned long port, void *dst, unsigned long count) -{ - __raw_readsw(__ioport_map(port, 2), dst, count); - dummy_read(); -} - -void generic_insl(unsigned long port, void *dst, unsigned long count) -{ - __raw_readsl(__ioport_map(port, 4), dst, count); - dummy_read(); -} - -void generic_outb(u8 b, unsigned long port) -{ - __raw_writeb(b, __ioport_map(port, 1)); -} - -void generic_outw(u16 b, unsigned long port) -{ - __raw_writew(b, __ioport_map(port, 2)); -} - -void generic_outl(u32 b, unsigned long port) -{ - __raw_writel(b, __ioport_map(port, 4)); -} - -void generic_outb_p(u8 b, unsigned long port) -{ - generic_outb(b, port); - ctrl_delay(); -} - -void generic_outw_p(u16 b, unsigned long port) -{ - generic_outw(b, port); - ctrl_delay(); -} - -void generic_outl_p(u32 b, unsigned long port) -{ - generic_outl(b, port); - ctrl_delay(); -} - -/* - * outsb/w/l all write a series of bytes/words/longs to a fixed port - * address. However as the port address doesn't change we only need to - * convert the port address to real address once. - */ -void generic_outsb(unsigned long port, const void *src, unsigned long count) -{ - __raw_writesb(__ioport_map(port, 1), src, count); - dummy_read(); -} - -void generic_outsw(unsigned long port, const void *src, unsigned long count) -{ - __raw_writesw(__ioport_map(port, 2), src, count); - dummy_read(); -} - -void generic_outsl(unsigned long port, const void *src, unsigned long count) -{ - __raw_writesl(__ioport_map(port, 4), src, count); - dummy_read(); -} - -void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) -{ -#ifdef P1SEG - if (PXSEG(addr) >= P1SEG) - return (void __iomem *)addr; -#endif - - return (void __iomem *)(addr + generic_io_base); -} - -void generic_ioport_unmap(void __iomem *addr) -{ -} - -#ifndef CONFIG_GENERIC_IOMAP -void __iomem *ioport_map(unsigned long port, unsigned int nr) -{ - void __iomem *ret; - - ret = __ioport_map_trapped(port, nr); - if (ret) - return ret; - - return __ioport_map(port, nr); -} -EXPORT_SYMBOL(ioport_map); - -void ioport_unmap(void __iomem *addr) -{ - sh_mv.mv_ioport_unmap(addr); -} -EXPORT_SYMBOL(ioport_unmap); -#endif /* CONFIG_GENERIC_IOMAP */ diff --git a/arch/sh/kernel/iomap.c b/arch/sh/kernel/iomap.c new file mode 100644 index 000000000000..2e8e8b9b9cef --- /dev/null +++ b/arch/sh/kernel/iomap.c @@ -0,0 +1,165 @@ +/* + * arch/sh/kernel/iomap.c + * + * Copyright (C) 2000 Niibe Yutaka + * Copyright (C) 2005 - 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include + +unsigned int ioread8(void __iomem *addr) +{ + return readb(addr); +} +EXPORT_SYMBOL(ioread8); + +unsigned int ioread16(void __iomem *addr) +{ + return readw(addr); +} +EXPORT_SYMBOL(ioread16); + +unsigned int ioread16be(void __iomem *addr) +{ + return be16_to_cpu(__raw_readw(addr)); +} +EXPORT_SYMBOL(ioread16be); + +unsigned int ioread32(void __iomem *addr) +{ + return readl(addr); +} +EXPORT_SYMBOL(ioread32); + +unsigned int ioread32be(void __iomem *addr) +{ + return be32_to_cpu(__raw_readl(addr)); +} +EXPORT_SYMBOL(ioread32be); + +void iowrite8(u8 val, void __iomem *addr) +{ + writeb(val, addr); +} +EXPORT_SYMBOL(iowrite8); + +void iowrite16(u16 val, void __iomem *addr) +{ + writew(val, addr); +} +EXPORT_SYMBOL(iowrite16); + +void iowrite16be(u16 val, void __iomem *addr) +{ + __raw_writew(cpu_to_be16(val), addr); +} +EXPORT_SYMBOL(iowrite16be); + +void iowrite32(u32 val, void __iomem *addr) +{ + writel(val, addr); +} +EXPORT_SYMBOL(iowrite32); + +void iowrite32be(u32 val, void __iomem *addr) +{ + __raw_writel(cpu_to_be32(val), addr); +} +EXPORT_SYMBOL(iowrite32be); + +/* + * These are the "repeat MMIO read/write" functions. + * Note the "__raw" accesses, since we don't want to + * convert to CPU byte order. We write in "IO byte + * order" (we also don't have IO barriers). + */ +static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) +{ + while (--count >= 0) { + u8 data = __raw_readb(addr); + *dst = data; + dst++; + } +} + +static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) +{ + while (--count >= 0) { + u16 data = __raw_readw(addr); + *dst = data; + dst++; + } +} + +static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) +{ + while (--count >= 0) { + u32 data = __raw_readl(addr); + *dst = data; + dst++; + } +} + +static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) +{ + while (--count >= 0) { + __raw_writeb(*src, addr); + src++; + } +} + +static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) +{ + while (--count >= 0) { + __raw_writew(*src, addr); + src++; + } +} + +static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) +{ + while (--count >= 0) { + __raw_writel(*src, addr); + src++; + } +} + +void ioread8_rep(void __iomem *addr, void *dst, unsigned long count) +{ + mmio_insb(addr, dst, count); +} +EXPORT_SYMBOL(ioread8_rep); + +void ioread16_rep(void __iomem *addr, void *dst, unsigned long count) +{ + mmio_insw(addr, dst, count); +} +EXPORT_SYMBOL(ioread16_rep); + +void ioread32_rep(void __iomem *addr, void *dst, unsigned long count) +{ + mmio_insl(addr, dst, count); +} +EXPORT_SYMBOL(ioread32_rep); + +void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) +{ + mmio_outsb(addr, src, count); +} +EXPORT_SYMBOL(iowrite8_rep); + +void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) +{ + mmio_outsw(addr, src, count); +} +EXPORT_SYMBOL(iowrite16_rep); + +void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) +{ + mmio_outsl(addr, src, count); +} +EXPORT_SYMBOL(iowrite32_rep); diff --git a/arch/sh/kernel/ioport.c b/arch/sh/kernel/ioport.c new file mode 100644 index 000000000000..e3ad6103e7c1 --- /dev/null +++ b/arch/sh/kernel/ioport.c @@ -0,0 +1,43 @@ +/* + * arch/sh/kernel/ioport.c + * + * Copyright (C) 2000 Niibe Yutaka + * Copyright (C) 2005 - 2007 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include + +const unsigned long sh_io_port_base __read_mostly = -1; +EXPORT_SYMBOL(sh_io_port_base); + +void __iomem *__ioport_map(unsigned long addr, unsigned int size) +{ + if (sh_mv.mv_ioport_map) + return sh_mv.mv_ioport_map(addr, size); + + return (void __iomem *)(addr + sh_io_port_base); +} +EXPORT_SYMBOL(__ioport_map); + +void __iomem *ioport_map(unsigned long port, unsigned int nr) +{ + void __iomem *ret; + + ret = __ioport_map_trapped(port, nr); + if (ret) + return ret; + + return __ioport_map(port, nr); +} +EXPORT_SYMBOL(ioport_map); + +void ioport_unmap(void __iomem *addr) +{ + if (sh_mv.mv_ioport_unmap) + sh_mv.mv_ioport_unmap(addr); +} +EXPORT_SYMBOL(ioport_unmap); diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c index 9f9bb63616ad..3d722e49db08 100644 --- a/arch/sh/kernel/machvec.c +++ b/arch/sh/kernel/machvec.c @@ -118,28 +118,6 @@ void __init sh_mv_setup(void) sh_mv.mv_##elem = generic_##elem; \ } while (0) -#ifdef CONFIG_HAS_IOPORT - -#ifdef P2SEG - __set_io_port_base(P2SEG); -#else - __set_io_port_base(0); -#endif - - mv_set(inb); mv_set(inw); mv_set(inl); - mv_set(outb); mv_set(outw); mv_set(outl); - - mv_set(inb_p); mv_set(inw_p); mv_set(inl_p); - mv_set(outb_p); mv_set(outw_p); mv_set(outl_p); - - mv_set(insb); mv_set(insw); mv_set(insl); - mv_set(outsb); mv_set(outsw); mv_set(outsl); - - mv_set(ioport_map); - mv_set(ioport_unmap); - -#endif - mv_set(irq_demux); mv_set(mode_pins); mv_set(mem_init); -- cgit v1.2.1 From 8b32a92b600e2728c5c438a748a4dc3132c98ef3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 1 Nov 2010 17:05:30 -0400 Subject: sh: Add EHCI support for SH7786. This adds in the platform device for SH7786 USB EHCI. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 35 ++++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index c016c0004714..0170dbda1d00 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -522,10 +522,37 @@ static struct platform_device dma0_device = { }, }; +#define USB_EHCI_START 0xffe70000 +#define USB_OHCI_START 0xffe70400 + +static struct resource usb_ehci_resources[] = { + [0] = { + .start = USB_EHCI_START, + .end = USB_EHCI_START + 0x3ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 77, + .end = 77, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device usb_ehci_device = { + .name = "sh_ehci", + .id = -1, + .dev = { + .dma_mask = &usb_ehci_device.dev.coherent_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(usb_ehci_resources), + .resource = usb_ehci_resources, +}; + static struct resource usb_ohci_resources[] = { [0] = { - .start = 0xffe70400, - .end = 0xffe704ff, + .start = USB_OHCI_START, + .end = USB_OHCI_START + 0x3ff, .flags = IORESOURCE_MEM, }, [1] = { @@ -535,12 +562,11 @@ static struct resource usb_ohci_resources[] = { }, }; -static u64 usb_ohci_dma_mask = DMA_BIT_MASK(32); static struct platform_device usb_ohci_device = { .name = "sh_ohci", .id = -1, .dev = { - .dma_mask = &usb_ohci_dma_mask, + .dma_mask = &usb_ohci_device.dev.coherent_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(usb_ohci_resources), @@ -570,6 +596,7 @@ static struct platform_device *sh7786_early_devices[] __initdata = { static struct platform_device *sh7786_devices[] __initdata = { &dma0_device, + &usb_ehci_device, &usb_ohci_device, }; -- cgit v1.2.1 From 16b259203c513ed28bd31cc9a981e0d3ad517943 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 1 Nov 2010 12:18:48 -0400 Subject: sh: migrate SH_CLK_MD to mode pin API. This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and converts over to the mode pin API. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2/clock-sh7619.c | 22 ++++++++++++---------- arch/sh/kernel/cpu/sh2a/clock-sh7201.c | 20 ++++++++++---------- arch/sh/kernel/cpu/sh2a/clock-sh7203.c | 21 +++++++++------------ arch/sh/kernel/cpu/sh2a/clock-sh7206.c | 20 +++++++++----------- 4 files changed, 40 insertions(+), 43 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c index 0c9f24d7a02f..5b7f12e58a8d 100644 --- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c @@ -14,24 +14,18 @@ */ #include #include +#include #include #include -#include +#include static const int pll1rate[] = {1,2}; static const int pfc_divisors[] = {1,2,0,4}; - -#if (CONFIG_SH_CLK_MD == 1) || (CONFIG_SH_CLK_MD == 2) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 5) || (CONFIG_SH_CLK_MD == 6) -#define PLL2 (2) -#else -#error "Illigal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; + clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; } static struct clk_ops sh7619_master_clk_ops = { @@ -70,6 +64,14 @@ static struct clk_ops *sh7619_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN2 | MODE_PIN0) || + test_mode_pin(MODE_PIN2 | MODE_PIN1)) + pll2_mult = 2; + else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1)) + pll2_mult = 4; + + BUG_ON(!pll2_mult); + if (idx < ARRAY_SIZE(sh7619_clk_ops)) *ops = sh7619_clk_ops[idx]; } diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index b26264dc2aef..1174e2d96c03 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c @@ -22,19 +22,12 @@ static const int pll1rate[]={1,2,3,4,6,8}; static const int pfc_divisors[]={1,2,3,4,6,8,12}; #define ifc_divisors pfc_divisors -#if (CONFIG_SH_CLK_MD == 0) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 2) -#define PLL2 (2) -#elif (CONFIG_SH_CLK_MD == 3) -#define PLL2 (1) -#else -#error "Illegal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; + clk->rate = 10000000 * pll2_mult * + pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; } static struct clk_ops sh7201_master_clk_ops = { @@ -80,6 +73,13 @@ static struct clk_ops *sh7201_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN1 | MODE_PIN0)) + pll2_mult = 1; + else if (test_mode_pin(MODE_PIN1)) + pll2_mult = 2; + else + pll2_mult = 4; + if (idx < ARRAY_SIZE(sh7201_clk_ops)) *ops = sh7201_clk_ops[idx]; } diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c index 7e75d8f79502..95a008e8b735 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c @@ -25,21 +25,11 @@ static const int pll1rate[]={8,12,16,0}; static const int pfc_divisors[]={1,2,3,4,6,8,12}; #define ifc_divisors pfc_divisors -#if (CONFIG_SH_CLK_MD == 0) -#define PLL2 (1) -#elif (CONFIG_SH_CLK_MD == 1) -#define PLL2 (2) -#elif (CONFIG_SH_CLK_MD == 2) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 3) -#define PLL2 (4) -#else -#error "Illegal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ; + clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; } static struct clk_ops sh7203_master_clk_ops = { @@ -79,6 +69,13 @@ static struct clk_ops *sh7203_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN1)) + pll2_mult = 4; + else if (test_mode_pin(MODE_PIN0)) + pll2_mult = 2; + else + pll2_mult = 1; + if (idx < ARRAY_SIZE(sh7203_clk_ops)) *ops = sh7203_clk_ops[idx]; } diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c index b27a5e2687ab..3c314d7cd6e6 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c @@ -22,19 +22,11 @@ static const int pll1rate[]={1,2,3,4,6,8}; static const int pfc_divisors[]={1,2,3,4,6,8,12}; #define ifc_divisors pfc_divisors -#if (CONFIG_SH_CLK_MD == 2) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 6) -#define PLL2 (2) -#elif (CONFIG_SH_CLK_MD == 7) -#define PLL2 (1) -#else -#error "Illigal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; + clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; } static struct clk_ops sh7206_master_clk_ops = { @@ -79,7 +71,13 @@ static struct clk_ops *sh7206_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0)) + pll2_mult = 1; + else if (test_mode_pin(MODE_PIN2 | MODE_PIN1)) + pll2_mult = 2; + else if (test_mode_pin(MODE_PIN1)) + pll2_mult = 4; + if (idx < ARRAY_SIZE(sh7206_clk_ops)) *ops = sh7206_clk_ops[idx]; } - -- cgit v1.2.1 From a9b27bcc6acf2491609f51aa592ec67311d4518d Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 1 Nov 2010 12:44:25 -0400 Subject: sh: Break out cpuinfo_op procfs bits. Presently this is all inlined in setup.c, which is not really the place for it. Follow the x86 example and split it out into its own file. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/Makefile | 2 +- arch/sh/kernel/cpu/proc.c | 148 ++++++++++++++++++++++++++++++++++++++++++++ arch/sh/kernel/setup.c | 144 ------------------------------------------ 3 files changed, 149 insertions(+), 145 deletions(-) create mode 100644 arch/sh/kernel/cpu/proc.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index 4edcb60a1355..d49c2135fd48 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -20,4 +20,4 @@ obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o obj-$(CONFIG_SH_FPU) += fpu.o obj-$(CONFIG_SH_FPU_EMU) += fpu.o -obj-y += irq/ init.o clock.o hwblk.o +obj-y += irq/ init.o clock.o hwblk.o proc.o diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c new file mode 100644 index 000000000000..e80a936f409a --- /dev/null +++ b/arch/sh/kernel/cpu/proc.c @@ -0,0 +1,148 @@ +#include +#include +#include +#include +#include + +static const char *cpu_name[] = { + [CPU_SH7201] = "SH7201", + [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", + [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", + [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", + [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", + [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", + [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", + [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", + [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", + [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", + [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", + [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", + [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", + [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", + [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", + [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", + [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", + [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", + [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", + [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", + [CPU_SH_NONE] = "Unknown" +}; + +const char *get_cpu_subtype(struct sh_cpuinfo *c) +{ + return cpu_name[c->type]; +} +EXPORT_SYMBOL(get_cpu_subtype); + +#ifdef CONFIG_PROC_FS +/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ +static const char *cpu_flags[] = { + "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", + "ptea", "llsc", "l2", "op32", "pteaex", NULL +}; + +static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) +{ + unsigned long i; + + seq_printf(m, "cpu flags\t:"); + + if (!c->flags) { + seq_printf(m, " %s\n", cpu_flags[0]); + return; + } + + for (i = 0; cpu_flags[i]; i++) + if ((c->flags & (1 << i))) + seq_printf(m, " %s", cpu_flags[i+1]); + + seq_printf(m, "\n"); +} + +static void show_cacheinfo(struct seq_file *m, const char *type, + struct cache_info info) +{ + unsigned int cache_size; + + cache_size = info.ways * info.sets * info.linesz; + + seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", + type, cache_size >> 10, info.ways); +} + +/* + * Get CPU information for use by the procfs. + */ +static int show_cpuinfo(struct seq_file *m, void *v) +{ + struct sh_cpuinfo *c = v; + unsigned int cpu = c - cpu_data; + + if (!cpu_online(cpu)) + return 0; + + if (cpu == 0) + seq_printf(m, "machine\t\t: %s\n", get_system_type()); + else + seq_printf(m, "\n"); + + seq_printf(m, "processor\t: %d\n", cpu); + seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); + seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); + if (c->cut_major == -1) + seq_printf(m, "cut\t\t: unknown\n"); + else if (c->cut_minor == -1) + seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); + else + seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); + + show_cpuflags(m, c); + + seq_printf(m, "cache type\t: "); + + /* + * Check for what type of cache we have, we support both the + * unified cache on the SH-2 and SH-3, as well as the harvard + * style cache on the SH-4. + */ + if (c->icache.flags & SH_CACHE_COMBINED) { + seq_printf(m, "unified\n"); + show_cacheinfo(m, "cache", c->icache); + } else { + seq_printf(m, "split (harvard)\n"); + show_cacheinfo(m, "icache", c->icache); + show_cacheinfo(m, "dcache", c->dcache); + } + + /* Optional secondary cache */ + if (c->flags & CPU_HAS_L2_CACHE) + show_cacheinfo(m, "scache", c->scache); + + seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); + + seq_printf(m, "bogomips\t: %lu.%02lu\n", + c->loops_per_jiffy/(500000/HZ), + (c->loops_per_jiffy/(5000/HZ)) % 100); + + return 0; +} + +static void *c_start(struct seq_file *m, loff_t *pos) +{ + return *pos < NR_CPUS ? cpu_data + *pos : NULL; +} +static void *c_next(struct seq_file *m, void *v, loff_t *pos) +{ + ++*pos; + return c_start(m, pos); +} +static void c_stop(struct seq_file *m, void *v) +{ +} +const struct seq_operations cpuinfo_op = { + .start = c_start, + .next = c_next, + .stop = c_stop, + .show = show_cpuinfo, +}; +#endif /* CONFIG_PROC_FS */ diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index d6b018c7ebdc..4f267160c515 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -319,146 +318,3 @@ int test_mode_pin(int pin) { return sh_mv.mv_mode_pins() & pin; } - -static const char *cpu_name[] = { - [CPU_SH7201] = "SH7201", - [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", - [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", - [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", - [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", - [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", - [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", - [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", - [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", - [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", - [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", - [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", - [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", - [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", - [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", - [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", - [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", - [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", - [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", - [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", - [CPU_SH_NONE] = "Unknown" -}; - -const char *get_cpu_subtype(struct sh_cpuinfo *c) -{ - return cpu_name[c->type]; -} -EXPORT_SYMBOL(get_cpu_subtype); - -#ifdef CONFIG_PROC_FS -/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ -static const char *cpu_flags[] = { - "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", - "ptea", "llsc", "l2", "op32", "pteaex", NULL -}; - -static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) -{ - unsigned long i; - - seq_printf(m, "cpu flags\t:"); - - if (!c->flags) { - seq_printf(m, " %s\n", cpu_flags[0]); - return; - } - - for (i = 0; cpu_flags[i]; i++) - if ((c->flags & (1 << i))) - seq_printf(m, " %s", cpu_flags[i+1]); - - seq_printf(m, "\n"); -} - -static void show_cacheinfo(struct seq_file *m, const char *type, - struct cache_info info) -{ - unsigned int cache_size; - - cache_size = info.ways * info.sets * info.linesz; - - seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", - type, cache_size >> 10, info.ways); -} - -/* - * Get CPU information for use by the procfs. - */ -static int show_cpuinfo(struct seq_file *m, void *v) -{ - struct sh_cpuinfo *c = v; - unsigned int cpu = c - cpu_data; - - if (!cpu_online(cpu)) - return 0; - - if (cpu == 0) - seq_printf(m, "machine\t\t: %s\n", get_system_type()); - else - seq_printf(m, "\n"); - - seq_printf(m, "processor\t: %d\n", cpu); - seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); - seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); - if (c->cut_major == -1) - seq_printf(m, "cut\t\t: unknown\n"); - else if (c->cut_minor == -1) - seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); - else - seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); - - show_cpuflags(m, c); - - seq_printf(m, "cache type\t: "); - - /* - * Check for what type of cache we have, we support both the - * unified cache on the SH-2 and SH-3, as well as the harvard - * style cache on the SH-4. - */ - if (c->icache.flags & SH_CACHE_COMBINED) { - seq_printf(m, "unified\n"); - show_cacheinfo(m, "cache", c->icache); - } else { - seq_printf(m, "split (harvard)\n"); - show_cacheinfo(m, "icache", c->icache); - show_cacheinfo(m, "dcache", c->dcache); - } - - /* Optional secondary cache */ - if (c->flags & CPU_HAS_L2_CACHE) - show_cacheinfo(m, "scache", c->scache); - - seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); - - seq_printf(m, "bogomips\t: %lu.%02lu\n", - c->loops_per_jiffy/(500000/HZ), - (c->loops_per_jiffy/(5000/HZ)) % 100); - - return 0; -} - -static void *c_start(struct seq_file *m, loff_t *pos) -{ - return *pos < NR_CPUS ? cpu_data + *pos : NULL; -} -static void *c_next(struct seq_file *m, void *v, loff_t *pos) -{ - ++*pos; - return c_start(m, pos); -} -static void c_stop(struct seq_file *m, void *v) -{ -} -const struct seq_operations cpuinfo_op = { - .start = c_start, - .next = c_next, - .stop = c_stop, - .show = show_cpuinfo, -}; -#endif /* CONFIG_PROC_FS */ -- cgit v1.2.1 From 35a96c739fd7624b8edff990a74b86b5a85342da Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 15 Nov 2010 18:18:32 +0900 Subject: sh: clkfwk: Kill off now unused algo_id in set_rate op. Now that clk_set_rate_ex() is gone, there is also no way to get at rate setting algo id, which is now also completely unused. Kill it off before new clock ops start using it. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index 4eabc68cd753..b601fa3978d1 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) return 0; } -static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) +static int shoc_clk_set_rate(struct clk *clk, unsigned long rate) { unsigned long frqcr3; unsigned int tmp; -- cgit v1.2.1 From 2f55ac072f5344519348c0c94b3d2f4cca46847b Mon Sep 17 00:00:00 2001 From: Lionel Debroux Date: Tue, 16 Nov 2010 14:14:02 +0100 Subject: suspend: constify platform_suspend_ops While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849e90a41ea2109bd0e2f7c7164b0c4ce73). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: Lionel Debroux Acked-by: Ingo Molnar Signed-off-by: Jiri Kosina --- arch/sh/kernel/cpu/shmobile/pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c index e55968712706..a6f95ae4aae7 100644 --- a/arch/sh/kernel/cpu/shmobile/pm.c +++ b/arch/sh/kernel/cpu/shmobile/pm.c @@ -141,7 +141,7 @@ static int sh_pm_enter(suspend_state_t state) return 0; } -static struct platform_suspend_ops sh_pm_ops = { +static const struct platform_suspend_ops sh_pm_ops = { .enter = sh_pm_enter, .valid = suspend_valid_only_mem, }; -- cgit v1.2.1 From a6786fdad97d2ef4454f75a11a4f2a3bf67f2348 Mon Sep 17 00:00:00 2001 From: Giuseppe CAVALLARO Date: Wed, 17 Nov 2010 06:51:08 +0000 Subject: sh: avoid to flush all cache in sys_cacheflush Calling sys_cacheflush with ICACHE we can direclty flush the icache without invoking the flush_cache_all function. Signed-off-by: Giuseppe Cavallaro Signed-off-by: Carmelo Amoroso Signed-off-by: Paul Mundt --- arch/sh/kernel/sys_sh.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 81f58371613d..8c6a350df751 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c @@ -88,7 +88,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op) } if (op & CACHEFLUSH_I) - flush_cache_all(); + flush_icache_range(addr, addr+len); up_read(¤t->mm->mmap_sem); return 0; -- cgit v1.2.1 From 94ab115fd3e7f7e7f92f1645bbb6ba5414701b25 Mon Sep 17 00:00:00 2001 From: Giuseppe CAVALLARO Date: Wed, 17 Nov 2010 06:51:52 +0000 Subject: sh: fix vsyscall compilation due to .eh_frame issue This patch fixes the following error obtained when compile the Kernel with the VSYSCALL support enabled: SYSCALL arch/sh/kernel/vsyscall/vsyscall-trapa.so sh4-linux/bin/ld: error in arch/sh/kernel/vsyscall/vsyscall-trapa.o(.eh_frame); no .eh_frame_hdr table will be created. AS arch/sh/kernel/vsyscall/vsyscall-syscall.o Disassembling the vsyscall-trapa.o code, with this fix applied, we get the __kernel_vsyscall symbol defined; otherwise it was missing. Disassembly of section .text: 00000000 <__kernel_vsyscall>: 0: 10 00 .word 0x0010 2: 00 00 .word 0x0000 [snip] 0000040 <__kernel_sigreturn>: 40: 05 93 mov.w 4e <__kernel_sigreturn+0xe>,r3 ! 77 42: 10 c3 trapa #16 [snip] 00000060 <__kernel_rt_sigreturn>: 60: 05 93 mov.w 6e <__kernel_rt_sigreturn+0xe>,r3 ! ad 62: 10 c3 trapa #16 [snip] Signed-off-by: Giuseppe Cavallaro Reviewed-by: Carmelo Amoroso Signed-off-by: Paul Mundt --- arch/sh/kernel/vsyscall/vsyscall-trapa.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S index 3b6eb34c43fa..3e70f851cdc6 100644 --- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S +++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S @@ -8,9 +8,9 @@ __kernel_vsyscall: * fill out .eh_frame -- PFM. */ .LEND_vsyscall: .size __kernel_vsyscall,.-.LSTART_vsyscall - .previous .section .eh_frame,"a",@progbits + .previous .LCIE: .ualong .LCIE_end - .LCIE_start .LCIE_start: -- cgit v1.2.1 From 6d803ba736abb5e122dede70a4720e4843dd6df4 Mon Sep 17 00:00:00 2001 From: Jean-Christop PLAGNIOL-VILLARD Date: Wed, 17 Nov 2010 10:04:33 +0100 Subject: ARM: 6483/1: arm & sh: factorised duplicated clkdev.c factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Paul Mundt Signed-off-by: Russell King --- arch/sh/kernel/Makefile | 2 +- arch/sh/kernel/clkdev.c | 171 --------------------------------- arch/sh/kernel/cpu/clock-cpg.c | 2 +- arch/sh/kernel/cpu/clock.c | 16 --- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7343.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7366.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7757.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7763.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7780.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-sh7786.c | 2 +- arch/sh/kernel/cpu/sh4a/clock-shx3.c | 2 +- 16 files changed, 14 insertions(+), 201 deletions(-) delete mode 100644 arch/sh/kernel/clkdev.c (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 8eed6a485446..cf6522179523 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -11,7 +11,7 @@ endif CFLAGS_REMOVE_return_address.o = -pg -obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ +obj-y := debugtraps.o dma-nommu.o dumpstack.o \ idle.o io.o irq.o irq_$(BITS).o kdebugfs.o \ machvec.o nmi_debug.o process.o \ process_$(BITS).o ptrace.o ptrace_$(BITS).o \ diff --git a/arch/sh/kernel/clkdev.c b/arch/sh/kernel/clkdev.c deleted file mode 100644 index 1f800ef4a735..000000000000 --- a/arch/sh/kernel/clkdev.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * arch/sh/kernel/clkdev.c - * - * Cloned from arch/arm/common/clkdev.c: - * - * Copyright (C) 2008 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Helper for the clk API to assist looking up a struct clk. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); - -/* - * Find the correct struct clk for the device and connection ID. - * We do slightly fuzzy matching here: - * An entry with a NULL ID is assumed to be a wildcard. - * If an entry has a device ID, it must match - * If an entry has a connection ID, it must match - * Then we take the most specific entry - with the following - * order of precedence: dev+con > dev only > con only. - */ -static struct clk *clk_find(const char *dev_id, const char *con_id) -{ - struct clk_lookup *p; - struct clk *clk = NULL; - int match, best = 0; - - list_for_each_entry(p, &clocks, node) { - match = 0; - if (p->dev_id) { - if (!dev_id || strcmp(p->dev_id, dev_id)) - continue; - match += 2; - } - if (p->con_id) { - if (!con_id || strcmp(p->con_id, con_id)) - continue; - match += 1; - } - if (match == 0) - continue; - - if (match > best) { - clk = p->clk; - best = match; - } - } - return clk; -} - -struct clk *clk_get_sys(const char *dev_id, const char *con_id) -{ - struct clk *clk; - - mutex_lock(&clocks_mutex); - clk = clk_find(dev_id, con_id); - mutex_unlock(&clocks_mutex); - - return clk ? clk : ERR_PTR(-ENOENT); -} -EXPORT_SYMBOL(clk_get_sys); - -void clkdev_add(struct clk_lookup *cl) -{ - mutex_lock(&clocks_mutex); - list_add_tail(&cl->node, &clocks); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clkdev_add); - -void __init clkdev_add_table(struct clk_lookup *cl, size_t num) -{ - mutex_lock(&clocks_mutex); - while (num--) { - list_add_tail(&cl->node, &clocks); - cl++; - } - mutex_unlock(&clocks_mutex); -} - -#define MAX_DEV_ID 20 -#define MAX_CON_ID 16 - -struct clk_lookup_alloc { - struct clk_lookup cl; - char dev_id[MAX_DEV_ID]; - char con_id[MAX_CON_ID]; -}; - -struct clk_lookup * __init_refok -clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...) -{ - struct clk_lookup_alloc *cla; - - if (!slab_is_available()) - cla = alloc_bootmem_low_pages(sizeof(*cla)); - else - cla = kzalloc(sizeof(*cla), GFP_KERNEL); - - if (!cla) - return NULL; - - cla->cl.clk = clk; - if (con_id) { - strlcpy(cla->con_id, con_id, sizeof(cla->con_id)); - cla->cl.con_id = cla->con_id; - } - - if (dev_fmt) { - va_list ap; - - va_start(ap, dev_fmt); - vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap); - cla->cl.dev_id = cla->dev_id; - va_end(ap); - } - - return &cla->cl; -} -EXPORT_SYMBOL(clkdev_alloc); - -int clk_add_alias(const char *alias, const char *alias_dev_name, char *id, - struct device *dev) -{ - struct clk *r = clk_get(dev, id); - struct clk_lookup *l; - - if (IS_ERR(r)) - return PTR_ERR(r); - - l = clkdev_alloc(r, alias, alias_dev_name); - clk_put(r); - if (!l) - return -ENODEV; - clkdev_add(l); - return 0; -} -EXPORT_SYMBOL(clk_add_alias); - -/* - * clkdev_drop - remove a clock dynamically allocated - */ -void clkdev_drop(struct clk_lookup *cl) -{ - struct clk_lookup_alloc *cla = container_of(cl, struct clk_lookup_alloc, cl); - - mutex_lock(&clocks_mutex); - list_del(&cl->node); - mutex_unlock(&clocks_mutex); - kfree(cla); -} -EXPORT_SYMBOL(clkdev_drop); diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c index e2f63d68da51..dd0e0f211359 100644 --- a/arch/sh/kernel/cpu/clock-cpg.c +++ b/arch/sh/kernel/cpu/clock-cpg.c @@ -2,7 +2,7 @@ #include #include #include -#include +#include #include static struct clk master_clk = { diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index 50f887dda565..4187cf4fe185 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -48,20 +48,4 @@ int __init clk_init(void) return ret; } -/* - * Returns a clock. Note that we first try to use device id on the bus - * and clock name. If this fails, we try to use clock name only. - */ -struct clk *clk_get(struct device *dev, const char *con_id) -{ - const char *dev_id = dev ? dev_name(dev) : NULL; - - return clk_get_sys(dev_id, con_id); -} -EXPORT_SYMBOL_GPL(clk_get); - -void clk_put(struct clk *clk) -{ -} -EXPORT_SYMBOL_GPL(clk_put); diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index 4eabc68cd753..6c1492b8431a 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c index 71291ae201b9..93c646072c1b 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include /* SH7343 registers */ diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c index 7ce5bbcd4084..049dc0628ccc 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include /* SH7366 registers */ diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index 2030f3d9fac7..9d23a36f0647 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index d3938f0d3702..55493cd5bd8f 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 2d9700c6b53a..527936bb3ce0 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c index ce39a2ae8c6c..e073e3eb4c3d 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c index 1f1df48008cd..599630fc4d3b 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c index 62d706350060..8894926479a6 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c index c3e458aaa2b7..2d960247f3eb 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c index 597c9fbe49c6..42e403be9076 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c index 4f70df6b6169..1afdb93b8ccb 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include -- cgit v1.2.1 From 004417a6d468e24399e383645c068b498eed84ad Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Thu, 25 Nov 2010 18:38:29 +0100 Subject: perf, arch: Cleanup perf-pmu init vs lockup-detector The perf hardware pmu got initialized at various points in the boot, some before early_initcall() some after (notably arch_initcall). The problem is that the NMI lockup detector is ran from early_initcall() and expects the hardware pmu to be present. Sanitize this by moving all architecture hardware pmu implementations to initialize at early_initcall() and move the lockup detector to an explicit initcall right after that. Cc: paulus Cc: davem Cc: Michael Cree Cc: Deng-Cheng Zhu Acked-by: Paul Mundt Acked-by: Will Deacon Signed-off-by: Peter Zijlstra LKML-Reference: <1290707759.2145.119.camel@laptop> Signed-off-by: Ingo Molnar --- arch/sh/kernel/cpu/sh4/perf_event.c | 2 +- arch/sh/kernel/cpu/sh4a/perf_event.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c index dbf3b4bb71fe..748955df018d 100644 --- a/arch/sh/kernel/cpu/sh4/perf_event.c +++ b/arch/sh/kernel/cpu/sh4/perf_event.c @@ -250,4 +250,4 @@ static int __init sh7750_pmu_init(void) return register_sh_pmu(&sh7750_pmu); } -arch_initcall(sh7750_pmu_init); +early_initcall(sh7750_pmu_init); diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c index 580276525731..17e6bebfede0 100644 --- a/arch/sh/kernel/cpu/sh4a/perf_event.c +++ b/arch/sh/kernel/cpu/sh4a/perf_event.c @@ -284,4 +284,4 @@ static int __init sh4a_pmu_init(void) return register_sh_pmu(&sh4a_pmu); } -arch_initcall(sh4a_pmu_init); +early_initcall(sh4a_pmu_init); -- cgit v1.2.1 From 4bd5d259e451d35380de2fcd1a3510ae22d000a3 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 26 Nov 2010 09:40:22 +0000 Subject: sh: Add div6_reparent_clks to clock framework for FSI Current clk_ops doesn't support .init which is used to select external clock on ecovec without CONFIG_SH_CLK_CPG_LEGACY. To solve this problem, this patch add div6_reparent_clks to clock-sh7724. This patch solve compile error too. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 44 ++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 5 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 0fe2e9329cb2..271c0b325a9a 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -111,12 +111,21 @@ static struct clk div3_clk = { .parent = &pll_clk, }; +/* External input clock (pin name: FSIMCKA/FSIMCKB ) */ +struct clk sh7724_fsimcka_clk = { +}; + +struct clk sh7724_fsimckb_clk = { +}; + static struct clk *main_clks[] = { &r_clk, &extal_clk, &fll_clk, &pll_clk, &div3_clk, + &sh7724_fsimcka_clk, + &sh7724_fsimckb_clk, }; static void div4_kick(struct clk *clk) @@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = { [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), }; -enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; +enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR }; static struct clk div6_clks[DIV6_NR] = { [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), - [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), - [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0), [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), }; +enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR }; + +/* Indices are important - they are the actual src selecting values */ +static struct clk *fclkacr_parent[] = { + [0] = &div3_clk, + [1] = NULL, + [2] = &sh7724_fsimcka_clk, + [3] = NULL, +}; + +static struct clk *fclkbcr_parent[] = { + [0] = &div3_clk, + [1] = NULL, + [2] = &sh7724_fsimckb_clk, + [3] = NULL, +}; + +static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { + [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0, + fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), + [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0, + fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), +}; + static struct clk mstp_clks[HWBLK_NR] = { SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), @@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = { /* DIV6 clocks */ CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), - CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), - CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), + CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]), + CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]), CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), @@ -375,6 +406,9 @@ int __init arch_clk_init(void) if (!ret) ret = sh_clk_div6_register(div6_clks, DIV6_NR); + if (!ret) + ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); + if (!ret) ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); -- cgit v1.2.1 From 21b6e4c7106b2d68a6710506d8706608272fd78b Mon Sep 17 00:00:00 2001 From: Carmelo AMOROSO Date: Mon, 13 Dec 2010 10:20:26 +0000 Subject: sh: wire up accept4 syscall (non-multiplexed path) Signed-off-by: Carmelo Amoroso Signed-off-by: Paul Mundt --- arch/sh/kernel/syscalls_32.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index e872e81add8a..6fc347ebe59d 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -375,3 +375,4 @@ ENTRY(sys_call_table) .long sys_sendmsg /* 355 */ .long sys_recvmsg .long sys_recvmmsg + .long sys_accept4 -- cgit v1.2.1 From 2e80a82a49c4c7eca4e35734380f28298ba5db19 Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Wed, 17 Nov 2010 23:17:36 +0100 Subject: perf: Dynamic pmu types Extend the perf_pmu_register() interface to allow for named and dynamic pmu types. Because we need to support the existing static types we cannot use dynamic types for everything, hence provide a type argument. If we want to enumerate the PMUs they need a name, provide one. Signed-off-by: Peter Zijlstra LKML-Reference: <20101117222056.259707703@chello.nl> Signed-off-by: Ingo Molnar --- arch/sh/kernel/perf_event.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c index 5a4b33435650..2ee21a47b5af 100644 --- a/arch/sh/kernel/perf_event.c +++ b/arch/sh/kernel/perf_event.c @@ -389,7 +389,7 @@ int __cpuinit register_sh_pmu(struct sh_pmu *_pmu) WARN_ON(_pmu->num_events > MAX_HWEVENTS); - perf_pmu_register(&pmu); + perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); perf_cpu_notifier(sh_pmu_notifier); return 0; } -- cgit v1.2.1 From 638fa4aad5bbb75c8f0d558aa15dcb543de5fc31 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 24 Dec 2010 11:27:29 +0900 Subject: sh: Fix up SH4-202 clkfwk build. Some of the SH4-202 code was overlooked in the set_rate() API conversion, resulting in: arch/sh/kernel/cpu/sh4/clock-sh4-202.c: error: too many arguments to function 'clk->ops->set_rate' Fix it up. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index b601fa3978d1..6282a839e08e 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -81,8 +81,7 @@ static void shoc_clk_init(struct clk *clk) for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { int divisor = frqcr3_divisors[i]; - if (clk->ops->set_rate(clk, clk->parent->rate / - divisor, 0) == 0) + if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) break; } -- cgit v1.2.1 From 27f1acccd4d310e941d2e879445324595e2fe463 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 24 Dec 2010 12:15:57 +0900 Subject: sh: Fix up SH7201 clkfwk build. The master clock initialization for SH7201 was wholly bogus. Users of the legacy API must initialize the clock rate through the struct clk itself rather than returning the clock frequency. Given that the init function itself is void, returning the frequency isn't terribly effective. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh2a/clock-sh7201.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index b26264dc2aef..c509c40cba4b 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c @@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12}; static void master_clk_init(struct clk *clk) { - return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; + clk->rate = 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; } static struct clk_ops sh7201_master_clk_ops = { -- cgit v1.2.1 From 538e790605be792fc90fe29db42f7e404ab7e5cc Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 7 Jan 2011 10:26:24 +0000 Subject: sh: add PVR probing for SH7757 3rd cut Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/probe.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index b93458f33b74..b1edc90d482b 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -151,6 +151,7 @@ void __cpuinit cpu_probe(void) boot_cpu_data.flags |= CPU_HAS_L2_CACHE; break; case 0x10: + case 0x11: boot_cpu_data.type = CPU_SH7757; break; } -- cgit v1.2.1 From a68a07841848a25fa04918b441667fd192cea108 Mon Sep 17 00:00:00 2001 From: Arnd Hannemann Date: Tue, 28 Dec 2010 22:22:34 +0000 Subject: sh: sh7724 Enable SDIO IRQs This patch enables the interrupt generation for SDIO IRQs of the sdhi controllers of the SoC. To make sure interrupt are handled announce the MMC_CAP_SDIO_IRQ capability on ecovec, kfr2r09 and se7724. Tested with a b43-based SDIO wireless card on ecovec. Signed-off-by: Arnd Hannemann Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 828c9657eb52..c598a7f61b7f 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c @@ -1144,7 +1144,7 @@ static struct intc_group groups[] __initdata = { static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, - 0, DISABLED, ENABLED, ENABLED } }, + 0, ENABLED, ENABLED, ENABLED } }, { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, @@ -1166,7 +1166,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { DISABLED, DISABLED, ENABLED, ENABLED, + { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, SCIFA5, FSI } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, -- cgit v1.2.1 From 464495e5d8ba58ce6c103a2a176abaf313c0c704 Mon Sep 17 00:00:00 2001 From: Arnd Hannemann Date: Tue, 28 Dec 2010 22:22:35 +0000 Subject: sh: sh7722 Enable SDIO IRQs This patch enables the interrupt generation for SDIO IRQs of the sdhi controllers of the SoC. To make sure SDIO IRQs are used, announce the MMC_CAP_SDIO_IRQ capability on migor. Signed-off-by: Arnd Hannemann Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index d551ed8dea95..a164f8924258 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -699,7 +699,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } }, + { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ -- cgit v1.2.1 From 365e108739a4b2b207bd61e066aa6eb9bd1b03c4 Mon Sep 17 00:00:00 2001 From: Arnd Hannemann Date: Tue, 28 Dec 2010 22:22:36 +0000 Subject: sh: sh7723 / ap325rxa enable SDIO IRQs This patch enables the interrupt generation for SDIO IRQs of the sdhi controllers of the SoC. To make sure SDIO IRQs are used announce the MMC_CAP_SDIO_IRQ capability on ap325rxa. Signed-off-by: Arnd Hannemann Acked-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 0eadefdbbba1..d7641221ee42 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -719,7 +719,7 @@ static struct intc_group groups[] __initdata = { static struct intc_mask_reg mask_registers[] __initdata = { { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, - 0, DISABLED, ENABLED, ENABLED } }, + 0, ENABLED, ENABLED, ENABLED } }, { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ @@ -736,7 +736,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { 0, DISABLED, ENABLED, ENABLED, + { 0, ENABLED, ENABLED, ENABLED, 0, 0, SCIFA_SCIFA2, SIU_SIUI } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, -- cgit v1.2.1 From 3a0f4c78999f9e8c1b66ddb98c8326be4b33cb49 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 6 Jan 2011 11:10:09 +0000 Subject: sh: sh7343 Enable SDIO IRQs This patch enables interrupt generation for SDIO IRQs of the SDHI block on the sh7343 processor. Use together with a recent SDHI driver using TMIO_MMC_SDIO_IRQ and with the MMC_CAP_SDIO_IRQ flag in the board code. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 3681cafdb4af..b8e5bc80aa4a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c @@ -360,6 +360,8 @@ void __init plat_early_device_setup(void) enum { UNUSED = 0, + ENABLED, + DISABLED, /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, @@ -375,15 +377,13 @@ enum { I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, - IRDA, - SDHI0, SDHI1, SDHI2, SDHI3, - CMT, TSIF, SIU, + IRDA, SDHI, CMT, TSIF, SIU, TMU0, TMU1, TMU2, JPU, LCDC, /* interrupt groups */ - DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, + DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, USB, }; static struct intc_vect vectors[] __initdata = { @@ -412,8 +412,8 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), - INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), - INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), + INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), + INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), INTC_VECT(SIU, 0xf80), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), @@ -431,7 +431,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), - INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), INTC_GROUP(USB, USBI0, USBI1), }; @@ -452,7 +451,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, + { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ @@ -488,9 +487,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, - mask_registers, prio_registers, sense_registers, - ack_registers); +static struct intc_desc intc_desc __initdata = { + .name = "sh7343", + .force_enable = ENABLED, + .force_disable = DISABLED, + .hw = INTC_HW_DESC(vectors, groups, mask_registers, + prio_registers, sense_registers, ack_registers), +}; void __init plat_irq_setup(void) { -- cgit v1.2.1 From 9bbe7b984096ac45586da2adf26c14069ecb79b2 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 6 Jan 2011 11:12:27 +0000 Subject: sh: sh7366 Enable SDIO IRQs This patch enables interrupt generation for SDIO IRQs of the SDHI block on the sh7366 processor. Use together with a recent SDHI driver using TMIO_MMC_SDIO_IRQ and with the MMC_CAP_SDIO_IRQ flag in the board code. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 8dab9e1bbd89..9b3a6aa9081c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c @@ -319,6 +319,8 @@ void __init plat_early_device_setup(void) enum { UNUSED=0, + ENABLED, + DISABLED, /* interrupt sources */ IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, @@ -332,14 +334,13 @@ enum { DENC, MSIOF, FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, - SDHI0, SDHI1, SDHI2, SDHI3, - CMT, TSIF, SIU, + SDHI, CMT, TSIF, SIU, TMU0, TMU1, TMU2, VEU2, LCDC, /* interrupt groups */ - DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI, + DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, }; static struct intc_vect vectors[] __initdata = { @@ -364,8 +365,8 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), - INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), - INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), + INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), + INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), INTC_VECT(SIU, 0xf80), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), @@ -381,7 +382,6 @@ static struct intc_group groups[] __initdata = { INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), - INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), }; static struct intc_mask_reg mask_registers[] __initdata = { @@ -403,7 +403,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ - { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, + { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0, 0, 0, CMT, 0, USB, } }, { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ @@ -441,9 +441,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, - mask_registers, prio_registers, sense_registers, - ack_registers); +static struct intc_desc intc_desc __initdata = { + .name = "sh7366", + .force_enable = ENABLED, + .force_disable = DISABLED, + .hw = INTC_HW_DESC(vectors, groups, mask_registers, + prio_registers, sense_registers, ack_registers), +}; void __init plat_irq_setup(void) { -- cgit v1.2.1 From 03d8b083511a7be2c69b750b8a4e412a21189291 Mon Sep 17 00:00:00 2001 From: Len Brown Date: Wed, 12 Jan 2011 02:43:26 -0500 Subject: SH, cpuidle: delete use of NOP CPUIDLE_FLAGS_SHALLOW set but not checked. Signed-off-by: Len Brown --- arch/sh/kernel/cpu/shmobile/cpuidle.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c index 83972aa319c2..c19e2a940e3f 100644 --- a/arch/sh/kernel/cpu/shmobile/cpuidle.c +++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c @@ -81,7 +81,6 @@ void sh_mobile_setup_cpuidle(void) state->target_residency = 1 * 2; state->power_usage = 3; state->flags = 0; - state->flags |= CPUIDLE_FLAG_SHALLOW; state->flags |= CPUIDLE_FLAG_TIME_VALID; state->enter = cpuidle_sleep_enter; -- cgit v1.2.1 From fac6c2a891a3e7255e4440f09a4c7da954043ba9 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 12 Jan 2011 10:54:21 +0000 Subject: sh: sh7372 SH4AL-DSP probe support Add probe support for the sh7372 SH4AL-DSP core. The most common use case for this is when the system boots from the ARM core in the sh7372 and uses the SH core for application offload as a slave CPU. May also be used to boot the sh7372 from the SH core. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/proc.c | 2 +- arch/sh/kernel/cpu/sh4/probe.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c index e80a936f409a..f47be8727b3b 100644 --- a/arch/sh/kernel/cpu/proc.c +++ b/arch/sh/kernel/cpu/proc.c @@ -25,7 +25,7 @@ static const char *cpu_name[] = { [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", - [CPU_SH_NONE] = "Unknown" + [CPU_SH7372] = "SH7372", [CPU_SH_NONE] = "Unknown" }; const char *get_cpu_subtype(struct sh_cpuinfo *c) diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index b1edc90d482b..971cf0fce4f5 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -154,6 +154,11 @@ void __cpuinit cpu_probe(void) case 0x11: boot_cpu_data.type = CPU_SH7757; break; + case 0xd0: + case 0x40: /* yon-ten-go */ + boot_cpu_data.type = CPU_SH7372; + break; + } break; case 0x4000: /* 1st cut */ -- cgit v1.2.1 From 24ee7d79c5885275a531431c3b687b3a7919eee4 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Tue, 18 Jan 2011 20:55:34 +0000 Subject: sh: Fix sh build failure when CONFIG_SFC=m CONFIG_SFC=m uses topology_core_cpumask() which, for sh, expects cpu_core_map to be exported. It is not. This patch exports the needed symbol. Signed-off-by: Aurelien Jarno Signed-off-by: Paul Mundt --- arch/sh/kernel/topology.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c index 948fdb656933..38e862852dd0 100644 --- a/arch/sh/kernel/topology.c +++ b/arch/sh/kernel/topology.c @@ -17,6 +17,7 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices); cpumask_t cpu_core_map[NR_CPUS]; +EXPORT_SYMBOL(cpu_core_map); static cpumask_t cpu_coregroup_map(unsigned int cpu) { -- cgit v1.2.1 From 75a9fa0a769a373bda0b0f49101f066618b7effb Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 24 Jan 2011 01:40:17 +0000 Subject: sh: Fix build of sh7750 base boards Renamed platform_register_device to platform_device_register. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/setup-sh7750.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/sh/kernel') diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index c2b0aaaedcae..672944f5b19c 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c @@ -230,10 +230,10 @@ static struct platform_device *sh7750_devices[] __initdata = { static int __init sh7750_devices_setup(void) { if (mach_is_rts7751r2d()) { - platform_register_device(&scif_device); + platform_device_register(&scif_device); } else { - platform_register_device(&sci_device); - platform_register_device(&scif_device); + platform_device_register(&sci_device); + platform_device_register(&scif_device); } return platform_add_devices(sh7750_devices, -- cgit v1.2.1