From 553fdff633b1cb8cfccf554768444c5580a8d7f7 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Tue, 14 Aug 2007 13:52:42 +1000 Subject: [POWERPC] Improve robustness of the UIC cascade handler At present the cascade interrupt handler for the UIC (interrupt controller on 4xx embedded chips) will misbehave badly if it is called spuriously - that is if the handler is invoked when no interrupts are asserted in the child UIC. Although spurious interrupts shouldn't happen, it's good to behave robustly if they do. This patch does so by checking for and ignoring spurious interrupts. Signed-off-by: Valentine Barshak Signed-off-by: David Gibson Acked-by: Josh Boyer Signed-off-by: Paul Mackerras --- arch/powerpc/sysdev/uic.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/powerpc/sysdev/uic.c') diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 22c219e448d4..47180b3fca56 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -266,6 +266,9 @@ irqreturn_t uic_cascade(int virq, void *data) int subvirq; msr = mfdcr(uic->dcrbase + UIC_MSR); + if (!msr) /* spurious interrupt */ + return IRQ_HANDLED; + src = 32 - ffs(msr); subvirq = irq_linear_revmap(uic->irqhost, src); -- cgit v1.2.1