From 9b53a9e28a34ed82516191dc46ae018e0e899546 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 28 Apr 2008 02:15:34 -0700 Subject: fbdev: powerpc: driver for Freescale 8610 and 5121 DIU The following features are supported: plane 0 works as a regular frame buffer, can be accessed by /dev/fb0 plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and /dev/fb2 plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4 Special ioctls support AOIs All /dev/fb* can be used as regular frame buffer devices, except hardware change can only be made through /dev/fb0. Changing pixel clock has no effect on other fbs. Limitation of usage of AOIs: AOIs on the same plane can not be horizonally overlapped AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1 AOIs can not beyond phisical display area. Application should check AOI geometry before changing physical resolution on /dev/fb0 required command line parameters to preallocate memory for frame buffer diufb. optional command line parameters to set modes and monitor video=fslfb:[resolution][,bpp][,monitor] Syntax: Resolution xres x yres-bpp@refresh_rate, the -bpp and @refresh_rate are optional eg, 1024x768, 1280x1024, 1280x1024-32, 1280x1024@60, 1280x1024-32@60, 1280x480-32@60 Bpp bpp=32, bpp=24, or bpp=16 Monitor monitor=0, monitor=1, monitor=2 0 is DVI 1 is Single link LVDS 2 is Double link LVDS Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has three monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So switching monirot port for MPC5121ADS has no effect. If compiled as a module, it takes pamameters mode, bpp, monitor with the same syntax above. Signed-off-by: York Sun Signed-off-by: Timur Tabi Cc: Paul Mackerras Cc: Benjamin Herrenschmidt Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/powerpc/boot/dts/mpc8610_hpcd.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index 16c947b8a721..1f2f1e0a5571 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts @@ -45,6 +45,11 @@ reg = <0x00000000 0x20000000>; // 512M at 0x0 }; + board-control@e8000000 { + compatible = "fsl,fpga-pixis"; + reg = <0xe8000000 32>; // pixis at 0xe8000000 + }; + soc@e0000000 { #address-cells = <1>; #size-cells = <1>; @@ -104,6 +109,13 @@ interrupt-parent = <&mpic>; }; + display@2c000 { + compatible = "fsl,diu"; + reg = <0x2c000 100>; + interrupts = <72 2>; + interrupt-parent = <&mpic>; + }; + mpic: interrupt-controller@40000 { clock-frequency = <0>; interrupt-controller; -- cgit v1.2.1