From 1535ac096d26538888d00881f5026cbc8b6dc20d Mon Sep 17 00:00:00 2001 From: "Steven J. Hill" Date: Thu, 27 Jun 2013 15:27:59 +0000 Subject: MIPS: SEAD3: Disable L2 cache on SEAD-3. The cores used on the SEAD-3 platform do not have L2 caches, so this option should not be turned on. Originally fixed on public 'linux-mti-3.8' release branch. Signed-off-by: Steven J. Hill Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5559/ Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/mips/Kconfig') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 3a3e54cc7703..567c45b33651 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -342,7 +342,6 @@ config MIPS_SEAD3 select DMA_NONCOHERENT select IRQ_CPU select IRQ_GIC - select MIPS_CPU_SCACHE select MIPS_MSC select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 -- cgit v1.2.1