From e7f626db83689f55089717a6d771c57afe1adc1a Mon Sep 17 00:00:00 2001 From: Leif Lindholm Date: Mon, 12 Dec 2011 19:44:49 +0100 Subject: ARM: 7207/1: Use generic ARM instruction set condition code checks for nwfpe. This patch changes the nwfpe implementation to use the new generic ARM instruction set condition code checks, rather than a local implementation. It also removes the existing condition code checking, which has been used for the generic support (in kernel/opcodes.{ch}). This code has not been tested beyond building, linking and booting. Signed-off-by: Leif Lindholm Reviewed-by: Will Deacon Signed-off-by: Russell King --- arch/arm/nwfpe/fpopcode.c | 26 -------------------------- 1 file changed, 26 deletions(-) (limited to 'arch/arm/nwfpe/fpopcode.c') diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c index 922b81107585..ff9834673085 100644 --- a/arch/arm/nwfpe/fpopcode.c +++ b/arch/arm/nwfpe/fpopcode.c @@ -61,29 +61,3 @@ const float32 float32Constant[] = { 0x41200000 /* single 10.0 */ }; -/* condition code lookup table - index into the table is test code: EQ, NE, ... LT, GT, AL, NV - bit position in short is condition code: NZCV */ -static const unsigned short aCC[16] = { - 0xF0F0, // EQ == Z set - 0x0F0F, // NE - 0xCCCC, // CS == C set - 0x3333, // CC - 0xFF00, // MI == N set - 0x00FF, // PL - 0xAAAA, // VS == V set - 0x5555, // VC - 0x0C0C, // HI == C set && Z clear - 0xF3F3, // LS == C clear || Z set - 0xAA55, // GE == (N==V) - 0x55AA, // LT == (N!=V) - 0x0A05, // GT == (!Z && (N==V)) - 0xF5FA, // LE == (Z || (N!=V)) - 0xFFFF, // AL always - 0 // NV -}; - -unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes) -{ - return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1; -} -- cgit v1.2.1