From d9e38040ccf9eb06b9b41c393c512ceb23f51a7f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 23 Jun 2010 07:59:48 +0100 Subject: ARM: 6184/2: ux500: use neutral PRCMU base The MTU wallclock timing fix-up patch was hardwired to the DB8500 causing a regression. This makes it work on the DB5500 as well. Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-ux500/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-ux500/clock.c') diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index fe84b9021c7a..0a1318fc8e2b 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c @@ -131,7 +131,7 @@ EXPORT_SYMBOL(clk_disable); */ static unsigned long clk_mtu_get_rate(struct clk *clk) { - void __iomem *addr = __io_address(U8500_PRCMU_BASE) + void __iomem *addr = __io_address(UX500_PRCMU_BASE) + PRCM_TCR; u32 tcr = readl(addr); int mtu = (int) clk->data; -- cgit v1.2.3