From 8d0b3bf79bfa1dc7d3e2a9dc2b6f2ceea353687f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Oct 2013 06:51:46 +0900 Subject: ARM: shmobile: Add r8a7790_register_pfc() function Break out the r8a7790 PFC platform device creation code to increase readability and follow same style as r8a7791. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index c47bcebbcb00..3543c3bacb75 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -34,6 +34,10 @@ static const struct resource pfc_resources[] __initconst = { DEFINE_RES_MEM(0xe6060000, 0x250), }; +#define r8a7790_register_pfc() \ + platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \ + ARRAY_SIZE(pfc_resources)) + #define R8A7790_GPIO(idx) \ static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \ DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \ @@ -65,8 +69,7 @@ R8A7790_GPIO(5); void __init r8a7790_pinmux_init(void) { - platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, - ARRAY_SIZE(pfc_resources)); + r8a7790_register_pfc(); r8a7790_register_gpio(0); r8a7790_register_gpio(1); r8a7790_register_gpio(2); -- cgit v1.2.1 From b448c904f5058b6cd35bf1a43ca219dcfeca4da6 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 28 Nov 2013 19:02:12 -0800 Subject: ARM: shmobile: r8a7790: add I2C support Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index c47bcebbcb00..1a11e26a9431 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -63,6 +63,27 @@ R8A7790_GPIO(5); &r8a7790_gpio##idx##_platform_data, \ sizeof(r8a7790_gpio##idx##_platform_data)) +static struct resource i2c_resources[] __initdata = { + /* I2C0 */ + DEFINE_RES_MEM(0xE6508000, 0x40), + DEFINE_RES_IRQ(gic_spi(287)), + /* I2C1 */ + DEFINE_RES_MEM(0xE6518000, 0x40), + DEFINE_RES_IRQ(gic_spi(288)), + /* I2C2 */ + DEFINE_RES_MEM(0xE6530000, 0x40), + DEFINE_RES_IRQ(gic_spi(286)), + /* I2C3 */ + DEFINE_RES_MEM(0xE6540000, 0x40), + DEFINE_RES_IRQ(gic_spi(290)), + +}; + +#define r8a7790_register_i2c(idx) \ + platform_device_register_simple( \ + "i2c-rcar", idx, \ + i2c_resources + (2 * idx), 2); \ + void __init r8a7790_pinmux_init(void) { platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, @@ -73,6 +94,10 @@ void __init r8a7790_pinmux_init(void) r8a7790_register_gpio(3); r8a7790_register_gpio(4); r8a7790_register_gpio(5); + r8a7790_register_i2c(0); + r8a7790_register_i2c(1); + r8a7790_register_i2c(2); + r8a7790_register_i2c(3); } #define SCIF_COMMON(scif_type, baseaddr, irq) \ -- cgit v1.2.1 From 302d8898ade1ad5f84cfedc7e8d43ff7720f3f25 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 3 Nov 2013 13:50:31 +0100 Subject: ARM: shmobile: r8a7790: Don't define SCIF platform data in an array The SCIF driver is transitioning to platform resources. Board code will thus need to define an array of resources for each SCIF device. This is incompatible with the macro-based SCIF platform data definition as an array. Rework the macro to define platform data as individual structures. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 112 +++++++++++++++------------------ 1 file changed, 49 insertions(+), 63 deletions(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 1a11e26a9431..b6deb196bea3 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -100,61 +100,47 @@ void __init r8a7790_pinmux_init(void) r8a7790_register_i2c(3); } -#define SCIF_COMMON(scif_type, baseaddr, irq) \ - .type = scif_type, \ - .mapbase = baseaddr, \ - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ - .irqs = SCIx_IRQ_MUXED(irq) - -#define SCIFA_DATA(index, baseaddr, irq) \ -[index] = { \ - SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \ - .scbrr_algo_id = SCBRR_ALGO_4, \ - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ +#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \ +static struct plat_sci_port scif##index##_platform_data = { \ + .type = scif_type, \ + .mapbase = baseaddr, \ + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ + .scbrr_algo_id = algo, \ + .scscr = _scscr, \ + .irqs = SCIx_IRQ_MUXED(irq), \ } -#define SCIFB_DATA(index, baseaddr, irq) \ -[index] = { \ - SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \ - .scbrr_algo_id = SCBRR_ALGO_4, \ - .scscr = SCSCR_RE | SCSCR_TE, \ -} - -#define SCIF_DATA(index, baseaddr, irq) \ -[index] = { \ - SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ - .scbrr_algo_id = SCBRR_ALGO_2, \ - .scscr = SCSCR_RE | SCSCR_TE, \ -} - -#define HSCIF_DATA(index, baseaddr, irq) \ -[index] = { \ - SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \ - .scbrr_algo_id = SCBRR_ALGO_6, \ - .scscr = SCSCR_RE | SCSCR_TE, \ -} - -enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1, - HSCIF0, HSCIF1 }; - -static const struct plat_sci_port scif[] __initconst = { - SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ - SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */ - SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */ - SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */ - SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */ - SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ - SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ - SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ - HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */ - HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */ -}; - -static inline void r8a7790_register_scif(int idx) -{ - platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], - sizeof(struct plat_sci_port)); -} +#define R8A7790_SCIF(index, baseaddr, irq) \ + __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \ + SCBRR_ALGO_2, index, baseaddr, irq) + +#define R8A7790_SCIFA(index, baseaddr, irq) \ + __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ + SCBRR_ALGO_4, index, baseaddr, irq) + +#define R8A7790_SCIFB(index, baseaddr, irq) \ + __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \ + SCBRR_ALGO_4, index, baseaddr, irq) + +#define R8A7790_HSCIF(index, baseaddr, irq) \ + __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \ + SCBRR_ALGO_6, index, baseaddr, irq) + +R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */ +R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */ +R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */ +R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */ +R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */ +R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */ +R8A7790_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */ +R8A7790_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */ +R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */ +R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */ + +#define r8a7790_register_scif(index) \ + platform_device_register_data(&platform_bus, "sh-sci", index, \ + &scif##index##_platform_data, \ + sizeof(scif##index##_platform_data)) static const struct renesas_irqc_config irqc0_data __initconst = { .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ @@ -207,16 +193,16 @@ static const struct resource cmt00_resources[] __initconst = { void __init r8a7790_add_dt_devices(void) { - r8a7790_register_scif(SCIFA0); - r8a7790_register_scif(SCIFA1); - r8a7790_register_scif(SCIFB0); - r8a7790_register_scif(SCIFB1); - r8a7790_register_scif(SCIFB2); - r8a7790_register_scif(SCIFA2); - r8a7790_register_scif(SCIF0); - r8a7790_register_scif(SCIF1); - r8a7790_register_scif(HSCIF0); - r8a7790_register_scif(HSCIF1); + r8a7790_register_scif(0); + r8a7790_register_scif(1); + r8a7790_register_scif(2); + r8a7790_register_scif(3); + r8a7790_register_scif(4); + r8a7790_register_scif(5); + r8a7790_register_scif(6); + r8a7790_register_scif(7); + r8a7790_register_scif(8); + r8a7790_register_scif(9); r8a7790_register_cmt(00); } -- cgit v1.2.1 From c0a384f5ed28031315e5f61220982d31d517e672 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 1 Nov 2013 01:44:07 +0100 Subject: ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as resources Passing the register base address and IRQ through platform data is deprecated. Use resources instead. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index b6deb196bea3..8bfdc3627971 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -103,11 +103,14 @@ void __init r8a7790_pinmux_init(void) #define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \ static struct plat_sci_port scif##index##_platform_data = { \ .type = scif_type, \ - .mapbase = baseaddr, \ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ .scbrr_algo_id = algo, \ .scscr = _scscr, \ - .irqs = SCIx_IRQ_MUXED(irq), \ +}; \ + \ +static struct resource scif##index##_resources[] = { \ + DEFINE_RES_MEM(baseaddr, 0x100), \ + DEFINE_RES_IRQ(irq), \ } #define R8A7790_SCIF(index, baseaddr, irq) \ @@ -138,9 +141,11 @@ R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */ R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */ #define r8a7790_register_scif(index) \ - platform_device_register_data(&platform_bus, "sh-sci", index, \ - &scif##index##_platform_data, \ - sizeof(scif##index##_platform_data)) + platform_device_register_resndata(&platform_bus, "sh-sci", index, \ + scif##index##_resources, \ + ARRAY_SIZE(scif##index##_resources), \ + &scif##index##_platform_data, \ + sizeof(scif##index##_platform_data)) static const struct renesas_irqc_config irqc0_data __initconst = { .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ -- cgit v1.2.1 From 6319ea5089a267b3a1cbd1d745ecc7cdae9a0a7e Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Fri, 6 Dec 2013 10:59:46 +0100 Subject: ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field The field will be removed from the sh-sci driver. Don't set it and let the driver handle baud rate calculation internally. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 8bfdc3627971..66476d21544d 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -100,11 +100,10 @@ void __init r8a7790_pinmux_init(void) r8a7790_register_i2c(3); } -#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \ +#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \ static struct plat_sci_port scif##index##_platform_data = { \ .type = scif_type, \ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ - .scbrr_algo_id = algo, \ .scscr = _scscr, \ }; \ \ @@ -115,19 +114,19 @@ static struct resource scif##index##_resources[] = { \ #define R8A7790_SCIF(index, baseaddr, irq) \ __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \ - SCBRR_ALGO_2, index, baseaddr, irq) + index, baseaddr, irq) #define R8A7790_SCIFA(index, baseaddr, irq) \ __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ - SCBRR_ALGO_4, index, baseaddr, irq) + index, baseaddr, irq) #define R8A7790_SCIFB(index, baseaddr, irq) \ __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \ - SCBRR_ALGO_4, index, baseaddr, irq) + index, baseaddr, irq) #define R8A7790_HSCIF(index, baseaddr, irq) \ __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \ - SCBRR_ALGO_6, index, baseaddr, irq) + index, baseaddr, irq) R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */ R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */ -- cgit v1.2.1 From db455c786886465c4d7fcd012fe2684b4c887776 Mon Sep 17 00:00:00 2001 From: Valentine Barshak Date: Fri, 27 Dec 2013 14:58:08 +0400 Subject: ARM: shmobile: r8a7790: Fix I2C controller names This fixes the issue introduced by the following commit: b448c904f5058b6c "ARM: shmobile: r8a7790: add I2C support" The R8A7790 is an R-Car Gen2 SoC. The clock division factor (CDF) width is 3 bits on Gen2 as opposed to 2 bits on Gen1. Fix the device names for R8A7790 SoC to make the R-Car I2C driver configure the hardware properly. Changes in V2: * rebased on top of the latest branch; * capitalized ARM in the subject line; * noted the commit that caused the issue in the log. Signed-off-by: Valentine Barshak Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7790.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile/setup-r8a7790.c') diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 66476d21544d..d6589f33f31a 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -81,7 +81,7 @@ static struct resource i2c_resources[] __initdata = { #define r8a7790_register_i2c(idx) \ platform_device_register_simple( \ - "i2c-rcar", idx, \ + "i2c-rcar_gen2", idx, \ i2c_resources + (2 * idx), 2); \ void __init r8a7790_pinmux_init(void) -- cgit v1.2.1