From 1d45ac49daa15fd0a64c58744ac9ea6451e607e6 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Thu, 10 Mar 2011 21:53:40 +0900 Subject: ARM: S5P: Add support for common MIPI CSIS/DSIM D-PHY control Add common code for MIPI-CSIS and MIPI-DSIM drivers to support their corresponding D-PHY's enable and reset control. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/mach-s5pv210/include/mach/regs-clock.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-s5pv210/include/mach/regs-clock.h') diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index 4c45b74def5f..78925c516346 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -146,6 +146,10 @@ #define S5P_OM_STAT S5P_CLKREG(0xE100) #define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) #define S5P_DAC_CONTROL S5P_CLKREG(0xE810) +#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) +#define S5P_MIPI_DPHY_ENABLE (1 << 0) +#define S5P_MIPI_DPHY_SRESETN (1 << 1) +#define S5P_MIPI_DPHY_MRESETN (1 << 2) #define S5P_INFORM0 S5P_CLKREG(0xF000) #define S5P_INFORM1 S5P_CLKREG(0xF004) @@ -161,7 +165,6 @@ #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) -#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814) #define S5P_IDLE_CFG_TL_MASK (3 << 30) #define S5P_IDLE_CFG_TM_MASK (3 << 28) -- cgit v1.2.1