From 9ce35884bd961700d34f8a5d908645be2fd0ba76 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Wed, 23 Jul 2014 15:00:38 +0200 Subject: ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code do_armada_370_xp_cpu_suspend() and armada_370_xp_pmsu_idle_prepare(), have been merged into a single function called armada_370_xp_pmsu_idle_enter() by the commit "bbb92284b6c8 ARM: mvebu: slightly refactor/rename PMSU idle related functions", in prepare for the introduction of the CPU hotplug support for Armada XP. But for cpuidle the prepare function will be common to all the mvebu SoCs that use the PMSU, while the suspend function will be specific to each SoC. Keeping the prepare function separate will help reducing code duplication while new SoC support is added. Signed-off-by: Gregory CLEMENT Signed-off-by: Thomas Petazzoni Link: https://lkml.kernel.org/r/1406120453-29291-2-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/pmsu.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mvebu') diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index b31a8293a347..5fda549d1c6b 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c @@ -143,7 +143,7 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void) } /* No locking is needed because we only access per-CPU registers */ -int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) +static int armada_370_xp_prepare(unsigned long deepidle) { unsigned int hw_cpu = cpu_logical_map(smp_processor_id()); u32 reg; @@ -179,6 +179,17 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) reg |= PMSU_CPU_POWER_DOWN_DIS_SNP_Q_SKIP; writel(reg, pmsu_mp_base + PMSU_CPU_POWER_DOWN_CONTROL(hw_cpu)); + return 0; +} + +int armada_370_xp_pmsu_idle_enter(unsigned long deepidle) +{ + int ret; + + ret = armada_370_xp_prepare(deepidle); + if (ret) + return ret; + v7_exit_coherency_flush(all); ll_disable_coherency(); -- cgit v1.2.1