From c8e42de6efcf4e9bed79a8b030261d799ea1960a Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 25 Feb 2010 16:24:41 -0800 Subject: davinci: DM365: fix duplicate default IRQ priorities IRQ 29 has two possible interrupts DDRINT and RTC, but having both in the default priority table is confusing (and triggers a warning from sparse.) This patch removes the lower priority DDRINT from the default priority table leaving the RTC setting as the default. Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 27772e18e45b..0d6ee583f65c 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -758,7 +758,6 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { [IRQ_MMCINT] = 7, [IRQ_DM365_MMCINT1] = 7, [IRQ_DM365_PWMINT3] = 7, - [IRQ_DDRINT] = 4, [IRQ_AEMIFINT] = 2, [IRQ_DM365_SDIOINT1] = 2, [IRQ_TINT0_TINT12] = 7, -- cgit v1.2.1 From 28552c2eae472a0a52d1cdb02eb32766c7f690e1 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 25 Feb 2010 15:36:38 -0800 Subject: davinci: misc cleanups from sparse - Convert data/functions to static - include headers for missing declarations - pointer cleanups: struct foo *__iomem f --> struct foo __iomem *f; Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 0d6ee583f65c..871be5af2735 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1010,7 +1010,7 @@ static void __iomem *dm365_psc_bases[] = { IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), }; -struct davinci_timer_info dm365_timer_info = { +static struct davinci_timer_info dm365_timer_info = { .timers = davinci_timer_instance, .clockevent_id = T0_BOT, .clocksource_id = T0_TOP, -- cgit v1.2.1 From ce100669d2ee202acac94d39f1a585c6b066cecc Mon Sep 17 00:00:00 2001 From: Thomas Koeller Date: Thu, 8 Apr 2010 17:01:56 +0200 Subject: davinci: DM365: Allow use of GPIO64_57 Extended the MUX configuration to allow use of GPIO terminals 64..57. Signed-off-by: Thomas Koeller Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 871be5af2735..1ee3fc818174 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -576,6 +576,7 @@ MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false) MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false) +MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false) MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false) MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false) -- cgit v1.2.1 From 686b634a07451fc4fe3b712fe211bfa861a53241 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Sat, 1 May 2010 18:37:54 -0400 Subject: Davinci: gpio - controller type support This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by: Cyril Chemparathy Tested-by: Sandeep Paulraj Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 1ee3fc818174..05666754aebe 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1064,6 +1064,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .intc_irq_prios = dm365_default_priorities, .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm365_timer_info, + .gpio_type = GPIO_TYPE_DAVINCI, .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), .gpio_num = 104, .gpio_irq = IRQ_DM365_GPIO0, -- cgit v1.2.1 From 5b3a05ca911688c53680f2b020a1512b9da29c89 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Sat, 1 May 2010 18:38:27 -0400 Subject: Davinci: eliminate pinmux offset verbosity Pinmux registers are sequential, and do not need to be enumerated out as they currently are. This reduces code volume and keeps things simple. If some future SoC comes up with a discontiguous register map, PINMUX() can then be expanded with local token pasting. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 05666754aebe..f2b1d93b2256 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -467,11 +467,6 @@ static struct clk_lookup dm365_clks[] = { /*----------------------------------------------------------------------*/ -#define PINMUX0 0x00 -#define PINMUX1 0x04 -#define PINMUX2 0x08 -#define PINMUX3 0x0c -#define PINMUX4 0x10 #define INTMUX 0x18 #define EVTMUX 0x1c -- cgit v1.2.1 From c78a5bc2e77e8fc5be29cda5b28c9b9afd0f4b6d Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Sat, 1 May 2010 18:38:28 -0400 Subject: Davinci: watchdog reset separation across socs The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by: Cyril Chemparathy Tested-by: Sandeep Paulraj Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index f2b1d93b2256..ed7645088052 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1068,6 +1068,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .emac_pdata = &dm365_emac_pdata, .sram_dma = 0x00010000, .sram_len = SZ_32K, + .reset_device = &davinci_wdt_device, }; void __init dm365_init_asp(struct snd_platform_data *pdata) -- cgit v1.2.1 From b8d44293952e4b32b8595d924a377351f3cd1565 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:32 -0400 Subject: Davinci: gpio - use ioremap() This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index ed7645088052..ecdbc676b4dd 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1060,7 +1060,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm365_timer_info, .gpio_type = GPIO_TYPE_DAVINCI, - .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), + .gpio_base = DAVINCI_GPIO_BASE, .gpio_num = 104, .gpio_irq = IRQ_DM365_GPIO0, .gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */ -- cgit v1.2.1 From 3347db8392486a1b52aab980cc445cf505c36d45 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:34 -0400 Subject: Davinci: jtag_id - use ioremap() This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index ecdbc676b4dd..b396d58f130a 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1045,7 +1045,7 @@ static struct platform_device dm365_serial_device = { static struct davinci_soc_info davinci_soc_info_dm365 = { .io_desc = dm365_io_desc, .io_desc_num = ARRAY_SIZE(dm365_io_desc), - .jtag_id_base = IO_ADDRESS(0x01c40028), + .jtag_id_reg = 0x01c40028, .ids = dm365_ids, .ids_num = ARRAY_SIZE(dm365_ids), .cpu_clks = dm365_clks, -- cgit v1.2.1 From e4c822c7e98cdda78b10a696b030fc20b22dcab4 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:36 -0400 Subject: Davinci: psc - use ioremap() This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index b396d58f130a..451a4efb7ddf 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1002,9 +1002,7 @@ static struct davinci_id dm365_ids[] = { }, }; -static void __iomem *dm365_psc_bases[] = { - IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), -}; +static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; static struct davinci_timer_info dm365_timer_info = { .timers = davinci_timer_instance, -- cgit v1.2.1 From bd808947040ba53b2b0e52dde598a9414fb27bba Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:37 -0400 Subject: Davinci: aintc/cpintc - use ioremap() This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 451a4efb7ddf..be340ed1b707 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1052,7 +1052,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), - .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), + .intc_base = DAVINCI_ARM_INTC_BASE, .intc_type = DAVINCI_INTC_TYPE_AINTC, .intc_irq_prios = dm365_default_priorities, .intc_irq_num = DAVINCI_N_AINTC_IRQ, -- cgit v1.2.1 From 779b0d53ca41873d59225eb776c5d4493a0abd0f Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:38 -0400 Subject: Davinci: pinmux - use ioremap() This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index be340ed1b707..e5e3dce4cfba 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1049,7 +1049,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .cpu_clks = dm365_clks, .psc_bases = dm365_psc_bases, .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), .intc_base = DAVINCI_ARM_INTC_BASE, -- cgit v1.2.1 From 2168e76d6ba061fcc95095a3f54ceef8588cbb90 Mon Sep 17 00:00:00 2001 From: Thomas Koeller Date: Tue, 11 May 2010 17:06:47 +0200 Subject: DM365: Added PINMUX definitions for GPIO30..32 Board code may want to use them. Signed-off-by: Thomas Koeller Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index e5e3dce4cfba..dd7c204dff28 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -569,6 +569,9 @@ MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false) MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) +MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false) +MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false) +MUX_CFG(DM365, GPIO32, 4, 10, 3, 0, false) MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false) MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false) MUX_CFG(DM365, GPIO64_57, 2, 6, 1, 0, false) -- cgit v1.2.1 From 0efe2b7442caaf087e56ae9b68fa5f61f4761fa8 Mon Sep 17 00:00:00 2001 From: Thomas Koeller Date: Tue, 11 May 2010 17:06:48 +0200 Subject: DM365: Make CLKOUTx available Added PINMUX configurations for the CLKOUT0 .. CLKOUT2 functions, for boards that want to use these clocks. Signed-off-by: Thomas Koeller Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index dd7c204dff28..d0d24d4e9503 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -568,6 +568,10 @@ MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false) MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false) MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) +MUX_CFG(DM365, CLKOUT0, 4, 20, 3, 3, false) +MUX_CFG(DM365, CLKOUT1, 4, 16, 3, 3, false) +MUX_CFG(DM365, CLKOUT2, 4, 8, 3, 3, false) + MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) MUX_CFG(DM365, GPIO30, 4, 6, 3, 0, false) MUX_CFG(DM365, GPIO31, 4, 8, 3, 0, false) -- cgit v1.2.1 From 7735227e76e1660e448ec66c30e7bfd06f7cd9b7 Mon Sep 17 00:00:00 2001 From: Thomas Koeller Date: Tue, 11 May 2010 17:06:49 +0200 Subject: DM365: Added more PINMUX configurations for AEMIF More complete AEMIF support for boards. Signed-off-by: Thomas Koeller Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/dm365.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/dm365.c') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index d0d24d4e9503..a146849d78f0 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -485,11 +485,14 @@ MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false) MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false) MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false) -MUX_CFG(DM365, AEMIF_AR, 2, 0, 3, 1, false) +MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false) +MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false) MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false) MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false) MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false) MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false) +MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false) +MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false) MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false) MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false) -- cgit v1.2.1