From 2ecccf90f2a6d821af4d33f086d59895e5d3bedc Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 17:58:35 +0100 Subject: ARM: 7029/1: Make cpu_architecture into a global variable The CPU architecture really should not be changing at runtime, so make it a global variable instead of a function. The cpu_architecture() function declared in remains the correct way to read this variable from C code. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Signed-off-by: Russell King --- arch/arm/kernel/setup.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index e514c76043b4..10fce616e995 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include #include #include @@ -42,6 +44,7 @@ #include #include #include +#include #include #include @@ -115,6 +118,13 @@ struct outer_cache_fns outer_cache __read_mostly; EXPORT_SYMBOL(outer_cache); #endif +/* + * Cached cpu_architecture() result for use by assembler code. + * C code should use the cpu_architecture() function instead of accessing this + * variable directly. + */ +int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN; + struct stack { u32 irq[3]; u32 abt[3]; @@ -210,7 +220,7 @@ static const char *proc_arch[] = { "?(17)", }; -int cpu_architecture(void) +static int __get_cpu_architecture(void) { int cpu_arch; @@ -243,6 +253,13 @@ int cpu_architecture(void) return cpu_arch; } +int __pure cpu_architecture(void) +{ + BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN); + + return __cpu_architecture; +} + static int cpu_has_aliasing_icache(unsigned int arch) { int aliasing_icache; @@ -414,6 +431,7 @@ static void __init setup_processor(void) } cpu_name = list->cpu_name; + __cpu_architecture = __get_cpu_architecture(); #ifdef MULTI_CPU processor = *list->proc; -- cgit v1.2.1 From 85519189df91c8aa9c368de0bdcfd7812200e614 Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 17:59:27 +0100 Subject: ARM: 7030/1: entry: Remove unnecessary masking when decoding Thumb-2 instructions When testing whether a Thumb-2 instruction is 32 bits long or not, the masking done in order to test bits 11-15 of the first instruction halfword won't affect the result of the comparison, so remove it. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index a87cbf889ff4..b7236d400aeb 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -262,8 +262,7 @@ __und_svc: ldr r0, [r4, #-4] #else ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 - and r9, r0, #0xf800 - cmp r9, #0xe800 @ 32-bit instruction if xx >= 0 + cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 ldrhhs r9, [r4] @ bottom 16 bits orrhs r0, r9, r0, lsl #16 #endif @@ -445,8 +444,7 @@ __und_usr: ARM( ldrht r5, [r4], #2 ) THUMB( ldrht r5, [r4] ) THUMB( add r4, r4, #2 ) - and r0, r5, #0xf800 @ mask bits 111x x... .... .... - cmp r0, #0xe800 @ 32bit instruction if xx != 0 + cmp r5, #0xe800 @ 32bit instruction if xx != 0 blo __und_usr_unknown 3: ldrht r0, [r4] add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 -- cgit v1.2.1 From ef4c53687e0adf5409896c4fa688b15f8d4dc0c0 Mon Sep 17 00:00:00 2001 From: Dave Martin Date: Fri, 19 Aug 2011 18:00:08 +0100 Subject: ARM: 7031/1: entry: Fix Thumb-2 undef handling for multi-CPU kernels When v6 and >=v7 boards are supported in the same kernel, the __und_usr code currently makes a build-time assumption that Thumb-2 instructions occurring in userspace don't need to be supported. Strictly speaking this is incorrect. This patch fixes the above case by doing a run-time check on the CPU architecture in these cases. This only affects kernels which support v6 and >=v7 CPUs together: plain v6 and plain v7 kernels are unaffected. Signed-off-by: Dave Martin Reviewed-by: Jon Medhurst Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index b7236d400aeb..9ad50c4208ae 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -24,6 +24,7 @@ #include #include #include +#include #include "entry-header.S" #include @@ -439,7 +440,27 @@ __und_usr: #endif beq call_fpe @ Thumb instruction -#if __LINUX_ARM_ARCH__ >= 7 +#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 +/* + * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms + * can never be supported in a single kernel, this code is not applicable at + * all when __LINUX_ARM_ARCH__ < 6. This allows simplifying assumptions to be + * made about .arch directives. + */ +#if __LINUX_ARM_ARCH__ < 7 +/* If the target CPU may not be Thumb-2-capable, a run-time check is needed: */ +#define NEED_CPU_ARCHITECTURE + ldr r5, .LCcpu_architecture + ldr r5, [r5] + cmp r5, #CPU_ARCH_ARMv7 + blo __und_usr_unknown +/* + * The following code won't get run unless the running CPU really is v7, so + * coding round the lack of ldrht on older arches is pointless. Temporarily + * override the assembler target arch with the minimum required instead: + */ + .arch armv6t2 +#endif 2: ARM( ldrht r5, [r4], #2 ) THUMB( ldrht r5, [r4] ) @@ -449,7 +470,16 @@ __und_usr: 3: ldrht r0, [r4] add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 orr r0, r0, r5, lsl #16 + +#if __LINUX_ARM_ARCH__ < 7 +/* If the target arch was overridden, change it back: */ +#ifdef CONFIG_CPU_32v6K + .arch armv6k #else + .arch armv6 +#endif +#endif /* __LINUX_ARM_ARCH__ < 7 */ +#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */ b __und_usr_unknown #endif UNWIND(.fnend ) @@ -576,6 +606,12 @@ call_fpe: movw_pc lr @ CP#14 (Debug) movw_pc lr @ CP#15 (Control) +#ifdef NEED_CPU_ARCHITECTURE + .align 2 +.LCcpu_architecture: + .word __cpu_architecture +#endif + #ifdef CONFIG_NEON .align 6 -- cgit v1.2.1 From b380ab4f85d641574d91b12b333848a0731a497c Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Wed, 31 Aug 2011 02:04:06 +0100 Subject: ARM: 7068/1: process: change from __backtrace to dump_stack in show_regs Currently, show_regs calls __backtrace which does nothing if CONFIG_FRAME_POINTER is not set. Switch to dump_stack which handles both CONFIG_FRAME_POINTER and CONFIG_ARM_UNWIND correctly. __backtrace is now superseded by dump_stack in general and show_regs was the last caller so remove __backtrace as well. Signed-off-by: Laura Abbott Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 3 --- arch/arm/kernel/process.c | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index aeef960ff795..8e3c6f11b0a1 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -49,9 +49,6 @@ extern void __aeabi_ulcmp(void); extern void fpundefinstr(void); - -EXPORT_SYMBOL(__backtrace); - /* platform dependent support */ EXPORT_SYMBOL(__udelay); EXPORT_SYMBOL(__const_udelay); diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 1a347f481e5e..fd0814076ff6 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -319,7 +319,7 @@ void show_regs(struct pt_regs * regs) printk("\n"); printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm); __show_regs(regs); - __backtrace(); + dump_stack(); } ATOMIC_NOTIFIER_HEAD(thread_notify_head); -- cgit v1.2.1 From 87e040b6456fd3416a1f6831c1eedaef5c0a94ff Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 16 Aug 2011 23:44:26 +0100 Subject: ARM: 7017/1: Use generic BUG() handler ARM uses its own BUG() handler which makes its output slightly different from other archtectures. One of the problems is that the ARM implementation doesn't report the function with the BUG() in it, but always reports the PC being in __bug(). The generic implementation doesn't have this problem. Currently we get something like: kernel BUG at fs/proc/breakme.c:35! Unable to handle kernel NULL pointer dereference at virtual address 00000000 ... PC is at __bug+0x20/0x2c With this patch it displays: kernel BUG at fs/proc/breakme.c:35! Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP ... PC is at write_breakme+0xd0/0x1b4 This implementation uses an undefined instruction to implement BUG, and sets up a bug table containing the relevant information. Many versions of gcc do not support %c properly for ARM (inserting a # when they shouldn't) so we work around this using distasteful macro magic. v1: Initial version to replace existing ARM BUG() implementation with something more similar to other architectures. v2: Add Thumb support, remove backtrace whitespace output changes. Change to use macros instead of requiring the asm %d flag to work (thanks to Dave Martin ) v3: Remove old BUG() implementation in favor of this one. Remove the Backtrace: message (will submit this separately). Use ARM_EXIT_KEEP() so that some architectures can dump exit text at link time thanks to Stephen Boyd (although since we always define GENERIC_BUG this might be academic.) Rebase to linux-2.6.git master. v4: Allow BUGS in modules (these were not reported correctly in v3) (thanks to Stephen Boyd for suggesting that.) Remove __bug() as this is no longer needed. v5: Add %progbits as the section flags. Signed-off-by: Simon Glass Reviewed-by: Stephen Boyd Tested-by: Stephen Boyd Signed-off-by: Russell King --- arch/arm/kernel/traps.c | 31 +++++++++++++++++++++---------- arch/arm/kernel/vmlinux.lds.S | 3 ++- 2 files changed, 23 insertions(+), 11 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index bc9f9da782cb..74969248c375 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -270,6 +271,8 @@ void die(const char *str, struct pt_regs *regs, int err) spin_lock_irq(&die_lock); console_verbose(); bust_spinlocks(1); + if (!user_mode(regs)) + report_bug(regs->ARM_pc, regs); ret = __die(str, err, thread, regs); if (regs && kexec_should_crash(thread->task)) @@ -301,6 +304,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs, } } +#ifdef CONFIG_GENERIC_BUG + +int is_valid_bugaddr(unsigned long pc) +{ +#ifdef CONFIG_THUMB2_KERNEL + unsigned short bkpt; +#else + unsigned long bkpt; +#endif + + if (probe_kernel_address((unsigned *)pc, bkpt)) + return 0; + + return bkpt == BUG_INSTR_VALUE; +} + +#endif + static LIST_HEAD(undef_hook); static DEFINE_SPINLOCK(undef_lock); @@ -706,16 +727,6 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs) arm_notify_die("unknown data abort code", regs, &info, instr, 0); } -void __attribute__((noreturn)) __bug(const char *file, int line) -{ - printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line); - *(int *)0 = 0; - - /* Avoid "noreturn function does return" */ - for (;;); -} -EXPORT_SYMBOL(__bug); - void __readwrite_bug(const char *fn) { printk("%s called, but not implemented\n", fn); diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index bf977f8514f6..7b2541efd9f8 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -21,7 +21,8 @@ #define ARM_CPU_KEEP(x) #endif -#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK) +#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \ + defined(CONFIG_GENERIC_BUG) #define ARM_EXIT_KEEP(x) x #else #define ARM_EXIT_KEEP(x) -- cgit v1.2.1 From 0744a3ee37784dfda0025963716a36c3f1e3adcc Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 20 Dec 2010 10:37:50 +0000 Subject: ARM: platform fixups: remove mdesc argument to fixup function Get rid of the mdesc pointer in the fixup function call. No one uses the mdesc pointer, it shouldn't be modified anyway, and we can't wrap it, so let's remove it. Platform files found by: $ regexp=$(git grep -h '\.fixup.*=' arch/arm | sed 's!.*= *\([^,]*\),* *!\1!' | sort -u | tr '\n' '|' | sed 's,|$,,;s,|,\\|,g') $ git grep $regexp arch/arm Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 10fce616e995..93e39a3d2c1e 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -879,7 +879,7 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr) } if (mdesc->fixup) - mdesc->fixup(mdesc, tags, &from, &meminfo); + mdesc->fixup(tags, &from, &meminfo); if (tags->hdr.tag == ATAG_CORE) { if (meminfo.nr_banks != 0) -- cgit v1.2.1 From 7f94e9cc5e965519d865bf20215036f359a1e299 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 23 Aug 2011 22:22:11 +0100 Subject: ARM: 7062/1: cache: detect PIPT I-cache using CTR The Cache Type Register L1Ip field identifies I-caches with a PIPT policy using the encoding 11b. This patch extends the cache policy parsing to identify PIPT I-caches correctly and prevent them from being treated as VIPT aliasing in cases where they are sufficiently large. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/setup.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 93e39a3d2c1e..3fe93f75b55a 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -265,6 +265,10 @@ static int cpu_has_aliasing_icache(unsigned int arch) int aliasing_icache; unsigned int id_reg, num_sets, line_size; + /* PIPT caches never alias. */ + if (icache_is_pipt()) + return 0; + /* arch specifies the register format */ switch (arch) { case CPU_ARCH_ARMv7: @@ -299,8 +303,14 @@ static void __init cacheid_init(void) /* ARMv7 register format */ arch = CPU_ARCH_ARMv7; cacheid = CACHEID_VIPT_NONALIASING; - if ((cachetype & (3 << 14)) == 1 << 14) + switch (cachetype & (3 << 14)) { + case (1 << 14): cacheid |= CACHEID_ASID_TAGGED; + break; + case (3 << 14): + cacheid |= CACHEID_PIPT; + break; + } } else { arch = CPU_ARCH_ARMv6; if (cachetype & (1 << 23)) @@ -317,10 +327,11 @@ static void __init cacheid_init(void) printk("CPU: %s data cache, %s instruction cache\n", cache_is_vivt() ? "VIVT" : cache_is_vipt_aliasing() ? "VIPT aliasing" : - cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown", + cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown", cache_is_vivt() ? "VIVT" : icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : icache_is_vipt_aliasing() ? "VIPT aliasing" : + icache_is_pipt() ? "PIPT" : cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); } -- cgit v1.2.1 From 2b034922af2caa19df86f0c502e76cb6f6e910f9 Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Fri, 23 Sep 2011 09:04:09 +0100 Subject: ARM: 7098/1: kdump: copy kernel relocation code at the kexec prepare stage This copy really don't need to do at the very second before the kernel would crash. Signed-off-by: Lei Wen Acked-by: Simon Horman Signed-off-by: Russell King --- arch/arm/kernel/machine_kexec.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index e59bbd496c39..c1b4463dcc83 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -32,6 +32,24 @@ static atomic_t waiting_for_crash_ipi; int machine_kexec_prepare(struct kimage *image) { + unsigned long page_list; + void *reboot_code_buffer; + page_list = image->head & PAGE_MASK; + + reboot_code_buffer = page_address(image->control_code_page); + + /* Prepare parameters for reboot_code_buffer*/ + kexec_start_address = image->start; + kexec_indirection_page = page_list; + kexec_mach_type = machine_arch_type; + kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; + + /* copy our kernel relocation code to the control code page */ + memcpy(reboot_code_buffer, + relocate_new_kernel, relocate_new_kernel_size); + + flush_icache_range((unsigned long) reboot_code_buffer, + (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); return 0; } @@ -82,31 +100,14 @@ void (*kexec_reinit)(void); void machine_kexec(struct kimage *image) { - unsigned long page_list; unsigned long reboot_code_buffer_phys; void *reboot_code_buffer; - - page_list = image->head & PAGE_MASK; - /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); - /* Prepare parameters for reboot_code_buffer*/ - kexec_start_address = image->start; - kexec_indirection_page = page_list; - kexec_mach_type = machine_arch_type; - kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; - - /* copy our kernel relocation code to the control code page */ - memcpy(reboot_code_buffer, - relocate_new_kernel, relocate_new_kernel_size); - - - flush_icache_range((unsigned long) reboot_code_buffer, - (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) -- cgit v1.2.1 From b55fa18817743c3c4aef14f0c6fc0e21d7bc1e62 Mon Sep 17 00:00:00 2001 From: Afzal Mohammed Date: Thu, 20 Oct 2011 19:32:07 +0100 Subject: ARM: 7137/1: Fix error upon adding LL debug Upon adding new board LL debug support, if the resultant code addition would not cause PC relative offset of "hexbuf" from "adr r2, hexbuf" (+2) instruction to be representable in a shifted 8-bit value (hence indirectly putting higher aligment requirement on larger offsets), following error occurs, arch/arm/kernel/debug.S: Assembler messages: arch/arm/kernel/debug.S:138: Error: invalid constant (428) after fixup Fix it by bringing "hexbuf" closer so that "adr" can have the offset. Signed-off-by: Afzal Mohammed Acked-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/kernel/debug.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index bcd66e00bdbe..0f852d082fcf 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S @@ -151,6 +151,8 @@ printhex: adr r2, hexbuf b printascii ENDPROC(printhex2) +hexbuf: .space 16 + .ltorg ENTRY(printascii) @@ -175,5 +177,3 @@ ENTRY(printch) mov r0, #0 b 1b ENDPROC(printch) - -hexbuf: .space 16 -- cgit v1.2.1 From eb0474544bc16a9dab53b26abd846e86ba814eb1 Mon Sep 17 00:00:00 2001 From: Thomas Gleinxer Date: Fri, 14 Oct 2011 12:44:41 +0100 Subject: ARM: 7133/1: SMP: fix per cpu timer setup before the cpu is marked online The problem is related to the early enabling of interrupts and the per cpu timer setup before the cpu is marked online. This doesn't need to be done in order to call calibrate_delay(). calibrate_delay() monitors jiffies, which are updated from the CPU which is waiting for the new CPU to set the online bit. So simply calibrate_delay() can be called on the new CPU just from the interrupt disabled region and move the local timer setup after stored the cpu data and before enabling interrupts. This solves both the cpu_online vs. cpu_active problem and the affinity setting of the per cpu timers. Signed-off-by: Thomas Gleinxer Signed-off-by: Kukjin Kim Signed-off-by: Russell King --- arch/arm/kernel/smp.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'arch/arm/kernel') diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d88ff0230e82..697e9a8cbdd8 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -301,17 +301,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) */ platform_secondary_init(cpu); - /* - * Enable local interrupts. - */ notify_cpu_starting(cpu); - local_irq_enable(); - local_fiq_enable(); - - /* - * Setup the percpu timer for this CPU. - */ - percpu_timer_setup(); calibrate_delay(); @@ -323,9 +313,22 @@ asmlinkage void __cpuinit secondary_start_kernel(void) * before we continue. */ set_cpu_online(cpu, true); + + /* + * Setup the percpu timer for this CPU. + */ + percpu_timer_setup(); + while (!cpu_active(cpu)) cpu_relax(); + /* + * cpu_active bit is set, so it's safe to enalbe interrupts + * now. + */ + local_irq_enable(); + local_fiq_enable(); + /* * OK, it's off to the idle thread for us */ -- cgit v1.2.1