From 7ac9b9eb338d3960fbc044cb76790f4aab4fbb22 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Tue, 10 Jan 2012 19:44:19 +0000 Subject: ARM: highbank: convert to twd_local_timer_register() interface Add support for the new smp_twd runtime registration interface to the highbank platforms, and remove the old compile-time support. The highbank DTS file is updated to match the TWD DT documentation and fixes the timer trigger (rising edge). Acked-by: Rob Herring Signed-off-by: Marc Zyngier --- arch/arm/boot/dts/highbank.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 305635bd45c0..37c0ff9c8b90 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -72,15 +72,15 @@ ranges; timer@fff10600 { - compatible = "arm,smp-twd"; + compatible = "arm,cortex-a9-twd-timer"; reg = <0xfff10600 0x20>; - interrupts = <1 13 0xf04>; + interrupts = <1 13 0xf01>; }; watchdog@fff10620 { - compatible = "arm,cortex-a9-wdt"; + compatible = "arm,cortex-a9-twd-wdt"; reg = <0xfff10620 0x20>; - interrupts = <1 14 0xf04>; + interrupts = <1 14 0xf01>; }; intc: interrupt-controller@fff11000 { -- cgit v1.2.1 From 58458e0327f7a34ef9c8bc512290bf47e3de811b Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Tue, 10 Jan 2012 19:44:19 +0000 Subject: ARM: imx6q: convert to twd_local_timer_register() interface Add support for the new smp_twd runtime registration interface to the imx6q platforms, and remove the old compile-time support. The imx6q DTS file is updated to match the TWD DT documentation. Also present in this patch a DTS fix to the timer interrupt routing (the PPI connection uses bits [15:8]) and trigger (rising edge). Acked-by: Shawn Guo Signed-off-by: Marc Zyngier --- arch/arm/boot/dts/imx6q.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 263e8f3664b5..4905f51a106f 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -88,9 +88,9 @@ ranges; timer@00a00600 { - compatible = "arm,smp-twd"; - reg = <0x00a00600 0x100>; - interrupts = <1 13 0xf4>; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x00a00600 0x20>; + interrupts = <1 13 0xf01>; }; L2: l2-cache@00a02000 { -- cgit v1.2.1 From 2d334297c6b816619d6c2c28bccec3b5a7e8a0d9 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 7 Mar 2012 15:04:07 +0000 Subject: ARM: ux500: Initial Device Tree support for Snowball This provides very basic Device Tree support for ST-Ericsson's low-cost development platform, Snowball. If Device Tree for ux500 is enabled and the correct board is configured within the Device Tree blob, the correct *_init_machine() will be called. This patch is based on some original work completed by: Niklas Hernaeus Acked-by: Linus Walleij Signed-off-by: Niklas Hernaeus Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/snowball.dts | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 arch/arm/boot/dts/snowball.dts (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts new file mode 100644 index 000000000000..ebcff9a9b87f --- /dev/null +++ b/arch/arm/boot/dts/snowball.dts @@ -0,0 +1,31 @@ +/* + * Copyright 2011 ST-Ericsson AB + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +/ { + model = "Calao Systems Snowball platform with device tree"; + compatible = "calaosystems,snowball-a9500"; + + #address-cells = <1>; + #size-cells = <1>; + + memory { + reg = <0x00000000 0x20000000>; + }; + + soc-u9500 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + }; +}; -- cgit v1.2.1 From 5d0769f063c87ff4a3d123e4e256f5b19c9e68bd Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Mar 2012 23:07:21 +0000 Subject: ARM: ux500: split dts file for snowball into generic part db8500.dtsi can be used by all systems with a db8500 or db9500 SoC, while snowball.dts is board specific. Acked-by: Linus Walleij Signed-off-by: Arnd Bergmann Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 21 +++++++++++++++++++++ arch/arm/boot/dts/snowball.dts | 8 +------- 2 files changed, 22 insertions(+), 7 deletions(-) create mode 100644 arch/arm/boot/dts/db8500.dtsi (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi new file mode 100644 index 000000000000..50c84b2e20e2 --- /dev/null +++ b/arch/arm/boot/dts/db8500.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright 2012 Linaro Ltd + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + soc-u9500 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + }; +}; diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index ebcff9a9b87f..0ea947023556 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts @@ -10,22 +10,16 @@ */ /dts-v1/; +/include/ "db8500.dtsi" / { model = "Calao Systems Snowball platform with device tree"; compatible = "calaosystems,snowball-a9500"; - #address-cells = <1>; - #size-cells = <1>; - memory { reg = <0x00000000 0x20000000>; }; soc-u9500 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; }; }; -- cgit v1.2.1 From 7e0ce270b2ef3d0d00c3f0725f48aa3127d73edf Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 15 Mar 2012 16:46:17 +0000 Subject: ARM: ux500: db8500: list most devices in the snowball device tree This adds all devices that are normally present through the u8500_init_machine function in the device tree as well, which will duplicate the devices that are visible. This will not do much by itself because the device from the device tree are not matched by any device driver until they are converted as well. The next step is to move over one device at a time to actually be used from the device tree instead of the hardcoded device using auxdata to pass the correct platform_data. Acked-by: Linus Walleij Signed-off-by: Arnd Bergmann Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 228 ++++++++++++++++++++++++++++++++++++++++- arch/arm/boot/dts/snowball.dts | 102 ++++++++++++++++++ 2 files changed, 329 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index 50c84b2e20e2..67423e4fe107 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -15,7 +15,233 @@ soc-u9500 { #address-cells = <1>; #size-cells = <1>; - compatible = "simple-bus"; + compatible = "stericsson,db8500"; ranges; + + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 7 0x4>; + }; + + rtc@80154000 { + compatible = "stericsson,db8500-rtc"; + reg = <0x80154000 0x1000>; + interrupts = <0 18 0x4>; + }; + + gpio0: gpio@8012e000 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8012e000 0x80>; + interrupts = <0 119 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio1: gpio@8012e080 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8012e080 0x80>; + interrupts = <0 120 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio2: gpio@8000e000 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8000e000 0x80>; + interrupts = <0 121 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio3: gpio@8000e080 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8000e080 0x80>; + interrupts = <0 122 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio4: gpio@8000e100 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8000e100 0x80>; + interrupts = <0 123 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio5: gpio@8000e180 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8000e180 0x80>; + interrupts = <0 124 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio6: gpio@8011e000 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8011e000 0x80>; + interrupts = <0 125 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio7: gpio@8011e080 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0x8011e080 0x80>; + interrupts = <0 126 0x4>; + supports-sleepmode; + gpio-controller; + }; + + gpio8: gpio@a03fe000 { + compatible = "stericsson,db8500-gpio", + "stmicroelectronics,nomadik-gpio"; + reg = <0xa03fe000 0x80>; + interrupts = <0 127 0x4>; + supports-sleepmode; + gpio-controller; + }; + + usb@a03e0000 { + compatible = "stericsson,db8500-musb", + "mentor,musb"; + reg = <0xa03e0000 0x10000>; + interrupts = <0 23 0x4>; + }; + + dma-controller@801C0000 { + compatible = "stericsson,db8500-dma40", + "stericsson,dma40"; + reg = <0x801C0000 0x1000 0x40010000 0x800>; + interrupts = <0 25 0x4>; + }; + + prcmu@80157000 { + compatible = "stericsson,db8500-prcmu"; + reg = <0x80157000 0x1000>; + interrupts = <46 47>; + #address-cells = <1>; + #size-cells = <0>; + + ab8500@5 { + compatible = "stericsson,ab8500"; + reg = <5>; /* mailbox 5 is i2c */ + interrupts = <0 40 0x4>; + }; + }; + + i2c@80004000 { + compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; + reg = <0x80004000 0x1000>; + interrupts = <0 21 0x4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@80122000 { + compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; + reg = <0x80122000 0x1000>; + interrupts = <0 22 0x4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@80128000 { + compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; + reg = <0x80128000 0x1000>; + interrupts = <0 55 0x4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@80110000 { + compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; + reg = <0x80110000 0x1000>; + interrupts = <0 12 0x4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@8012a000 { + compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c"; + reg = <0x8012a000 0x1000>; + interrupts = <0 51 0x4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ssp@80002000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <80002000 0x1000>; + interrupts = <0 14 0x4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; + }; + + uart@80120000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80120000 0x1000>; + interrupts = <0 11 0x4>; + status = "disabled"; + }; + uart@80121000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80121000 0x1000>; + interrupts = <0 19 0x4>; + status = "disabled"; + }; + uart@80007000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80007000 0x1000>; + interrupts = <0 26 0x4>; + status = "disabled"; + }; + + sdi@80126000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80126000 0x1000>; + interrupts = <0 60 0x4>; + status = "disabled"; + }; + sdi@80118000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80118000 0x1000>; + interrupts = <0 50 0x4>; + status = "disabled"; + }; + sdi@80005000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80005000 0x1000>; + interrupts = <0 41 0x4>; + status = "disabled"; + }; + sdi@80119000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80119000 0x1000>; + interrupts = <0 59 0x4>; + status = "disabled"; + }; + sdi@80114000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80114000 0x1000>; + interrupts = <0 99 0x4>; + status = "disabled"; + }; + sdi@80008000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80114000 0x1000>; + interrupts = <0 100 0x4>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 0ea947023556..34bfd79fb073 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts @@ -20,6 +20,108 @@ reg = <0x00000000 0x20000000>; }; + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@1 { + debounce_interval = <50>; + wakeup = <1>; + linux,code = <2>; + label = "userpb"; + gpios = <&gpio1 0>; + }; + button@2 { + debounce_interval = <50>; + wakeup = <1>; + linux,code = <3>; + label = "userpb"; + gpios = <&gpio4 23>; + }; + button@3 { + debounce_interval = <50>; + wakeup = <1>; + linux,code = <4>; + label = "userpb"; + gpios = <&gpio4 23>; + }; + button@4 { + debounce_interval = <50>; + wakeup = <1>; + linux,code = <5>; + label = "userpb"; + gpios = <&gpio5 1>; + }; + button@5 { + debounce_interval = <50>; + wakeup = <1>; + linux,code = <6>; + label = "userpb"; + gpios = <&gpio5 2>; + }; + }; + + leds { + compatible = "gpio-leds"; + used-led { + label = "user_led"; + gpios = <&gpio4 14>; + }; + }; + soc-u9500 { + + external-bus@50000000 { + compatible = "simple-bus"; + reg = <0x50000000 0x10000000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + ethernet@50000000 { + compatible = "smsc,9111"; + reg = <0x50000000 0x10000>; + interrupts = <12>; + interrupt-parent = <&gpio4>; + }; + }; + + sdi@80126000 { + status = "enabled"; + cd-gpios = <&gpio6 26>; + }; + + sdi@80114000 { + status = "enabled"; + }; + + i2c@80004000 { + tc3589x@42 { + //compatible = "tc3589x"; + reg = <0x42>; + interrupts = <25>; + interrupt-parent = <&gpio6>; + }; + tps61052@33 { + //compatible = "tps61052"; + reg = <0x33>; + }; + }; + + i2c@80128000 { + lp5521@0x33 { + // compatible = "lp5521"; + reg = <0x33>; + }; + lp5521@0x34 { + // compatible = "lp5521"; + reg = <0x34>; + }; + bh1780@0x29 { + // compatible = "rohm,bh1780gli"; + reg = <0x33>; + }; + }; }; }; -- cgit v1.2.1 From dab6487e35680ac5043c58a60554c49052276f5e Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 7 Mar 2012 17:22:30 +0000 Subject: ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree This enables the embedded GIC on all u8500 based hardware using DT. Acked-by: Linus Walleij Reviewed-by: Arnd Bergmann Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index 67423e4fe107..614a471df4a7 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -16,8 +16,19 @@ #address-cells = <1>; #size-cells = <1>; compatible = "stericsson,db8500"; + interrupt-parent = <&intc>; ranges; + intc: interrupt-controller@a0411000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + interrupt-parent; + reg = <0xa0411000 0x1000>, + <0xa0410100 0x100>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 7 0x4>; -- cgit v1.2.1 From 4905af0e13a665da5f72d2629e93161ba781d03b Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 7 Mar 2012 17:35:04 +0000 Subject: ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree Enables the 3 UARTs found on a u8500 using DT. Acked-by: Linus Walleij Reviewed-by: Arnd Bergmann Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/snowball.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 34bfd79fb073..359c6d679156 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts @@ -96,6 +96,18 @@ status = "enabled"; }; + uart@80120000 { + status = "okay"; + }; + + uart@80121000 { + status = "okay"; + }; + + uart@80007000 { + status = "okay"; + }; + i2c@80004000 { tc3589x@42 { //compatible = "tc3589x"; -- cgit v1.2.1 From f1949ea0d1f6034d38ce20089980b6b26d527c25 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 8 Mar 2012 09:02:02 +0000 Subject: ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree This provides PL310 Level 2 Cache Controller Device Tree support for all u8500 based devices. Acked-by: Linus Walleij Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index 614a471df4a7..ce3b56fb9132 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -29,6 +29,14 @@ <0xa0410100 0x100>; }; + L2: l2-cache { + compatible = "arm,pl310-cache"; + reg = <0xa0412000 0x1000>; + interrupts = <0 13 4>; + cache-unified; + cache-level = <2>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 7 0x4>; -- cgit v1.2.1 From 15daf691e8e0119e6c21d3ddf6b4754e66e37365 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 15 Mar 2012 16:47:11 +0000 Subject: ARM: ux500: Enable PL022 SSP Controller in Device Tree This SSP Controller supports a number of serial communication methods and as such cannot be registered using of_register_spi_devices. Instead we register it simply as a primecell device. Acked-by: Linus Walleij Acked-by: Arnd Bergmann Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index ce3b56fb9132..a81cce0f755e 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -204,7 +204,10 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; + + // Add one of these for each child device cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>; + }; uart@80120000 { -- cgit v1.2.1 From 71de5c46e0600b72df58269e80da343e354ddbd7 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 16 Mar 2012 09:53:24 +0000 Subject: ARM: ux500: Provide local timer support for Device Tree This enables local timer (AKA: private timer) support for all u8500 based hardware using DT. Acked-by: Linus Walleij Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index a81cce0f755e..d73dce645667 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -42,6 +42,12 @@ interrupts = <0 7 0x4>; }; + timer@a0410600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xa0410600 0x20>; + interrupts = <1 13 0x304>; + }; + rtc@80154000 { compatible = "stericsson,db8500-rtc"; reg = <0x80154000 0x1000>; -- cgit v1.2.1